Re: [Intel-gfx] [PATCH 0/5] drm: drm_plane_helper_check_state() related stuff

On Fri, Nov 10, 2017 at 11:42:59PM +0200, Ville Syrjälä wrote: > On Fri, Nov 10, 2017 at 01:26:47PM -0800, Sinclair Yeh wrote: > > Sorry this took so long. > > No worries. > > > > > The vmwgfx part: Reviewed-by: Sinclair Yeh > > > > I've done some testing and the vmwgfx part

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v2,1/2] drm/i915: Runtime disable for eDP DRRS (rev4)

== Series Details == Series: series starting with [v2,1/2] drm/i915: Runtime disable for eDP DRRS (rev4) URL : https://patchwork.freedesktop.org/series/32887/ State : warning == Summary == Series 32887v4 series starting with [v2,1/2] drm/i915: Runtime disable for eDP DRRS

[Intel-gfx] [PATCH v3] i915/drrs/debugfs: psr status info addition

From: "C, Ramalingam" Existing debugfs entry i915_drrs_status is updated with whether PSR is the cause for DRRS disabled state. [v2]: Dropped the module parameter details as ctl moved from module parameter to debugfs. [Rodrigo] [v3]: Crtc ID information is dropped

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: remove skl_misc_ctl_write handler

== Series Details == Series: drm/i915/gvt: remove skl_misc_ctl_write handler URL : https://patchwork.freedesktop.org/series/34076/ State : success == Summary == Test kms_flip: Subgroup wf_vblank-vs-modeset-interruptible: dmesg-warn -> PASS (shard-hsw) fdo#102614

Re: [Intel-gfx] [PATCH v2 2/2] i915/drrs/debugfs: crtc id and psr status

> -Original Message- > From: Vivi, Rodrigo > Sent: Saturday, November 18, 2017 12:26 AM > To: C, Ramalingam > Cc: Zanoni, Paulo R ; ch...@chris-wilson.co.uk; > intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH v2 2/2]

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: remove skl_misc_ctl_write handler

== Series Details == Series: drm/i915/gvt: remove skl_misc_ctl_write handler URL : https://patchwork.freedesktop.org/series/34076/ State : success == Summary == Series 34076v1 drm/i915/gvt: remove skl_misc_ctl_write handler

[Intel-gfx] [PATCH] drm/i915/gvt: remove skl_misc_ctl_write handler

With different settings of compressed data hash mode between VMs and host may cause gpu issues. Commit: 1999f108c ("drm/i915/gvt: Disable compression workaround for Gen9") disable compression workaround of guest in gvt host to align with host. Commit: 93564044f ("drm/i915: Switch over to the

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34069/ State : warning == Summary == Test gem_busy: Subgroup extended-semaphore-render:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34069/ State : success == Summary == Series 34069v1 series starting with [CI,01/21] drm/i915/execlists: Listen to

[Intel-gfx] [CI 21/21] drm/i915: Enable rc6 for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_pci.c | 3 +-- drivers/gpu/drm/i915/intel_pm.c | 28 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c

[Intel-gfx] [CI 09/21] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

As the semaphores is just part of the engine, include it with the general pretty printer universally used for debugging. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen ---

[Intel-gfx] [CI 14/21] drm/printer: Add drm_vprintf()

Simple va_args equivalent to the existing drm_printf() for use with the drm_printer. Signed-off-by: Chris Wilson Cc: Rob Clark Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_print.c | 5 + include/drm/drm_print.h

[Intel-gfx] [CI 18/21] drm/i915: Include the global reset count for intel_engine_dump()

Since a global reset affects the engine, include that along side the per-engine reset counter when pretty printing the engine state in intel_engine_dump(). Signed-off-by: Chris Wilson Cc: Mika Kuoppala ---

[Intel-gfx] [CI 19/21] drm/i915: Add is-wedged flag to intel_engine_dump()

Comparing the state tested by intel_engine_is_idle() and printed by intel_engine_dump(), the only bit not shown is whether or not the device is wedged. Add that little bit of information to the pretty printer so that if the engine fails to idle we can see why. Signed-off-by: Chris Wilson

[Intel-gfx] [CI 20/21] drm/i915: Remove unsafe i915.enable_rc6

It has been many years since the last confirmed sighting (and fix) of an RC6 related bug (usually a system hang). Remove the parameter to stop users from setting dangerous values, as they often set it during triage and end up disabling the entire runtime pm instead (the option is not a fine

[Intel-gfx] [CI 15/21] drm/i915: Use snprintf to avoid line-break when pretty-printing engines

When printing the execlist ports, we first print the ELSP header then follow it with the pretty-printed request. Since switching to drm_printer and show the output via printk, it automatically appends a newline to each call (unlike the old seq_printf output). To avoid the unwanted line break,

[Intel-gfx] [CI 17/21] drm/i915: Include engine state on detecting a missed breadcrumb/seqno

Now that we have a common engine state pretty printer, we can use that instead of the adhoc information printed when we miss a breadcrumb. v2: Rearrange intel_engine_disarm_breadcrumbs() to avoid calling intel_engine_dump() under the rb spinlock (Mika) and to pretty-print the error state early so

[Intel-gfx] [CI 11/21] drm/i915: Unwind incomplete legacy context switches

The legacy context switch for ringbuffer submission is multistaged, where each of those stages may fail. However, we were updating global state after some stages, and so we had to force the incomplete request to be submitted because we could not unwind. Save the global state before performing the

[Intel-gfx] [CI 12/21] move-switch-ctx

--- drivers/gpu/drm/i915/i915_gem_context.c | 197 drivers/gpu/drm/i915/intel_ringbuffer.c | 185 +- 2 files changed, 184 insertions(+), 198 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [CI 13/21] drm/i915: Enable render context support for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index

[Intel-gfx] [CI 10/21] drm/i915: Remove i915.semaphores modparam

Having disabled the broken semaphores on Sandybridge, there is no need for a modparam any more, so remove it in favour of a simple HAS_LEGACY_SEMAPHORES() guard. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Maarten

[Intel-gfx] [CI 16/21] drm/i915: Make engine state pretty-printer header configurable

Pass in a format string (and args) to specify the header to be emitted along with the engine state when pretty-printing. This allows the header to be emitted inside the drm_printer stream, so sharing the same prefix and output characteristics (e.g. debug level and filtering). Signed-off-by: Chris

[Intel-gfx] [CI 01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c Author: Oscar Mateo Date: Thu Jul 24 17:04:40 2014 +0100 drm/i915/bdw: Avoid non-lite-restore preemptions execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting when one context completed and it

[Intel-gfx] [CI 07/21] drm/i915: Remove obsolete ringbuffer emission for gen8+

Since removing the module parameter to force selection of ringbuffer emission for gen8, the code is defunct. Remove it. To put the difference into perspective, a couple of microbenchmarks (bdw i7-5557u, 20170324): ring execlists exec continuous

[Intel-gfx] [CI 05/21] drm/i915: Automatic i915_switch_context for legacy

During request construction, after pinning the context we know whether or not we have to emit a context switch. So move this common operation from every caller into i915_gem_request_alloc() itself. v2: Always submit the request if we emitted some commands during request construction, as typically

[Intel-gfx] [CI 03/21] drm/i915/execlists: Skip a lite-restore immediately prior to a context-completion

If we are about to do another context-switch in the near future skip doing performing a lite-restore now. (Forcing a lite-restore just before a context-switch effectively doubles the cost of that context-switch, so long as we can handle the interrupt and resubmit before the GPU powers down, which

[Intel-gfx] [CI 02/21] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

The hardware needs some time to process the information received in the ExecList Submission Port, and expects us to don't write anything new until it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or PREEMPTED CSB event. If we do not follow this, the driver could write new data

[Intel-gfx] [CI 08/21] drm/i915: Disable semaphores on Sandybridge

I should have admitted defeat long ago as there has been a rare but persistent error on Sandybridge where semaphore signaling did not propagate to the waiter, leading to a GPU hang. With the work on fence signaling for v4.9, the impact of using CPU driven signaling was greatly reduced wrt to the

[Intel-gfx] [CI 06/21] drm/i915: Remove i915.enable_execlists module parameter

Execlists and legacy ringbuffer submission are no longer feature comparable (execlists now offer greater functionality that should overcome their performance hit) and obsoletes the unsafe module parameter, i.e. comparing the two modes of execution is no longer useful, so remove the debug tool.

[Intel-gfx] [CI 04/21] drm/i915: Pull the unconditional GPU cache invalidation into request construction

As the request now may implicitly invoke a context-switch, we should follow that with a GPU TLB invalidation. Also even before using GGTT, we should invalidate the TLBs for any updates (as well as the ppgtt invalidates that are unconditionally applied by execbuf). Since we almost always require

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34068/ State : warning == Summary == Test gem_busy: Subgroup extended-semaphore-bsd: pass

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34068/ State : success == Summary == Series 34068v1 series starting with [CI,01/13] drm/i915/execlists: Listen to

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34067/ State : failure == Summary == Series 34067v1 series starting with [CI,01/21] drm/i915/execlists: Listen to

[Intel-gfx] [CI 11/13] drm/i915: Unwind incomplete legacy context switches

The legacy context switch for ringbuffer submission is multistaged, where each of those stages may fail. However, we were updating global state after some stages, and so we had to force the incomplete request to be submitted because we could not unwind. Save the global state before performing the

[Intel-gfx] [CI 12/13] move-switch-ctx

--- drivers/gpu/drm/i915/i915_gem_context.c | 197 drivers/gpu/drm/i915/intel_ringbuffer.c | 185 +- 2 files changed, 184 insertions(+), 198 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [CI 08/13] drm/i915: Disable semaphores on Sandybridge

I should have admitted defeat long ago as there has been a rare but persistent error on Sandybridge where semaphore signaling did not propagate to the waiter, leading to a GPU hang. With the work on fence signaling for v4.9, the impact of using CPU driven signaling was greatly reduced wrt to the

[Intel-gfx] [CI 09/13] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

As the semaphores is just part of the engine, include it with the general pretty printer universally used for debugging. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen ---

[Intel-gfx] [CI 13/13] drm/i915: Enable render context support for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index

[Intel-gfx] [CI 10/13] drm/i915: Remove i915.semaphores modparam

Having disabled the broken semaphores on Sandybridge, there is no need for a modparam any more, so remove it in favour of a simple HAS_LEGACY_SEMAPHORES() guard. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Maarten

[Intel-gfx] [CI 04/13] drm/i915: Pull the unconditional GPU cache invalidation into request construction

As the request now may implicitly invoke a context-switch, we should follow that with a GPU TLB invalidation. Also even before using GGTT, we should invalidate the TLBs for any updates (as well as the ppgtt invalidates that are unconditionally applied by execbuf). Since we almost always require

[Intel-gfx] [CI 02/13] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

The hardware needs some time to process the information received in the ExecList Submission Port, and expects us to don't write anything new until it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or PREEMPTED CSB event. If we do not follow this, the driver could write new data

[Intel-gfx] [CI 07/13] drm/i915: Remove obsolete ringbuffer emission for gen8+

Since removing the module parameter to force selection of ringbuffer emission for gen8, the code is defunct. Remove it. To put the difference into perspective, a couple of microbenchmarks (bdw i7-5557u, 20170324): ring execlists exec continuous

[Intel-gfx] [CI 03/13] drm/i915/execlists: Skip a lite-restore immediately prior to a context-completion

If we are about to do another context-switch in the near future skip doing performing a lite-restore now. (Forcing a lite-restore just before a context-switch effectively doubles the cost of that context-switch, so long as we can handle the interrupt and resubmit before the GPU powers down, which

[Intel-gfx] [CI 05/13] drm/i915: Automatic i915_switch_context for legacy

During request construction, after pinning the context we know whether or not we have to emit a context switch. So move this common operation from every caller into i915_gem_request_alloc() itself. v2: Always submit the request if we emitted some commands during request construction, as typically

[Intel-gfx] [CI 06/13] drm/i915: Remove i915.enable_execlists module parameter

Execlists and legacy ringbuffer submission are no longer feature comparable (execlists now offer greater functionality that should overcome their performance hit) and obsoletes the unsafe module parameter, i.e. comparing the two modes of execution is no longer useful, so remove the debug tool.

[Intel-gfx] [CI 01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c Author: Oscar Mateo Date: Thu Jul 24 17:04:40 2014 +0100 drm/i915/bdw: Avoid non-lite-restore preemptions execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting when one context completed and it

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Runtime disable for eDP DRRS

Thanks for reviewing these changes Rodrigo. > -Original Message- > From: Vivi, Rodrigo > Sent: Saturday, November 18, 2017 12:24 AM > To: C, Ramalingam > Cc: Zanoni, Paulo R ; intel- > g...@lists.freedesktop.org > Subject: Re: [Intel-gfx]

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

== Series Details == Series: series starting with [CI,01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE URL : https://patchwork.freedesktop.org/series/34066/ State : failure == Summary == Series 34066v1 series starting with [CI,01/13] drm/i915/execlists: Listen to

[Intel-gfx] [CI 17/21] drm/i915: Include engine state on detecting a missed breadcrumb/seqno

Now that we have a common engine state pretty printer, we can use that instead of the adhoc information printed when we miss a breadcrumb. v2: Rearrange intel_engine_disarm_breadcrumbs() to avoid calling intel_engine_dump() under the rb spinlock (Mika) and to pretty-print the error state early so

[Intel-gfx] [CI 20/21] drm/i915: Remove unsafe i915.enable_rc6

It has been many years since the last confirmed sighting (and fix) of an RC6 related bug (usually a system hang). Remove the parameter to stop users from setting dangerous values, as they often set it during triage and end up disabling the entire runtime pm instead (the option is not a fine

[Intel-gfx] [CI 21/21] drm/i915: Enable rc6 for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_pci.c | 3 +-- drivers/gpu/drm/i915/intel_pm.c | 28 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c

[Intel-gfx] [CI 19/21] drm/i915: Add is-wedged flag to intel_engine_dump()

Comparing the state tested by intel_engine_is_idle() and printed by intel_engine_dump(), the only bit not shown is whether or not the device is wedged. Add that little bit of information to the pretty printer so that if the engine fails to idle we can see why. Signed-off-by: Chris Wilson

[Intel-gfx] [CI 09/21] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

As the semaphores is just part of the engine, include it with the general pretty printer universally used for debugging. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen ---

[Intel-gfx] [CI 08/21] drm/i915: Disable semaphores on Sandybridge

I should have admitted defeat long ago as there has been a rare but persistent error on Sandybridge where semaphore signaling did not propagate to the waiter, leading to a GPU hang. With the work on fence signaling for v4.9, the impact of using CPU driven signaling was greatly reduced wrt to the

[Intel-gfx] [CI 10/21] drm/i915: Remove i915.semaphores modparam

Having disabled the broken semaphores on Sandybridge, there is no need for a modparam any more, so remove it in favour of a simple HAS_LEGACY_SEMAPHORES() guard. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Maarten

[Intel-gfx] [CI 12/21] move-switch-ctx

--- drivers/gpu/drm/i915/i915_gem_context.c | 197 drivers/gpu/drm/i915/intel_ringbuffer.c | 185 +- 2 files changed, 184 insertions(+), 198 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [CI 04/21] drm/i915: Pull the unconditional GPU cache invalidation into request construction

As the request now may implicitly invoke a context-switch, we should follow that with a GPU TLB invalidation. Also even before using GGTT, we should invalidate the TLBs for any updates (as well as the ppgtt invalidates that are unconditionally applied by execbuf). Since we almost always require

[Intel-gfx] [CI 06/21] drm/i915: Remove i915.enable_execlists module parameter

Execlists and legacy ringbuffer submission are no longer feature comparable (execlists now offer greater functionality that should overcome their performance hit) and obsoletes the unsafe module parameter, i.e. comparing the two modes of execution is no longer useful, so remove the debug tool.

[Intel-gfx] [CI 05/21] drm/i915: Automatic i915_switch_context for legacy

During request construction, after pinning the context we know whether or not we have to emit a context switch. So move this common operation from every caller into i915_gem_request_alloc() itself. v2: Always submit the request if we emitted some commands during request construction, as typically

[Intel-gfx] [CI 13/21] drm/i915: Enable render context support for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c

[Intel-gfx] [CI 16/21] drm/i915: Make engine state pretty-printer header configurable

Pass in a format string (and args) to specify the header to be emitted along with the engine state when pretty-printing. This allows the header to be emitted inside the drm_printer stream, so sharing the same prefix and output characteristics (e.g. debug level and filtering). Signed-off-by: Chris

[Intel-gfx] [CI 15/21] drm/i915: Use snprintf to avoid line-break when pretty-printing engines

When printing the execlist ports, we first print the ELSP header then follow it with the pretty-printed request. Since switching to drm_printer and show the output via printk, it automatically appends a newline to each call (unlike the old seq_printf output). To avoid the unwanted line break,

[Intel-gfx] [CI 18/21] drm/i915: Include the global reset count for intel_engine_dump()

Since a global reset affects the engine, include that along side the per-engine reset counter when pretty printing the engine state in intel_engine_dump(). Signed-off-by: Chris Wilson Cc: Mika Kuoppala ---

[Intel-gfx] [CI 11/21] drm/i915: Unwind incomplete legacy context switches

The legacy context switch for ringbuffer submission is multistaged, where each of those stages may fail. However, we were updating global state after some stages, and so we had to force the incomplete request to be submitted because we could not unwind. Save the global state before performing the

[Intel-gfx] [CI 14/21] drm/printer: Add drm_vprintf()

Simple va_args equivalent to the existing drm_printf() for use with the drm_printer. Signed-off-by: Chris Wilson Cc: Rob Clark Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_print.c | 5 + include/drm/drm_print.h

[Intel-gfx] [CI 07/21] drm/i915: Remove obsolete ringbuffer emission for gen8+

Since removing the module parameter to force selection of ringbuffer emission for gen8, the code is defunct. Remove it. To put the difference into perspective, a couple of microbenchmarks (bdw i7-5557u, 20170324): ring execlists exec continuous

[Intel-gfx] [CI 03/21] drm/i915/execlists: Skip a lite-restore immediately prior to a context-completion

If we are about to do another context-switch in the near future skip doing performing a lite-restore now. (Forcing a lite-restore just before a context-switch effectively doubles the cost of that context-switch, so long as we can handle the interrupt and resubmit before the GPU powers down, which

[Intel-gfx] [CI 02/21] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

The hardware needs some time to process the information received in the ExecList Submission Port, and expects us to don't write anything new until it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or PREEMPTED CSB event. If we do not follow this, the driver could write new data

[Intel-gfx] [CI 01/21] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c Author: Oscar Mateo Date: Thu Jul 24 17:04:40 2014 +0100 drm/i915/bdw: Avoid non-lite-restore preemptions execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting when one context completed and it

[Intel-gfx] [CI 11/13] drm/i915: Unwind incomplete legacy context switches

The legacy context switch for ringbuffer submission is multistaged, where each of those stages may fail. However, we were updating global state after some stages, and so we had to force the incomplete request to be submitted because we could not unwind. Save the global state before performing the

[Intel-gfx] [CI 13/13] drm/i915: Enable render context support for Ironlake

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c

[Intel-gfx] [CI 09/13] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

As the semaphores is just part of the engine, include it with the general pretty printer universally used for debugging. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Joonas Lahtinen ---

[Intel-gfx] [CI 12/13] move-switch-ctx

--- drivers/gpu/drm/i915/i915_gem_context.c | 197 drivers/gpu/drm/i915/intel_ringbuffer.c | 185 +- 2 files changed, 184 insertions(+), 198 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [CI 08/13] drm/i915: Disable semaphores on Sandybridge

I should have admitted defeat long ago as there has been a rare but persistent error on Sandybridge where semaphore signaling did not propagate to the waiter, leading to a GPU hang. With the work on fence signaling for v4.9, the impact of using CPU driven signaling was greatly reduced wrt to the

[Intel-gfx] [CI 06/13] drm/i915: Remove i915.enable_execlists module parameter

Execlists and legacy ringbuffer submission are no longer feature comparable (execlists now offer greater functionality that should overcome their performance hit) and obsoletes the unsafe module parameter, i.e. comparing the two modes of execution is no longer useful, so remove the debug tool.

[Intel-gfx] [CI 10/13] drm/i915: Remove i915.semaphores modparam

Having disabled the broken semaphores on Sandybridge, there is no need for a modparam any more, so remove it in favour of a simple HAS_LEGACY_SEMAPHORES() guard. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Maarten

[Intel-gfx] [CI 07/13] drm/i915: Remove obsolete ringbuffer emission for gen8+

Since removing the module parameter to force selection of ringbuffer emission for gen8, the code is defunct. Remove it. To put the difference into perspective, a couple of microbenchmarks (bdw i7-5557u, 20170324): ring execlists exec continuous

[Intel-gfx] [CI 04/13] drm/i915: Pull the unconditional GPU cache invalidation into request construction

As the request now may implicitly invoke a context-switch, we should follow that with a GPU TLB invalidation. Also even before using GGTT, we should invalidate the TLBs for any updates (as well as the ppgtt invalidates that are unconditionally applied by execbuf). Since we almost always require

[Intel-gfx] [CI 05/13] drm/i915: Automatic i915_switch_context for legacy

During request construction, after pinning the context we know whether or not we have to emit a context switch. So move this common operation from every caller into i915_gem_request_alloc() itself. v2: Always submit the request if we emitted some commands during request construction, as typically

[Intel-gfx] [CI 03/13] drm/i915/execlists: Skip a lite-restore immediately prior to a context-completion

If we are about to do another context-switch in the near future skip doing performing a lite-restore now. (Forcing a lite-restore just before a context-switch effectively doubles the cost of that context-switch, so long as we can handle the interrupt and resubmit before the GPU powers down, which

[Intel-gfx] [CI 02/13] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

The hardware needs some time to process the information received in the ExecList Submission Port, and expects us to don't write anything new until it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or PREEMPTED CSB event. If we do not follow this, the driver could write new data

[Intel-gfx] [CI 01/13] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c Author: Oscar Mateo Date: Thu Jul 24 17:04:40 2014 +0100 drm/i915/bdw: Avoid non-lite-restore preemptions execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting when one context completed and it

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote: > Greg KH wrote: > > On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote: > >> Greg KH wrote: > >>> On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote: > Greg KH wrote: > > On Sat, Nov 18, 2017 at

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

On Sun, Nov 19, 2017 at 12:56:26PM +0100, Rainer Fiebig wrote: > Greg KH wrote: > > On Sat, Nov 18, 2017 at 05:08:20PM +0100, Rainer Fiebig wrote: > >> Greg KH wrote: > >>> On Sat, Nov 18, 2017 at 01:47:32PM +0100, Rainer Fiebig wrote: > Hi! > > Hopefully the right addressee. >