Re: [Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

On 11/23/2017 11:39 PM, Michal Wajdeczko wrote: We are using intel_ prefix for all filenames with hardware related definitions. GuC registers also fall into this category. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Joonas

Re: [Intel-gfx] [PATCH 1/6] drm/i915: export the stolen region as a resource

+ Ville to comment if the removed code loses some meaningful comments or not. I already went through the code doing consolidations, about a year ago, so I may be blind to it. On Wed, 2017-11-22 at 21:19 +, Matthew Auld wrote: > We duplicate the stolen discovery code in early-quirks and in

[Intel-gfx] ✗ Fi.CI.BAT: warning for x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

== Series Details == Series: x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit URL : https://patchwork.freedesktop.org/series/34342/ State : warning == Summary == Series 34342v1 x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

Re: [Intel-gfx] [PATCH] x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

* Joonas Lahtinen wrote: > In preparation for upcoming SKUs, allow more freedom in placement > of the Intel graphics stolen memory by BIOS to full 64bit range. > > Signed-off-by: Joonas Lahtinen > Cc: Matthew Auld

Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

On 23/11/17 16:07, Chris Wilson wrote: > Quoting Chris Wilson (2017-11-23 16:02:20) >> Quoting Tvrtko Ursulin (2017-11-23 13:37:30) >>> >>> On 23/11/2017 08:22, Chris Wilson wrote: Make sure the HW is idle before we start sampling the GPU for busyness. If we do not rest for long enough

[Intel-gfx] [PATCH] x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

In preparation for upcoming SKUs, allow more freedom in placement of the Intel graphics stolen memory by BIOS to full 64bit range. Signed-off-by: Joonas Lahtinen Cc: Matthew Auld Cc: Chris Wilson Cc: Paulo

[Intel-gfx] [GIT PULL] git fixes for 4.15

Hi, Here's current gvt fixes for 4.15. One is backport from f2880e04f3a5 ("drm/i915/gvt: Move request alloc to dispatch_workload path only"). And other two regression fixes. thanks -- The following changes since commit 3572f04c69ed4369da5d3c65d84fb18774aa60b6: drm/i915: Fix

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

Greg KH wrote: > On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote: >> Rainer Fiebig wrote: >>> Maarten Lankhorst wrote: Op 20-11-17 om 09:51 schreef Rainer Fiebig: > Jani Nikula wrote: >> On Sun, 19 Nov 2017, Greg KH wrote: >>> On Sun, Nov

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

Greg KH wrote: > On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote: >> Rainer Fiebig wrote: >>> Maarten Lankhorst wrote: Op 20-11-17 om 09:51 schreef Rainer Fiebig: > Jani Nikula wrote: >> On Sun, 19 Nov 2017, Greg KH wrote: >>> On Sun, Nov

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

On Thu, Nov 23, 2017 at 10:09:25PM +0100, Rainer Fiebig wrote: > Rainer Fiebig wrote: > > Maarten Lankhorst wrote: > >> Op 20-11-17 om 09:51 schreef Rainer Fiebig: > >>> Jani Nikula wrote: > On Sun, 19 Nov 2017, Greg KH wrote: > > On Sun, Nov 19, 2017 at

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

== Series Details == Series: drm/i915/selftests: Hold rpm wakeref for request + ggtt usage URL : https://patchwork.freedesktop.org/series/34334/ State : warning == Summary == Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: pass -> SKIP

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)

== Series Details == Series: drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2) URL : https://patchwork.freedesktop.org/series/34318/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

On 23 November 2017 at 23:37, Chris Wilson wrote: > Since the removal of the delayed rc6 enabling, we now setup and drop the > early rpm wakeref during modules initialisation before we start the live > selftests. As such, we are now detecting errors in the tests where we

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

== Series Details == Series: drm/i915/selftests: Hold rpm wakeref for request + ggtt usage URL : https://patchwork.freedesktop.org/series/34334/ State : success == Summary == Series 34334v1 drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

== Series Details == Series: series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() URL : https://patchwork.freedesktop.org/series/34329/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw)

[Intel-gfx] [PATCH] drm/i915/selftests: Hold rpm wakeref for request + ggtt usage

Since the removal of the delayed rc6 enabling, we now setup and drop the early rpm wakeref during modules initialisation before we start the live selftests. As such, we are now detecting errors in the tests where we were not holding the required wakeref for various actions. As rpm is not the

[Intel-gfx] ✗ Fi.CI.IGT: failure for igt/perf_pmu: Recalibrate interrupt loop.

== Series Details == Series: igt/perf_pmu: Recalibrate interrupt loop. URL : https://patchwork.freedesktop.org/series/34310/ State : failure == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 Test kms_flip: Subgroup

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: More plane clipping polish

== Series Details == Series: drm: More plane clipping polish URL : https://patchwork.freedesktop.org/series/34323/ State : success == Summary == Test drv_module_reload: Subgroup basic-no-display: pass -> DMESG-WARN (shard-hsw) fdo#102707 Test kms_flip:

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation

== Series Details == Series: series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation URL : https://patchwork.freedesktop.org/series/34287/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render:

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays

== Series Details == Series: series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays URL : https://patchwork.freedesktop.org/series/34271/ State : success == Summary == Test kms_cursor_crc: Subgroup cursor-256x256-suspend: pass -> SKIP (shard-snb)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2)

== Series Details == Series: drm/i915/pmu: Hide the (unsigned long)ptr cast (rev2) URL : https://patchwork.freedesktop.org/series/34318/ State : success == Summary == Series 34318v2 drm/i915/pmu: Hide the (unsigned long)ptr cast

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/pmu: Hide the (unsigned long)ptr cast

== Series Details == Series: drm/i915/pmu: Hide the (unsigned long)ptr cast URL : https://patchwork.freedesktop.org/series/34318/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/perf_pmu: Stop peeking at intel_mmio registers

== Series Details == Series: igt/perf_pmu: Stop peeking at intel_mmio registers URL : https://patchwork.freedesktop.org/series/34268/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 fdo#102252

Re: [Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

Quoting Michal Wajdeczko (2017-11-23 18:09:15) > We are using intel_ prefix for all filenames with hardware related > definitions. GuC registers also fall into this category. Seconded. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH v2] drm/i915/pmu: Hide the (unsigned long)ptr cast

We pretend the PMU config id is a pointer value when encoding it into the device parameters for presentation via sysfs. This requires casting of an unsigned long into and out of the pointer member, which annoys smatch: drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument 3 to

Re: [Intel-gfx] 4.9.62: intermittent flicker after upgrade from 4.9.61

Rainer Fiebig wrote: > Maarten Lankhorst wrote: >> Op 20-11-17 om 09:51 schreef Rainer Fiebig: >>> Jani Nikula wrote: On Sun, 19 Nov 2017, Greg KH wrote: > On Sun, Nov 19, 2017 at 01:44:06PM +0100, Rainer Fiebig wrote: >> Greg KH wrote: >>> On Sun, Nov

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)

== Series Details == Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev3) URL : https://patchwork.freedesktop.org/series/31407/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

Quoting Michal Wajdeczko (2017-11-23 18:20:52) > On Thu, 23 Nov 2017 18:42:13 +0100, Chris Wilson > wrote: > > > We pretend the PMU config id is a pointer value when encoding it into > > the device parameters for presentation via sysfs. This requires casting > > of an

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/perf_pmu: Reduce arbitrary delays

== Series Details == Series: igt/perf_pmu: Reduce arbitrary delays URL : https://patchwork.freedesktop.org/series/34253/ State : success == Summary == Test drv_module_reload: Subgroup basic-no-display: pass -> DMESG-WARN (shard-snb) fdo#102707 +1 Test

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Prevent zero length "index" write

Quoting Ville Syrjala (2017-11-23 19:41:57) > From: Ville Syrjälä > > The hardware always writes one or two bytes in the index portion of > an indexed transfer. Make sure the message we send as the index > doesn't have a zero length. > > Cc: sta...@vger.kernel.org

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

Quoting Ville Syrjala (2017-11-23 19:41:56) > From: Ville Syrjälä > > We can only specify the one slave address to indexed reads/writes. > Make sure the messages we check are destined to the same slave > address before deciding to do an indexed transfer. > > Cc:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2] drm/i915: Enable render context support for Ironlake (gen5) (rev2)

== Series Details == Series: series starting with [v2] drm/i915: Enable render context support for Ironlake (gen5) (rev2) URL : https://patchwork.freedesktop.org/series/34315/ State : failure == Summary == Applying: drm/i915: Enable render context support for Ironlake (gen5) Applying:

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

Quoting Ville Syrjala (2017-11-23 19:41:55) > From: Ville Syrjälä > > We're supposed to examine msgs[i] and msgs[i+1] to see if they > form a pair suitable for an indexed transfer. But in reality > we're examining msgs[0] and msgs[1]. Fix this. > > Cc:

[Intel-gfx] [PATCH v2] drm/i915: Enable render context support for Ironlake (gen5)

Ironlake does support being able to saving and reloading context specific registers between contexts, providing isolation of the basic GPU state (as programmable by userspace). This allows userspace to assume that the GPU retains their state from one batch to the next, minimising the amount of

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Combine rc6/rc6p tests

== Series Details == Series: igt/perf_pmu: Combine rc6/rc6p tests URL : https://patchwork.freedesktop.org/series/34313/ State : failure == Summary == Series 34313 revision 1 was fully merged or fully failed: no git log ___ Intel-gfx mailing list

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5)

== Series Details == Series: series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5) URL : https://patchwork.freedesktop.org/series/34315/ State : failure == Summary == Test pm_rc6_residency: Subgroup rc6p-accuracy: skip -> PASS

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

== Series Details == Series: series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() URL : https://patchwork.freedesktop.org/series/34329/ State : success == Summary == Series 34329v1 series starting with [1/3] drm/i915: Pass the correct msgs to

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Recalibrate interrupt loop.

== Series Details == Series: igt/perf_pmu: Recalibrate interrupt loop. URL : https://patchwork.freedesktop.org/series/34310/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring duration

[Intel-gfx] [PULL] drm-misc-next-fixes

Hi Dave, drm-misc-next-fixes-2017-11-23: Fix crtc_id in page_flip event. One tiny uapi fix, cc: stable, for a small oversight. Shouldn't matter much since we added this for atomic, but yay for OCD and making igt happy :-) Cheers, Daniel The following changes since commit

[Intel-gfx] [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

From: Ville Syrjälä We can only specify the one slave address to indexed reads/writes. Make sure the messages we check are destined to the same slave address before deciding to do an indexed transfer. Cc: sta...@vger.kernel.org Cc: Daniel Kurtz

[Intel-gfx] [PATCH 3/3] drm/i915: Prevent zero length "index" write

From: Ville Syrjälä The hardware always writes one or two bytes in the index portion of an indexed transfer. Make sure the message we send as the index doesn't have a zero length. Cc: sta...@vger.kernel.org Cc: Daniel Kurtz Cc: Chris Wilson

[Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

From: Ville Syrjälä We're supposed to examine msgs[i] and msgs[i+1] to see if they form a pair suitable for an indexed transfer. But in reality we're examining msgs[0] and msgs[1]. Fix this. Cc: sta...@vger.kernel.org Cc: Daniel Kurtz Cc:

[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/kms_vblank: Add test to ensure DRM_CAP_CRTC_IN_VBLANK_EVENT works correctly

== Series Details == Series: tests/kms_vblank: Add test to ensure DRM_CAP_CRTC_IN_VBLANK_EVENT works correctly URL : https://patchwork.freedesktop.org/series/34299/ State : failure == Summary == Series 34299 revision 1 was fully merged or fully failed: no git log

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: More plane clipping polish

== Series Details == Series: drm: More plane clipping polish URL : https://patchwork.freedesktop.org/series/34323/ State : success == Summary == Series 34323v1 drm: More plane clipping polish https://patchwork.freedesktop.org/api/1.0/series/34323/revisions/1/mbox/ Test kms_pipe_crc_basic:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation

== Series Details == Series: series starting with [1/3] tests/kms_color: Rename pipe tests to standard notation URL : https://patchwork.freedesktop.org/series/34287/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4

[Intel-gfx] [PATCH 15/15] drm: Don't pass clip to drm_atomic_helper_check_plane_state()

From: Ville Syrjälä Move the plane clip rectangle handling into drm_atomic_helper_check_plane_state(). Drivers no longer have to worry about such mundane details. Cc: Laurent Pinchart Cc: Daniel Vetter

[Intel-gfx] [PATCH 13/15] drm/vmwgfx: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 10/15] drm/nouveau/kms/nv50: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move

[Intel-gfx] [PATCH 09/15] drm/msm/mdp5: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 12/15] drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move

[Intel-gfx] [PATCH 14/15] drm/zte: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 08/15] drm/meson: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move

[Intel-gfx] [PATCH 11/15] drm/rockchip: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 06/15] drm/imx: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 07/15] drm/mediatek: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move

[Intel-gfx] [PATCH 02/15] drm/i915: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes since pipe_src_w/h are already filled via drm_mode_get_hv_timing(). Once everyone agrees on this we can move the clip handling into

[Intel-gfx] [PATCH 05/15] drm/simple_kms_helper: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 03/15] drm/arm/hdlcd: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 04/15] drm/arm/mali-dp: Use drm_mode_get_hv_timing() to populate plane clip rectangle

From: Ville Syrjälä Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane

[Intel-gfx] [PATCH 00/15] drm: More plane clipping polish

From: Ville Syrjälä This series first unifies all users of drm_atomic_helper_check_plane_state() to populate the clip rectangle with drm_mode_get_hv_timing(), and once everything is unified the clip rectangle handling is sucked into

[Intel-gfx] [PATCH 01/15] drm/i915: Reject odd pipe source width with double wide/dual link

From: Ville Syrjälä In order to guarantee that pipe_src_w/h matches the user mode h/vdisplay we must not adjust pipe_src_w to accommodate double wide/dual link. Instead just reject the mode outright. This will allows us to rely on crtc_state->mode for plane

[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Bump measuring duration for semaphores as well

== Series Details == Series: tests/perf_pmu: Bump measuring duration for semaphores as well URL : https://patchwork.freedesktop.org/series/34285/ State : failure == Summary == Series 34285 revision 1 was fully merged or fully failed: no git log ___

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays

== Series Details == Series: series starting with [1/3] igt/perf_pmu: Reduce arbitrary delays URL : https://patchwork.freedesktop.org/series/34271/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

== Series Details == Series: drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h URL : https://patchwork.freedesktop.org/series/34319/ State : failure == Summary == Series 34319v1 drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

== Series Details == Series: series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness URL : https://patchwork.freedesktop.org/series/34246/ State : success == Summary == Test kms_flip: Subgroup blt-flip-vs-panning-interruptible:

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)

On Thu, Nov 23, 2017 at 04:27:49PM +, Chris Wilson wrote: > Broadwater and the rest of gen4 do support being able to saving and > reloading context specific registers between contexts, providing isolation > of the basic GPU state (as programmable by userspace). This allows > userspace to

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

On Thu, 23 Nov 2017 18:42:13 +0100, Chris Wilson wrote: We pretend the PMU config id is a pointer value when encoding it into the device parameters for presentation via sysfs. This requires casting of an unsigned long into and out of the pointer member, which annoys

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Hide the (unsigned long)ptr cast

== Series Details == Series: drm/i915/pmu: Hide the (unsigned long)ptr cast URL : https://patchwork.freedesktop.org/series/34318/ State : success == Summary == Series 34318v1 drm/i915/pmu: Hide the (unsigned long)ptr cast

[Intel-gfx] [RFC] drm/i915/guc: Rename i915_guc_reg.h to intel_guc_reg.h

We are using intel_ prefix for all filenames with hardware related definitions. GuC registers also fall into this category. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Sagar Arun

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

Quoting Ville Syrjälä (2017-11-23 17:50:50) > On Thu, Nov 23, 2017 at 07:46:23PM +0200, Ville Syrjälä wrote: > > On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote: > > > Ironlake does support being able to saving and reloading context specific > > > registers between contexts, providing

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

Quoting Ville Syrjälä (2017-11-23 17:46:23) > On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote: > > Ironlake does support being able to saving and reloading context specific > > registers between contexts, providing isolation of the basic GPU state > > (as programmable by userspace).

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Stop peeking at intel_mmio registers

== Series Details == Series: igt/perf_pmu: Stop peeking at intel_mmio registers URL : https://patchwork.freedesktop.org/series/34268/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

On Thu, Nov 23, 2017 at 07:46:23PM +0200, Ville Syrjälä wrote: > On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote: > > Ironlake does support being able to saving and reloading context specific > > registers between contexts, providing isolation of the basic GPU state > > (as

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches

== Series Details == Series: series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches URL : https://patchwork.freedesktop.org/series/34312/ State : success == Summary == Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

On Thu, Nov 23, 2017 at 04:27:48PM +, Chris Wilson wrote: > Ironlake does support being able to saving and reloading context specific > registers between contexts, providing isolation of the basic GPU state > (as programmable by userspace). This allows userspace to assume that the > GPU

[Intel-gfx] [PATCH] drm/i915/pmu: Hide the (unsigned long)ptr cast

We pretend the PMU config id is a pointer value when encoding it into the device parameters for presentation via sysfs. This requires casting of an unsigned long into and out of the pointer member, which annoys smatch: drivers/gpu/drm/i915/i915_pmu.c:684 i915_pmu_event_show() warn: argument 3 to

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Bump batch_duration for legacy sampling inaccuracy

== Series Details == Series: igt/perf_pmu: Bump batch_duration for legacy sampling inaccuracy URL : https://patchwork.freedesktop.org/series/34263/ State : failure == Summary == Series 34263 revision 1 was fully merged or fully failed: no git log

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev3)

== Series Details == Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev3) URL : https://patchwork.freedesktop.org/series/31407/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump

[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/perf_pmu: Make the invalid-init failure place more obvious

== Series Details == Series: tests/perf_pmu: Make the invalid-init failure place more obvious URL : https://patchwork.freedesktop.org/series/34255/ State : failure == Summary == Series 34255 revision 1 was fully merged or fully failed: no git log

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/perf_pmu: Reduce arbitrary delays

== Series Details == Series: igt/perf_pmu: Reduce arbitrary delays URL : https://patchwork.freedesktop.org/series/34253/ State : success == Summary == IGT patchset tested on top of latest successful build a1e444f4c8178acb590d41c21e921c6447668be4 tests/perf_pmu: Bump measuring duration for

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev7)

== Series Details == Series: igt/gem_ctx_isolation: Check isolation of registers between contexts (rev7) URL : https://patchwork.freedesktop.org/series/32531/ State : success == Summary == Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Avoid underflow in measured_sleep()

== Series Details == Series: igt/perf_pmu: Avoid underflow in measured_sleep() URL : https://patchwork.freedesktop.org/series/34252/ State : failure == Summary == Series 34252 revision 1 was fully merged or fully failed: no git log ___ Intel-gfx

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/perf_pmu: Protect macro args

== Series Details == Series: igt/perf_pmu: Protect macro args URL : https://patchwork.freedesktop.org/series/34251/ State : failure == Summary == Series 34251 revision 1 was fully merged or fully failed: no git log ___ Intel-gfx mailing list

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] igt/perf_pmu: Clear errno in between invalid atrr tests

== Series Details == Series: series starting with [1/2] igt/perf_pmu: Clear errno in between invalid atrr tests URL : https://patchwork.freedesktop.org/series/34249/ State : failure == Summary == Series 34249 revision 1 was fully merged or fully failed: no git log

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5)

== Series Details == Series: series starting with [1/3] drm/i915: Enable render context support for Ironlake (gen5) URL : https://patchwork.freedesktop.org/series/34315/ State : success == Summary == Series 34315v1 series starting with [1/3] drm/i915: Enable render context support for

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] intel-gpu-overlay: Add queued stat

== Series Details == Series: series starting with [1/2] intel-gpu-overlay: Add queued stat URL : https://patchwork.freedesktop.org/series/34228/ State : warning == Summary == Test kms_flip: Subgroup wf_vblank-ts-check-interruptible: pass -> SKIP (shard-hsw)

[Intel-gfx] [PATCH 1/3] drm/i915: Enable render context support for Ironlake (gen5)

Ironlake does support being able to saving and reloading context specific registers between contexts, providing isolation of the basic GPU state (as programmable by userspace). This allows userspace to assume that the GPU retains their state from one batch to the next, minimising the amount of

[Intel-gfx] [PATCH 2/3] drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)

Broadwater and the rest of gen4 do support being able to saving and reloading context specific registers between contexts, providing isolation of the basic GPU state (as programmable by userspace). This allows userspace to assume that the GPU retains their state from one batch to the next,

[Intel-gfx] [PATCH 3/3] drm/i915: Remove unsafe i915.enable_rc6

It has been many years since the last confirmed sighting (and fix) of an RC6 related bug (usually a system hang). Remove the parameter to stop users from setting dangerous values, as they often set it during triage and end up disabling the entire runtime pm instead (the option is not a fine

[Intel-gfx] ✓ Fi.CI.IGT: success for kms_plane: Enumerate outputs before planes

== Series Details == Series: kms_plane: Enumerate outputs before planes URL : https://patchwork.freedesktop.org/series/34190/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test kms_flip: Subgroup

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

== Series Details == Series: series starting with [1/3] igt/perf_pmu: Idle the GPU before starting to measure busyness URL : https://patchwork.freedesktop.org/series/34246/ State : success == Summary == IGT patchset tested on top of latest successful build

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

Quoting Patchwork (2017-11-23 16:05:02) > == Series Details == > > Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge > URL : https://patchwork.freedesktop.org/series/34304/ > State : success > > == Summary == > > Test drv_module_reload: > Subgroup

Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

Quoting Chris Wilson (2017-11-23 16:02:20) > Quoting Tvrtko Ursulin (2017-11-23 13:37:30) > > > > On 23/11/2017 08:22, Chris Wilson wrote: > > > Make sure the HW is idle before we start sampling the GPU for busyness. > > > If we do not rest for long enough between tests, we may carry the > > >

Re: [Intel-gfx] [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format

On Thu, Nov 23, 2017 at 04:56:56PM +0800, Tina Zhang wrote: > The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in > windows. The float format in each component is 1:5:10 MSb-sign:exponent: > fraction. > > This patch is to introduce the format to drm, so that the windows

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

== Series Details == Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge URL : https://patchwork.freedesktop.org/series/34304/ State : success == Summary == Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS

Re: [Intel-gfx] [PATCH igt 3/3] igt/perf_pmu: Idle the GPU before starting to measure busyness

Quoting Tvrtko Ursulin (2017-11-23 13:37:30) > > On 23/11/2017 08:22, Chris Wilson wrote: > > Make sure the HW is idle before we start sampling the GPU for busyness. > > If we do not rest for long enough between tests, we may carry the > > sampling over. > > I'd rather not have this since as I

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftests: rein in igt_write_huge

== Series Details == Series: series starting with [1/2] drm/i915/selftests: rein in igt_write_huge URL : https://patchwork.freedesktop.org/series/34302/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test

Re: [Intel-gfx] [PATCH i-g-t] i-g-t: kms_plane_scaling: Enhanced scaling tests

On 22.11.2017 10:15, Vidya Srinivas wrote: From: Jyoti Yadav Added subtests to cover below gaps. 1. scaler with pixelformat and tiling. 2. scaler with rotation 3. scaler with multiple planes 4. scaler with multi pipe 5. scaler

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/pmu: Remove conditional HOTPLUG_CPU registration

== Series Details == Series: series starting with [1/2] drm/i915/pmu: Remove conditional HOTPLUG_CPU registration URL : https://patchwork.freedesktop.org/series/34300/ State : success == Summary == Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches

== Series Details == Series: series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches URL : https://patchwork.freedesktop.org/series/34312/ State : success == Summary == Series 34312v1 series starting with [CI,1/2] drm/i915: Unwind incomplete legacy context switches

  1   2   3   >