Re: [Intel-gfx] [PATCH v3] drm/i915: Use exponential backoff for wait_for()

On 11/30/2017 12:45 PM, John Harrison wrote: On 11/29/2017 10:19 PM, Sagar Arun Kamble wrote: On 11/30/2017 8:34 AM, John Harrison wrote: On 11/24/2017 6:12 AM, Chris Wilson wrote: Quoting Michał Winiarski (2017-11-24 12:37:56) Since we see the effects for GuC preeption, let's gather some

Re: [Intel-gfx] [RFC PATCH 0/6] drm/i915: Implement HDCP

On Wed, Nov 29, 2017 at 10:08:55PM -0500, Sean Paul wrote: > Here's the RFC for my i915 HDCP patchset. The UABI is based on what we've been > using in Chrome for the past 3 years. I posted the property to the list back > then, but never had a mainline driver to implement it. I do now :-) > >

Re: [Intel-gfx] [PATCH 2/2] lockdep: Up MAX_LOCKDEP_CHAINS

On Wed, Nov 29, 2017 at 04:41:45PM +0100, Daniel Vetter wrote: > cross-release ftl > > From Chris: > > "Fwiw, this isn't cross-release but us reloading the module many times, > creating a whole host of new lockclasses. Even more fun is when the > module gets a slightly different address and the

[Intel-gfx] [PULL] drm-misc-fixes

Hi Dave, drm-misc-fixes-2017-11-30: drm-misc-fixes for -rc2 - big pile of bridge driver (mostly tc358767), all handled by Archit and Andrez - rockchip dsi fix - atomic helper regression fix for spurious -EBUSY (Maarten) - fix deferred fbdev fallout (Maarten) Also backmerged -rc1 because I

Re: [Intel-gfx] [PATCH v3] drm/i915: Use exponential backoff for wait_for()

On 11/29/2017 10:19 PM, Sagar Arun Kamble wrote: On 11/30/2017 8:34 AM, John Harrison wrote: On 11/24/2017 6:12 AM, Chris Wilson wrote: Quoting Michał Winiarski (2017-11-24 12:37:56) Since we see the effects for GuC preeption, let's gather some evidence. (SKL) intel_guc_send_mmio latency:

Re: [Intel-gfx] [PATCH v3] drm/i915: Use exponential backoff for wait_for()

On 11/30/2017 8:34 AM, John Harrison wrote: On 11/24/2017 6:12 AM, Chris Wilson wrote: Quoting Michał Winiarski (2017-11-24 12:37:56) Since we see the effects for GuC preeption, let's gather some evidence. (SKL) intel_guc_send_mmio latency: 100 rounds of gem_exec_latency --r '*-preemption'

[Intel-gfx] [RFC PATCH 6/6] drm/i915: Implement HDCP for DisplayPort

This patch adds HDCP support for DisplayPort connectors by implementing the intel_hdcp_shim. Most of this is straightforward read/write from/to DPCD registers. One thing worth pointing out is the Aksv output bit. It wasn't easily separable like it's HDMI counterpart, so it's crammed in with the

[Intel-gfx] [RFC PATCH 4/6] drm/i915: Add function to output Aksv over GMBUS

Once the Aksv is available in the PCH, we need to get it on the wire to the receiver via DDC. The hardware doesn't allow us to read the value directly, so we need to tell GMBUS to source the Aksv internally and send it to the right offset on the receiver. The way we do this is to initiate an

[Intel-gfx] [RFC PATCH 3/6] drm/i915: Add HDCP framework + base implementation

This patch adds the framework required to add HDCP support to intel connectors. It implements Aksv loading from fuse, and parts 1/2/3 of the HDCP authentication scheme. Note that without shim implementations, this does not actually implement HDCP. That will come in subsequent patches.

[Intel-gfx] [RFC PATCH 5/6] drm/i915: Implement HDCP for HDMI

This patch adds HDCP support for HDMI connectors by implementing the intel_hdcp_shim. Nothing too special, just a bunch of DDC reads/writes. Signed-off-by: Sean Paul --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 50

[Intel-gfx] [RFC PATCH 2/6] drm: Add some HDCP related #defines

In preparation for implementing HDCP in i915, add some HDCP related register offsets and defines. The dpcd register offsets will go in drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff will get stuffed in drm_hdcp.h, which is new. Signed-off-by: Sean Paul

[Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property

This patch adds a new optional connector property to allow userspace to enable protection over the content it is displaying. This will typically be implemented by the driver using HDCP. The property is a tri-state with the following values: - OFF: Self explanatory, no content protection -

[Intel-gfx] [RFC PATCH 0/6] drm/i915: Implement HDCP

Here's the RFC for my i915 HDCP patchset. The UABI is based on what we've been using in Chrome for the past 3 years. I posted the property to the list back then, but never had a mainline driver to implement it. I do now :-) Things are mostly in place, danvet gave me some feedback that I will

Re: [Intel-gfx] [PATCH v3] drm/i915: Use exponential backoff for wait_for()

On 11/24/2017 6:12 AM, Chris Wilson wrote: Quoting Michał Winiarski (2017-11-24 12:37:56) Since we see the effects for GuC preeption, let's gather some evidence. (SKL) intel_guc_send_mmio latency: 100 rounds of gem_exec_latency --r '*-preemption' drm-tip: usecs : count

Re: [Intel-gfx] [PATCH 1/2] drm/i915: follow single notation for workaround number

On Wed, Nov 29, 2017 at 11:53:16PM +, De Marchi, Lucas wrote: > On Wed, 2017-11-29 at 15:44 -0800, Rodrigo Vivi wrote: > > On Tue, Nov 28, 2017 at 09:08:19PM +, Lucas De Marchi wrote: > > > Cc: Ville Syrjälä > > > Signed-off-by: Lucas De Marchi

Re: [Intel-gfx] [PATCH 1/2] drm/i915: follow single notation for workaround number

On Wed, 2017-11-29 at 15:44 -0800, Rodrigo Vivi wrote: > On Tue, Nov 28, 2017 at 09:08:19PM +, Lucas De Marchi wrote: > > Cc: Ville Syrjälä > > Signed-off-by: Lucas De Marchi > > --- > > drivers/gpu/drm/i915/intel_display.c | 2 +- > >

Re: [Intel-gfx] [PATCH v4] drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too

On Tue, Nov 28, 2017 at 02:45:05PM +, Valtteri Rantala wrote: > Testing the texture read performance shows that the same tuning for > the SQ credits is needed on GLK as on BXT/APL. This has been also > confirmed by Altug from the HW team. > > V4: Rebase + fix > Signed-off-by: Valtteri Rantala

Re: [Intel-gfx] [PATCH 2/2] drm/i915: add platform tag to WA

On Tue, Nov 28, 2017 at 09:08:20PM +, Lucas De Marchi wrote: > Cc: Ville Syrjälä > Signed-off-by: Lucas De Marchi > --- > drivers/gpu/drm/i915/intel_hdmi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

Re: [Intel-gfx] [PATCH 1/2] drm/i915: follow single notation for workaround number

On Tue, Nov 28, 2017 at 09:08:19PM +, Lucas De Marchi wrote: > Cc: Ville Syrjälä > Signed-off-by: Lucas De Marchi > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > drivers/gpu/drm/i915/intel_hdmi.c| 2 +- >

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Don't add the "force audio" property to DP connectors that don't support audio

On Wed, Nov 29, 2017 at 04:43:02PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > No point in adding the "force audio" property to DP connectors > that don't support audio (g4x or port A). It makes sense... but the lack of the property there couldn't break

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Fix has_audio readout for DDI A

On Wed, Nov 29, 2017 at 04:43:03PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Transcoder EDP does not support audio. Let's not try to > read the state of the audio enable bit HSW_AUD_PIN_ELD_CP_VLD > based on the pipe when using transcoder EDP. > >

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Disable DP audio for g4x

On Wed, Nov 29, 2017 at 04:43:01PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Apparently g4x doesn't support audio over DP. Bspec lists the > bit as "Reserved for Audio Output Enable", and empirical evidence > tells us that the bit won't stick. So stop

Re: [Intel-gfx] [PATCH] drm/i915: Interlaced DP output doesn't work on VLV/CHV

On Wed, Nov 29, 2017 at 06:08:47PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Reject interlaced modes on VLV/CHV DP outputs. This simply does > not work correctly in the hardware. We do get some output, but > it's quite corrupted. > > The available

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

On Wed, Nov 29, 2017 at 10:22:11PM +, Srivatsa, Anusha wrote: > > > >-Original Message- > >From: Kamble, Sagar A > >Sent: Wednesday, November 29, 2017 8:19 AM > >To: intel-gfx@lists.freedesktop.org > >Cc: Kamble, Sagar A ; Mcgee, Jeff >

Re: [Intel-gfx] [PATCH V3 22/29] [media] atomisp: deprecate pci_get_bus_and_slot()

Hi Sinan, On Mon, Nov 27, 2017 at 11:57:59AM -0500, Sinan Kaya wrote: > diff --git > a/drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c > b/drivers/staging/media/atomisp/platform/intel-mid/intel_mid_pcihelpers.c > index 4631b1d..51dcef57 100644 > ---

Re: [Intel-gfx] [GIT pull] x86 APIC updates for 4.15

Hey, Op 13-11-17 om 13:05 schreef Thomas Gleixner: > Linus, > > please pull the latest x86-apic-for-linus git tree from: > >git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git > x86-apic-for-linus > > This update provides a major overhaul of the APIC initialization and vector >

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33

>-Original Message- >From: Kamble, Sagar A >Sent: Wednesday, November 29, 2017 8:19 AM >To: intel-gfx@lists.freedesktop.org >Cc: Kamble, Sagar A ; Mcgee, Jeff >; Spotswood, John A ; >Srivatsa, Anusha

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_eio: Test we can suspend when the driver is already wedged

== Series Details == Series: igt/gem_eio: Test we can suspend when the driver is already wedged URL : https://patchwork.freedesktop.org/series/34663/ State : success == Summary == Blacklisted hosts: shard-apltotal:2663 pass:1683 dwarn:3 dfail:2 fail:26 skip:948 time:13579s

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29

>-Original Message- >From: Kamble, Sagar A >Sent: Wednesday, November 29, 2017 8:19 AM >To: intel-gfx@lists.freedesktop.org >Cc: Kamble, Sagar A ; Mcgee, Jeff >; Spotswood, John A ; >Srivatsa, Anusha

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

>-Original Message- >From: Kamble, Sagar A >Sent: Wednesday, November 29, 2017 8:19 AM >To: intel-gfx@lists.freedesktop.org >Cc: Kamble, Sagar A ; Mcgee, Jeff >; Spotswood, John A ; >Srivatsa, Anusha

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_eio: Test we can suspend when the driver is already wedged

== Series Details == Series: igt/gem_eio: Test we can suspend when the driver is already wedged URL : https://patchwork.freedesktop.org/series/34663/ State : success == Summary == IGT patchset tested on top of latest successful build 62b7723e6bed126be4950223593a6fd3395c58a6

[Intel-gfx] [PATCH igt] igt/gem_eio: Test we can suspend when the driver is already wedged

Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Joonas Lahtinen --- tests/gem_eio.c | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tests/gem_eio.c b/tests/gem_eio.c

Re: [Intel-gfx] [PATCH] drm/i915: Skip switch-to-kernel-context on suspend when wedged

Quoting Chris Wilson (2017-11-29 19:53:54) > If the HW is already wedged, attempting to submit a request will > generate an -EIO. If we tried this during suspend, we would abort > whereas all we want to do is to go sleep and throw away the corrupt > state. > > Fixes: 5ab57c702069 ("drm/i915:

[Intel-gfx] [PATCH] drm/i915: Skip switch-to-kernel-context on suspend when wedged

If the HW is already wedged, attempting to submit a request will generate an -EIO. If we tried this during suspend, we would abort whereas all we want to do is to go sleep and throw away the corrupt state. Fixes: 5ab57c702069 ("drm/i915: Flush logical context image out to memory upon suspend")

Re: [Intel-gfx] [PATCH i-g-t] igt/kms_rotation_crc: Add horizontal flip subtest.

>-Original Message- >From: Latvala, Petri >Sent: Wednesday, November 29, 2017 1:55 AM >To: Srivatsa, Anusha >Cc: intel-gfx@lists.freedesktop.org; Joseph Garvey ; >Ville Syrjälä ; Hiler, Arkadiusz

Re: [Intel-gfx] [PATCH] drm/i915: Avoid PPS HW/SW state mismatch due to rounding

On Wed, Nov 29, 2017 at 08:04:31PM +0200, Ville Syrjälä wrote: > On Wed, Nov 29, 2017 at 07:51:37PM +0200, Imre Deak wrote: > > We store a SW state of the t11_t12 timing in 100usec units but have to > > program it in 100msec as required by HW. The rounding used during > > programming means there

[Intel-gfx] [PATCH] drm/i915: Interlaced DP output doesn't work on VLV/CHV

From: Ville Syrjälä Reject interlaced modes on VLV/CHV DP outputs. This simply does not work correctly in the hardware. We do get some output, but it's quite corrupted. The available documentation fails to mention this fact. I contacted some hardware people who

Re: [Intel-gfx] [PATCH] drm/i915: Avoid PPS HW/SW state mismatch due to rounding

On Wed, Nov 29, 2017 at 07:51:37PM +0200, Imre Deak wrote: > We store a SW state of the t11_t12 timing in 100usec units but have to > program it in 100msec as required by HW. The rounding used during > programming means there will be a mismatch between the SW and HW states > of this value

[Intel-gfx] [PATCH] drm/i915: Avoid PPS HW/SW state mismatch due to rounding

We store a SW state of the t11_t12 timing in 100usec units but have to program it in 100msec as required by HW. The rounding used during programming means there will be a mismatch between the SW and HW states of this value triggering a "PPS state mismatch" error. Avoid this by storing the already

[Intel-gfx] ✓ Fi.CI.IGT: success for lib: Check and report if a subtest triggers a new kernel taint

== Series Details == Series: lib: Check and report if a subtest triggers a new kernel taint URL : https://patchwork.freedesktop.org/series/34616/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2610 pass:1501 dwarn:3 dfail:1 fail:9 skip:1095 time:8916s shard-snb

Re: [Intel-gfx] [PATCH v4] drm/i915: Restore GT performance in headless mode with DMC loaded

On Wed, Nov 29, 2017 at 03:21:23PM +, Tvrtko Ursulin wrote: > > On 29/11/2017 15:06, Imre Deak wrote: > > On Wed, Nov 29, 2017 at 02:30:30PM +, Tvrtko Ursulin wrote: > > > From: Tvrtko Ursulin > > > > > > It seems that the DMC likes to transition between the DC

Re: [Intel-gfx] [PATCH V3 00/29] PCI: deprecate pci_get_bus_and_slot()

Hi Sinan, On Mon, Nov 27, 2017 at 11:57:37AM -0500, Sinan Kaya wrote: > Deprecate pci_get_bus_and_slot() in favor of pci_get_domain_bus_and_slot() > in order to remove domain 0 assumptions in the kernel. > > pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as > where a PCI

[Intel-gfx] [PATCH 3/3] drm/i915: Fix has_audio readout for DDI A

From: Ville Syrjälä Transcoder EDP does not support audio. Let's not try to read the state of the audio enable bit HSW_AUD_PIN_ELD_CP_VLD based on the pipe when using transcoder EDP. While at it make the function static and flatten it. Signed-off-by: Ville

[Intel-gfx] [PATCH 1/3] drm/i915: Disable DP audio for g4x

From: Ville Syrjälä Apparently g4x doesn't support audio over DP. Bspec lists the bit as "Reserved for Audio Output Enable", and empirical evidence tells us that the bit won't stick. So stop trying to enable DP audio on g4x. Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH 2/3] drm/i915: Don't add the "force audio" property to DP connectors that don't support audio

From: Ville Syrjälä No point in adding the "force audio" property to DP connectors that don't support audio (g4x or port A). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_dp.c | 5 - 1 file changed, 4

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with lockdep: finer-grained completion key for kthread (rev2)

On Wed, Nov 29, 2017 at 11:59:23AM -, Patchwork wrote: > == Series Details == > > Series: series starting with lockdep: finer-grained completion key for > kthread (rev2) > URL : https://patchwork.freedesktop.org/series/34603/ > State : success > > == Summary == > > Series 34603v2 series

[Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29

This patch makes v9.29 firmware as default firmware for BXT. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version

[Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39

This patch makes v9.39 firmware as default firmware for KBL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version

[Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33

This patch makes v9.33 firmware as default firmware for SKL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version

[Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) merged now in linux-firmware.git, let us update the default firmware versions. Cc: Spotswood John A Cc: Anusha Srivatsa Cc: Michal Wajdeczko Cc: Rodrigo

Re: [Intel-gfx] [PATCH] MAINTAINERS: Remove Jani as drm-misc co-maintainer

2017-11-24 Sean Paul : > On Thu, Nov 23, 2017, 7:12 AM Jani Nikula wrote: > > > I'm juggling too many things, and drm-misc maintenance is one that I > > keep dropping on the floor. Admit reality and remove myself as > > maintainer. This still leaves

[Intel-gfx] ✗ Fi.CI.BAT: failure for meson: build a full dependency for lib_igt_perf

== Series Details == Series: meson: build a full dependency for lib_igt_perf URL : https://patchwork.freedesktop.org/series/34618/ State : failure == Summary == Applying: meson: build a full dependency for lib_igt_perf Patch failed at 0001 meson: build a full dependency for lib_igt_perf The

[Intel-gfx] ✗ Fi.CI.BAT: failure for meson: build a full dependency for lib_igt_perf

== Series Details == Series: meson: build a full dependency for lib_igt_perf URL : https://patchwork.freedesktop.org/series/34618/ State : failure == Summary == Applying: meson: build a full dependency for lib_igt_perf Patch failed at 0001 meson: build a full dependency for lib_igt_perf The

[Intel-gfx] ✗ Fi.CI.BAT: failure for meson: build a full dependency for lib_igt_perf

== Series Details == Series: meson: build a full dependency for lib_igt_perf URL : https://patchwork.freedesktop.org/series/34618/ State : failure == Summary == Applying: meson: build a full dependency for lib_igt_perf Patch failed at 0001 meson: build a full dependency for lib_igt_perf The

Re: [Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL

>-Original Message- >From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com] >Sent: Tuesday, November 28, 2017 11:11 PM >To: Kamble, Sagar A ; intel- >g...@lists.freedesktop.org >Cc: Spotswood, John A ; Srivatsa, Anusha

[Intel-gfx] ✗ Fi.CI.BAT: failure for meson: build a full dependency for lib_igt_perf

== Series Details == Series: meson: build a full dependency for lib_igt_perf URL : https://patchwork.freedesktop.org/series/34618/ State : failure == Summary == Series 34618 revision 1 was fully merged or fully failed: no git log ___ Intel-gfx

Re: [Intel-gfx] [PATCH i-g-t 2/2] Revert "lib/igt_aux: Make procps optional"

On Wed, Nov 29, 2017 at 03:24:41PM +0200, Arkadiusz Hiler wrote: > On Wed, Nov 29, 2017 at 12:07:06PM +0100, Daniel Vetter wrote: > > On Fri, Nov 24, 2017 at 05:17:48PM +0200, Arkadiusz Hiler wrote: > > > This reverts commit d7d3f4e87b827152f00bdf89a67871736672b492 > > > and gets rid of the config

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Pass crtc state to intel_pipe_{enable, disable}()

Quoting Ville Syrjala (2017-11-29 15:37:32) > From: Ville Syrjälä > > Get rid of the crtc->config usages from within > intel_pipe_{enable,disable}() by passing in the appropriate > crtc state. > > Signed-off-by: Ville Syrjälä Looks

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Wait for pipe to start on i830 as well

Quoting Ville Syrjala (2017-11-29 15:37:31) > From: Ville Syrjälä > > We should make sure the pipe has fully started when we enable it from > the i830 "power well". Otherwise theoretically i830 could also hit > problems with vblank timestamps jumping around (since

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Fix vblank timestamp/frame counter jumps on gen2

Quoting Ville Syrjala (2017-11-29 15:37:30) > From: Ville Syrjälä > > Previously I was under the impression that the scanline counter > reads 0 when the pipe is off. Turns out that's not correct, and > instead the scanline counter simply stops when the pipe stops,

[Intel-gfx] [PATCH 2/2] lockdep: Up MAX_LOCKDEP_CHAINS

cross-release ftl From Chris: "Fwiw, this isn't cross-release but us reloading the module many times, creating a whole host of new lockclasses. Even more fun is when the module gets a slightly different address and the new lock address hashes into an old lock... "I did think about a module-hook

[Intel-gfx] [PATCH 1/2] lockdep: finer-grained completion key for kthread

Ideally we'd create the key through a macro at the real callers and pass it all the way down. This would give us better coverage for cases where a bunch of kthreads are created for the same thing. But this gets the job done meanwhile and unblocks our CI. Refining later on is always possible. v2:

[Intel-gfx] [PATCH 0/2] lockdep cross-release fallout from -rc1

Hi all, -rc1 set our CI on fire with a pile of issues that cross-release highlights. The two patches in this series get things back into working order on our side, so we pulled them into our local branches to unblock CI and drm/i915. But they're ofc far from polished, so pls look at this more as

[Intel-gfx] [PATCH v2 2/3] drm/i915: Wait for pipe to start on i830 as well

From: Ville Syrjälä We should make sure the pipe has fully started when we enable it from the i830 "power well". Otherwise theoretically i830 could also hit problems with vblank timestamps jumping around (since we skip the wait during modeset on i830). Additionally

[Intel-gfx] [PATCH 3/3] drm/i915: Pass crtc state to intel_pipe_{enable, disable}()

From: Ville Syrjälä Get rid of the crtc->config usages from within intel_pipe_{enable,disable}() by passing in the appropriate crtc state. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 76

[Intel-gfx] [PATCH v2 1/3] drm/i915: Fix vblank timestamp/frame counter jumps on gen2

From: Ville Syrjälä Previously I was under the impression that the scanline counter reads 0 when the pipe is off. Turns out that's not correct, and instead the scanline counter simply stops when the pipe stops, and it retains it's last value until the pipe starts

Re: [Intel-gfx] [PATCH v4] drm/i915: Restore GT performance in headless mode with DMC loaded

On 29/11/2017 15:06, Imre Deak wrote: On Wed, Nov 29, 2017 at 02:30:30PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin It seems that the DMC likes to transition between the DC states a lot when there are no connected displays (no active power domains) during

[Intel-gfx] ✗ Fi.CI.BAT: failure for meson: build a full dependency for lib_igt_perf

== Series Details == Series: meson: build a full dependency for lib_igt_perf URL : https://patchwork.freedesktop.org/series/34618/ State : failure == Summary == Series 34618 revision 1 was fully merged or fully failed: no git log ___ Intel-gfx

Re: [Intel-gfx] [PATCH i-g-t 0/2] kms_plane: Enumerate outputs before planes

On Tue, Nov 21, 2017 at 09:52:52PM +0200, Imre Deak wrote: > Enumerate outputs before planes means we can avoid doing an extra > modeset when calculating the reference CRC during the test of each > plane. In addition when testing multiple outputs we can avoid a full > modeset we currently do

Re: [Intel-gfx] [PATCH v4] drm/i915: Restore GT performance in headless mode with DMC loaded

On Wed, Nov 29, 2017 at 02:30:30PM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > It seems that the DMC likes to transition between the DC states a lot when > there are no connected displays (no active power domains) during command > submission. > > This

[Intel-gfx] ✓ Fi.CI.BAT: success for lib: Check and report if a subtest triggers a new kernel taint

== Series Details == Series: lib: Check and report if a subtest triggers a new kernel taint URL : https://patchwork.freedesktop.org/series/34616/ State : success == Summary == IGT patchset tested on top of latest successful build 643dc097156fa9a0ab9286c7c159459cfbe3079e Revert "lib/igt_aux:

Re: [Intel-gfx] [PATCH] drm/fb_helper: Disable all crtc's when initial setup fails.

Op 28-11-17 om 16:13 schreef Thomas Voegtle: > On Tue, 28 Nov 2017, Daniel Vetter wrote: > >> On Tue, Nov 28, 2017 at 12:16:03PM +0100, Maarten Lankhorst wrote: >>> Some drivers like i915 start with crtc's enabled, but with deferred >>> fbcon setup they were no longer disabled as part of fbdev

Re: [Intel-gfx] [PATCH i-g-t 5/5] tools/intel_watermark: Right justify register names

On Wed, Nov 22, 2017 at 11:44:32PM +, Pandiyan, Dhinakaran wrote: > Reviewed-by: Dhinakaran Pandiyan for the > series. Series pushed. Thanks for the review. > > > On Tue, 2017-11-21 at 20:49 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä

[Intel-gfx] [PATCH v4] drm/i915: Restore GT performance in headless mode with DMC loaded

From: Tvrtko Ursulin It seems that the DMC likes to transition between the DC states a lot when there are no connected displays (no active power domains) during command submission. This activity on DC states has a negative impact on the performance of the chip with

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] tests/gem_hangcheck_forcewake: Drop gem_hangcheck_forcewake.c

== Series Details == Series: series starting with [v2,1/3] tests/gem_hangcheck_forcewake: Drop gem_hangcheck_forcewake.c URL : https://patchwork.freedesktop.org/series/34614/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2631 pass:1511 dwarn:2 dfail:0 fail:11

Re: [Intel-gfx] [PATCH] drm/i915: Restore GT performance in headless mode with DMC loaded

On Wed, Nov 29, 2017 at 10:59:27AM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > It seems that the DMC likes to transition between the DC states a lot when > there are no connected displays (no active power domains) during command > submission. > > This

Re: [Intel-gfx] [PATCH] drm/i915: Restore GT performance in headless mode with DMC loaded

On Wed, Nov 29, 2017 at 11:59:04AM +, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2017-11-29 11:53:41) > > > > On 29/11/2017 11:40, Chris Wilson wrote: > > > Quoting Tvrtko Ursulin (2017-11-29 11:34:27) > > >> > > >> On 29/11/2017 11:12, Daniel Vetter wrote: > > >>> I think given that DMC

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Add GuC support for engine busy stats

On 29/11/2017 13:30, Patchwork wrote: == Series Details == Series: series starting with [1/2] drm/i915: Add GuC support for engine busy stats URL : https://patchwork.freedesktop.org/series/34617/ State : failure == Summary == Series 34617v1 series starting with [1/2] drm/i915: Add GuC

Re: [Intel-gfx] [PATCH v10 1/2] drm/i915/guc : Removing enable_guc_loading and enable_guc_submission module parameters

On Wed, 29 Nov 2017 14:40:05 +0100, Sagar Arun Kamble wrote: On 11/29/2017 5:44 PM, Michal Wajdeczko wrote: On Tue, 28 Nov 2017 11:41:57 +0100, Sagar Arun Kamble wrote: On 11/28/2017 1:24 AM, Sujaritha Sundaresan wrote: We

[Intel-gfx] [PATCH v2] drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails

History tells us that if we cannot reset the GPU now, we never will. This then impacts everything that is run subsequently. On failing the reset, we mark the driver as wedged, trying to prevent further execution on the GPU, forcing userspace to fallback to using the CPU to update its framebuffers

[Intel-gfx] [PATCH] drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails

History tells us that if we cannot reset the GPU now, we never will. This then impacts everything that is run subsequently. On failing the reset, we mark the driver as wedged, trying to prevent further execution on the GPU, forcing userspace to fallback to using the CPU to update its framebuffers

Re: [Intel-gfx] [PATCH i-g-t] igt/kms_rotation_crc: Add RGB565 90 degree test for gen>9

On 28.11.2017 13:53, Maarten Lankhorst wrote: Hey, Op 21-11-17 om 15:02 schreef Juha-Pekka Heikkila: Gen10 onwards 90 and 270 degree rotations are supported for RGB565 format. v2 (Ville Syrjälä): As a side effect to keep bad-pixel-format test valid on all supported platforms it need to use

Re: [Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

Quoting Chris Wilson (2017-11-29 12:30:23) > +static const struct kernel_taint { > + const char *msg; > + unsigned int flags; > +} taints[] = { > + { "Non-GPL module loaded" }, > + { "Forced module load" }, > + { "Unsafe SMP processor" }, > + { "Forced module

Re: [Intel-gfx] [PATCH v10 1/2] drm/i915/guc : Removing enable_guc_loading and enable_guc_submission module parameters

On 11/29/2017 5:44 PM, Michal Wajdeczko wrote: On Tue, 28 Nov 2017 11:41:57 +0100, Sagar Arun Kamble wrote: On 11/28/2017 1:24 AM, Sujaritha Sundaresan wrote: We currently have two module parameters that control GuC: "enable_guc_loading" and

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Add GuC support for engine busy stats

== Series Details == Series: series starting with [1/2] drm/i915: Add GuC support for engine busy stats URL : https://patchwork.freedesktop.org/series/34617/ State : failure == Summary == Series 34617v1 series starting with [1/2] drm/i915: Add GuC support for engine busy stats

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with lockdep: finer-grained completion key for kthread (rev2)

== Series Details == Series: series starting with lockdep: finer-grained completion key for kthread (rev2) URL : https://patchwork.freedesktop.org/series/34603/ State : success == Summary == Blacklisted hosts: shard-apltotal:2476 pass:1560 dwarn:10 dfail:8 fail:14 skip:879

Re: [Intel-gfx] [PATCH i-g-t 1/2] igt: Remove Android support

On Fri, 2017-11-24 at 17:17 +0200, Arkadiusz Hiler wrote: > This patch gets rid of the Android support, deleting all the hacks and > moving code around to the places it belongs. > > Android build is not really maintained properly and rots rather fast. > With recent push for Meson here and Android

Re: [Intel-gfx] [PATCH i-g-t 2/2] Revert "lib/igt_aux: Make procps optional"

On Wed, Nov 29, 2017 at 12:07:06PM +0100, Daniel Vetter wrote: > On Fri, Nov 24, 2017 at 05:17:48PM +0200, Arkadiusz Hiler wrote: > > This reverts commit d7d3f4e87b827152f00bdf89a67871736672b492 > > and gets rid of the config option from the meson.build. > > > > It was needed only for the Android

Re: [Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

Quoting Szwichtenberg, Radoslaw (2017-11-29 13:14:52) > On Wed, 2017-11-29 at 12:40 +, Chris Wilson wrote: > > Quoting Chris Wilson (2017-11-29 12:30:23) > > > Checking for a tainted kernel is a convenient way to see if the test > > > generated a critical error such as a oops, or machine

Re: [Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

On Wed, 2017-11-29 at 12:40 +, Chris Wilson wrote: > Quoting Chris Wilson (2017-11-29 12:30:23) > > Checking for a tainted kernel is a convenient way to see if the test > > generated a critical error such as a oops, or machine check. > > > > Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH i-g-t] meson: build a full dependency for lib_igt_perf

meson prefers packages dependencies over passing arount static libraries, because those also include linker flags, include dirs and everything else. While at it pull the special cases out from the common build stanzas like we do with other special cases. Just a bit of ocd to keep everything

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] lib: avoid < in gtkdoc comments

== Series Details == Series: series starting with [1/2] lib: avoid < in gtkdoc comments URL : https://patchwork.freedesktop.org/series/34609/ State : success == Summary == Blacklisted hosts: shard-apltotal:2452 pass:1519 dwarn:28 dfail:15 fail:9 skip:877 time:12292s shard-hsw

[Intel-gfx] [PATCH v2] drm/i915: Fix deadlock in i830_disable_pipe()

From: Ville Syrjälä i830_disable_pipe() gets called from the power well code, and thus we're already holding the power domain mutex. That means we can't call plane->get_hw_state() as it will also try to grab the same mutex and will thus deadlock. Replace the

Re: [Intel-gfx] [PATCH] drm/i915: Fix deadlock in i830_disable_pipe()

On Tue, Nov 28, 2017 at 09:05:00PM +, Chris Wilson wrote: > Quoting Ville Syrjala (2017-11-28 15:48:53) > > From: Ville Syrjälä > > > > i830_disable_pipe() gets called from the power well code, and thus > > we're already holding the power domain mutex. That

Re: [Intel-gfx] [PATCH] drm/i915: Restore GT performance in headless mode with DMC loaded

On Wed, Nov 29, 2017 at 11:34:27AM +, Tvrtko Ursulin wrote: > > On 29/11/2017 11:12, Daniel Vetter wrote: > > On Wed, Nov 29, 2017 at 10:59:27AM +, Tvrtko Ursulin wrote: > > > From: Tvrtko Ursulin > > > > > > It seems that the DMC likes to transition between

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] tests/gem_hangcheck_forcewake: Drop gem_hangcheck_forcewake.c

== Series Details == Series: series starting with [v2,1/3] tests/gem_hangcheck_forcewake: Drop gem_hangcheck_forcewake.c URL : https://patchwork.freedesktop.org/series/34614/ State : success == Summary == IGT patchset tested on top of latest successful build

Re: [Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

Quoting Chris Wilson (2017-11-29 12:30:23) > Checking for a tainted kernel is a convenient way to see if the test > generated a critical error such as a oops, or machine check. > > Signed-off-by: Chris Wilson > Cc: Daniel Vetter > Cc: Radoslaw

[Intel-gfx] [PATCH 1/2] drm/i915: Add GuC support for engine busy stats

From: Tvrtko Ursulin Wire up the engine busy stats accounting to the GuC submission backend. Since there is not context out interrupt we need to place the accounting callbacks per-request in order to correctly pair with user interrupts. v2: Rebase. v3: Commit update.

[Intel-gfx] [PATCH 2/2] drm/i915: HACK enable GuC for testing

From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_params.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index

[Intel-gfx] [PATCH igt] lib: Check and report if a subtest triggers a new kernel taint

Checking for a tainted kernel is a convenient way to see if the test generated a critical error such as a oops, or machine check. Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Radoslaw Szwichtenberg ---

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