Re: [Intel-gfx] [v7,2/7] drm: Add panel orientation quirks, v6.

On 11/25/2017 01:35 PM, Hans de Goede wrote: diff --git a/drivers/gpu/drm/drm_panel_orientation_quirks.c b/drivers/gpu/drm/drm_panel_orientation_quirks.c new file mode 100644 index ..b8765e2ed1d6 --- /dev/null +++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c This file taints

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/915/psr: Set psr.source_ok during atomic_check

== Series Details == Series: drm/915/psr: Set psr.source_ok during atomic_check URL : https://patchwork.freedesktop.org/series/35259/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL

Re: [Intel-gfx] [PATCH] drm/i915: Remove unused IRQ chip data of HDMI LPE audio

> -Original Message- > From: Thomas Gleixner [mailto:t...@linutronix.de] > Sent: Tuesday, December 12, 2017 10:37 PM > To: Anand, Jerome > Cc: Ville Syrjälä ; Chen, Augustine > ;

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/915/psr: Set psr.source_ok during atomic_check

== Series Details == Series: drm/915/psr: Set psr.source_ok during atomic_check URL : https://patchwork.freedesktop.org/series/35259/ State : success == Summary == Series 35259v1 drm/915/psr: Set psr.source_ok during atomic_check

[Intel-gfx] [PATCH] drm/915/psr: Set psr.source_ok during atomic_check

Since commit 4d90f2d507ab ("drm/i915: Start tracking PSR state in crtc state"), we check whether PSR can be enabled or not in psr_compute_config(). Given that the psr.source_ok field is supposed to track this check, set the field in psr_compute_config() as well. Now tests can distinguish between

Re: [Intel-gfx] [PATCH] x86/gpu: add CFL to early quirks

On Tue, Dec 12, 2017 at 1:53 AM, Joonas Lahtinen wrote: > + Jani, who'll continue with -fixes > > On Mon, 2017-12-11 at 13:50 -0800, Lucas De Marchi wrote: >> On Mon, Dec 11, 2017 at 2:26 AM, Joonas Lahtinen >> wrote: >> > On Fri,

[Intel-gfx] ✗ Fi.CI.IGT: warning for igt/gem_shrink: Exercise allocations in the middle of execbuf under oom-pressure

== Series Details == Series: igt/gem_shrink: Exercise allocations in the middle of execbuf under oom-pressure URL : https://patchwork.freedesktop.org/series/35250/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-rgb565-draw-pwrite: pass

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells

== Series Details == Series: drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells URL : https://patchwork.freedesktop.org/series/35252/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/5] drm/i915/guc: Move GuC WOPCM related code into separate files

== Series Details == Series: series starting with [v4,1/5] drm/i915/guc: Move GuC WOPCM related code into separate files URL : https://patchwork.freedesktop.org/series/35255/ State : failure == Summary == Series 35255v1 series starting with [v4,1/5] drm/i915/guc: Move GuC WOPCM related code

[Intel-gfx] [PATCH v4 2/5] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

GuC related exported functions should start with "intel_guc_" prefix and pass intel_guc as the first parameter since its guc related. Current guc_ggtt_offset() failed to follow this code convention. This patch renames the guc_ggtt_offset to intel_guc_ggtt_offset and updates the related code to

[Intel-gfx] [PATCH v4 3/5] drm/i915/guc: Implement dynamic WOPCM partitioning

Hardware may have specific restrictions on GuC WOPCM partition size versus HuC firmware size. With static WOPCM partitioning, there's no way to adjust the GuC WOPCM partition size based on the actual HuC firmware size, so that GuC/HuC loading failure would occur even if there was enough WOPCM

[Intel-gfx] [PATCH v4 5/5] HAX Enable GuC Submission for CI

Signed-off-by: Jackie Li --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 792ce26..9725c5a 100644 ---

[Intel-gfx] [PATCH v4 1/5] drm/i915/guc: Move GuC WOPCM related code into separate files

intel_guc_reg.h should only include definition for GuC registers and related register bits. GuC WOPCM related values should not be defined in intel_guc_reg.h This patch creates a better file structure by moving GuC WOPCM related definitions int to a new header intel_guc_wopcm.h and moving GuC

[Intel-gfx] [PATCH v4 4/5] drm/i915/guc: Add WOPCM partitioning support for CNL

CNL has different WOPCM size and hardware restriction on GuC WOPCM size. This patch returns the correct WOPCM reserved size on CNL and adds the GuC WOPCM size check for CNL. Cc: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: John Spotswood

[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/psr: Dump PSR debugfs contents if PSR entry times out.

== Series Details == Series: tests/psr: Dump PSR debugfs contents if PSR entry times out. URL : https://patchwork.freedesktop.org/series/35254/ State : failure == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_shrink: Exercise allocations in the middle of execbuf under oom-pressure

== Series Details == Series: igt/gem_shrink: Exercise allocations in the middle of execbuf under oom-pressure URL : https://patchwork.freedesktop.org/series/35250/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51

[Intel-gfx] [PATCH i-g-t] tests/psr: Dump PSR debugfs contents if PSR entry times out.

(kms_psr_sink_crc:1717) CRITICAL: Failed assertion: wait_psr_entry() (kms_psr_sink_crc:1717) CRITICAL: Last errno: 25, Inappropriate ioctl for device isn't very useful, the Source_OK field would have indicated that the requirements to enable PSR weren't met in this

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells

== Series Details == Series: drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells URL : https://patchwork.freedesktop.org/series/35252/ State : success == Summary == Series 35252v1 drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells

[Intel-gfx] [PATCH] drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells

The POWER_DOMAIN_INIT bit is already set in _POWERWELL_2_POWER_DOMAINS, which is included in _DC_OFF_POWER_DOMAINS. So, avoid setting that again in _DC_OFF_POWER_DOMAINS and shuffle the macros a bit to make it easy to notice relation. Cc: Imre Deak Signed-off-by: Dhinakaran

[Intel-gfx] [PATCH igt] igt/gem_shrink: Exercise allocations in the middle of execbuf under oom-pressure

Having discovered that we would encounter an indefinite wait in the shrinker within execbuf/request construction, try to exercise that path by emitting lots of execbuf with fences (which require allocation inside request construction) whilst under severe mempressure. Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Dump the engine state before declaring wedged from wait_for_engines()

Quoting Joonas Lahtinen (2017-12-12 13:40:25) > On Mon, 2017-12-11 at 19:41 +, Chris Wilson wrote: > > If wait_for_engines() fails and we resort to declaring the HW wedged, > > dump the engine state for debugging. > > > > Signed-off-by: Chris Wilson > > Cc: Joonas

Re: [Intel-gfx] [PATCH] drm/i915/gvt/fb_decoder: Fix out-of-bounds read

Hi Zhenyu, Quoting Zhenyu Wang : On 2017.12.09 00:37:59 -0600, Gustavo A. R. Silva wrote: In case function skl_format_to_drm returns -EINVAL, fmt turns into a huge number as fmt is of type u32, hence there is an out-of-bounds read when using fmt as an index for array

[Intel-gfx] [CI v2] igt/psr: Test vblank continuity with PSR enabled

PSR allows DMC to put the system to low power states when active, but this can reset the frame counter on some platforms. The frame counter reset leads to a negative diff applied to vblank count. This subtest checks for that. v2: Some optimizations and data type changes. Cc: Rodrigo Vivi

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep

== Series Details == Series: series starting with [1/3] drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep URL : https://patchwork.freedesktop.org/series/35239/ State : success == Summary == Test gem_tiled_swapping: Subgroup non-threaded:

Re: [Intel-gfx] [PATCH i-g-t v2] igt/psr: Test vblank continuity with PSR enabled

On Tue, 2017-12-12 at 09:10 +0200, Ville Syrjälä wrote: > On Mon, Dec 11, 2017 at 06:06:57PM -0800, Dhinakaran Pandiyan wrote: > > PSR allows DMC to put the system to low power states when active, but > > this can reset the frame counter on some platforms. The frame counter reset > > leads to a

[Intel-gfx] ✗ Fi.CI.IGT: warning for igt/tools_test: Check the tools exist before executing

== Series Details == Series: igt/tools_test: Check the tools exist before executing URL : https://patchwork.freedesktop.org/series/35237/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL

[Intel-gfx] ✗ Fi.CI.IGT: warning for igt/drv_module_reload: Reload with full mmio-debugging (rev2)

== Series Details == Series: igt/drv_module_reload: Reload with full mmio-debugging (rev2) URL : https://patchwork.freedesktop.org/series/35218/ State : warning == Summary == Test drv_suspend: Subgroup sysfs-reader-hibernate: fail -> SKIP (shard-snb)

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep

== Series Details == Series: series starting with [1/3] drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep URL : https://patchwork.freedesktop.org/series/35239/ State : success == Summary == Series 35239v1 series starting with [1/3] drm/i915: Mark up potential

[Intel-gfx] [PATCH 1/3] drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep

As kmalloc is allowed to block (if given the right flags), mark up the two i915_sw_fence routines that may call kmalloc as potential sleeping routines. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen

[Intel-gfx] [PATCH 2/3] drm/i915: Allow fence allocations to fail

If a fence allocation fails in a blocking context, we will sleep on the fence as a last resort. We can therefore allow ourselves to fail and sleep on the fence instead of triggering a system-wide oom. This allows us to throttle malicious clients that are consuming lots of system resources by

[Intel-gfx] [PATCH 3/3] drm/i915: Ratelimit request allocation under oom

If we fail to allocate a request, we can reap the outstanding requests and push them to the request's slab's freelist before trying again. This forces us to ratelimit malicious clients that tie up all of the system resources in requests, instead of causing a system-wide oom. Signed-off-by: Chris

[Intel-gfx] ✓ Fi.CI.IGT: success for tests/perf_pmu: Verify engine busyness accuracy

== Series Details == Series: tests/perf_pmu: Verify engine busyness accuracy URL : https://patchwork.freedesktop.org/series/35232/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test kms_flip:

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/tools_test: Check the tools exist before executing

== Series Details == Series: igt/tools_test: Check the tools exist before executing URL : https://patchwork.freedesktop.org/series/35237/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very large

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for igt/drv_module_reload: Reload with full mmio-debugging (rev2)

Quoting Patchwork (2017-12-12 17:17:42) > == Series Details == > > Series: igt/drv_module_reload: Reload with full mmio-debugging (rev2) > URL : https://patchwork.freedesktop.org/series/35218/ > State : success > > == Summary == > > IGT patchset tested on top of latest successful build >

[Intel-gfx] [PATCH igt] igt/tools_test: Check the tools exist before executing

As a simple fail-safe against a bad installation, check the tools exist before testing whether they work. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102935 Signed-off-by: Chris Wilson --- tests/tools_test.c | 23 +++ 1 file changed, 11

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/drv_module_reload: Reload with full mmio-debugging (rev2)

== Series Details == Series: igt/drv_module_reload: Reload with full mmio-debugging (rev2) URL : https://patchwork.freedesktop.org/series/35218/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow

Re: [Intel-gfx] [PATCH] drm/i915: Remove unused IRQ chip data of HDMI LPE audio

On Mon, 11 Dec 2017, Anand, Jerome wrote: > > On Fri, 8 Dec 2017, Ville Syrjälä wrote: > > > > > On Fri, Dec 08, 2017 at 05:33:23PM +0800, Augustine.Chen wrote: > > > > The chip data of HDMI LPE audio is set to drm_i915_private which is > > > > not consistent with the expectation by x86 APIC

[Intel-gfx] [PATCH igt] igt/drv_module_reload: Reload with full mmio-debugging

mmio-debugging is lazy, we only turn on per-access checking after a periodic check to see if an error has been flagged. If we load the module with mmio_debug, we can validate that no such errors occur during module_init, which is one of the trickier times to get right (having to balance

[Intel-gfx] ✗ Fi.CI.IGT: failure for lib/i915_pciids.h: synchronize with kernel header

== Series Details == Series: lib/i915_pciids.h: synchronize with kernel header URL : https://patchwork.freedesktop.org/series/35121/ State : failure == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb) fdo#104009 Test

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] lib/dummyload: Wrap global list inside its own mutex

== Series Details == Series: series starting with [1/2] lib/dummyload: Wrap global list inside its own mutex URL : https://patchwork.freedesktop.org/series/35225/ State : warning == Summary == Warning: bzip IGTPW_654/shard-hsw8/results12.json.bz2 wasn't in correct JSON format Test

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] meson: Don't install headers (rev3)

== Series Details == Series: series starting with [1/6] meson: Don't install headers (rev3) URL : https://patchwork.freedesktop.org/series/35033/ State : failure == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> DMESG-WARN (shard-snb)

Re: [Intel-gfx] [PATCH igt 2/2] lib/core: Don't leak dummyloads between subtests

On 12/12/2017 12:21, Chris Wilson wrote: If a test fails or skips early, it may not clean up after itself. In lieu of having a framework for test deconstructors, hook igt_terminate_spin_batches() into exit_subtest() itself so that we don't allow a recursive batch from an earlier test to leak

Re: [Intel-gfx] [PATCH igt 1/2] lib/dummyload: Wrap global list inside its own mutex

On 12/12/2017 15:35, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-12-12 15:19:03) On 12/12/2017 12:21, Chris Wilson wrote: Give the list a mutex, for we try to iterate over it from many a random context. Isn't it only tests and their exit handlers, so already serialized? No, it can

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()

== Series Details == Series: drm/i915: Don't check #active_requests from i915_gem_wait_for_idle() URL : https://patchwork.freedesktop.org/series/35227/ State : success == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb)

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/drv_module_reload: Reload with full mmio-debugging

== Series Details == Series: igt/drv_module_reload: Reload with full mmio-debugging URL : https://patchwork.freedesktop.org/series/35218/ State : success == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb) fdo#104009 Test

[Intel-gfx] ✗ Fi.CI.IGT: failure for test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc (rev3)

== Series Details == Series: test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc (rev3) URL : https://patchwork.freedesktop.org/series/34749/ State : failure == Summary == Test gem_tiled_swapping: Subgroup non-threaded: pass -> SKIP

Re: [Intel-gfx] [PATCH] docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

> Am 12.12.2017 um 16:23 schrieb Daniel Vetter : > >>> Thanks for your patch, but similar fix is already merged here [1] >>> >>> Michal >>> >>> [1] >>> https://cgit.freedesktop.org/drm-tip/commit/?id=006c23327f8de8575508c458131b304188d426f7 >> >> >> Thanks for pointing out.

Re: [Intel-gfx] [PATCH igt 1/2] lib/dummyload: Wrap global list inside its own mutex

Quoting Tvrtko Ursulin (2017-12-12 15:19:03) > > On 12/12/2017 12:21, Chris Wilson wrote: > > Give the list a mutex, for we try to iterate over it from many a random > > context. > > Isn't it only tests and their exit handlers, so already serialized? No, it can be used from threads as well. >

[Intel-gfx] ✓ Fi.CI.BAT: success for tests/perf_pmu: Verify engine busyness accuracy

== Series Details == Series: tests/perf_pmu: Verify engine busyness accuracy URL : https://patchwork.freedesktop.org/series/35232/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very large bo to

Re: [Intel-gfx] [PATCH] docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

On Tue, Dec 12, 2017 at 01:11:43PM +0100, Markus Heiser wrote: > > > Am 12.12.2017 um 13:05 schrieb Michal Wajdeczko > > : > > > > On Tue, 12 Dec 2017 12:38:37 +0100, Markus Heiser > > wrote: > > > >> With commit d9e2e0143c the

Re: [Intel-gfx] [RFC i-g-t] tests/perf_pmu: Verify engine busyness accuracy

Quoting Tvrtko Ursulin (2017-12-12 15:21:32) > > On 12/12/2017 15:05, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2017-12-12 14:53:00) > >> From: Tvrtko Ursulin > >> > >> A subtest to verify that the engine busyness is reported with expected > >> accuracy on

Re: [Intel-gfx] [RFC i-g-t] tests/perf_pmu: Verify engine busyness accuracy

On 12/12/2017 15:05, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-12-12 14:53:00) From: Tvrtko Ursulin A subtest to verify that the engine busyness is reported with expected accuracy on platforms where the feature is available. We test three patterns: 2%, 50%

Re: [Intel-gfx] [PATCH igt 1/2] lib/dummyload: Wrap global list inside its own mutex

On 12/12/2017 12:21, Chris Wilson wrote: Give the list a mutex, for we try to iterate over it from many a random context. Isn't it only tests and their exit handlers, so already serialized? Should spin batches instead install an exit handler? Regards, Tvrtko Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH v6 0/5] drm/i915: Expose more GPU properties through sysfs

On Tue, Dec 12, 2017 at 11:19:47AM +, Tvrtko Ursulin wrote: > > On 11/12/2017 21:05, Daniel Vetter wrote: > > On Mon, Dec 11, 2017 at 02:38:53PM +, Tvrtko Ursulin wrote: > > > On 11/12/2017 10:50, Joonas Lahtinen wrote: > > > > + Daniel, Chris > > > > > > > > On Thu, 2017-12-07 at 09:21

Re: [Intel-gfx] [RFC i-g-t] tests/perf_pmu: Verify engine busyness accuracy

Quoting Tvrtko Ursulin (2017-12-12 14:53:00) > From: Tvrtko Ursulin > > A subtest to verify that the engine busyness is reported with expected > accuracy on platforms where the feature is available. > > We test three patterns: 2%, 50% and 98% load per engine. > >

[Intel-gfx] [RFC i-g-t] tests/perf_pmu: Verify engine busyness accuracy

From: Tvrtko Ursulin A subtest to verify that the engine busyness is reported with expected accuracy on platforms where the feature is available. We test three patterns: 2%, 50% and 98% load per engine. Problematic part is we also rely on scheduling latencies and the

[Intel-gfx] ✓ Fi.CI.BAT: success for lib/i915_pciids.h: synchronize with kernel header

== Series Details == Series: lib/i915_pciids.h: synchronize with kernel header URL : https://patchwork.freedesktop.org/series/35121/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very large bo

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] lib/dummyload: Wrap global list inside its own mutex

== Series Details == Series: series starting with [1/2] lib/dummyload: Wrap global list inside its own mutex URL : https://patchwork.freedesktop.org/series/35225/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51

Re: [Intel-gfx] [PATCH v6 0/5] drm/i915: Expose more GPU properties through sysfs

On 12/12/17 11:19, Tvrtko Ursulin wrote: On 11/12/2017 21:05, Daniel Vetter wrote: On Mon, Dec 11, 2017 at 02:38:53PM +, Tvrtko Ursulin wrote: On 11/12/2017 10:50, Joonas Lahtinen wrote: + Daniel, Chris On Thu, 2017-12-07 at 09:21 +, Tvrtko Ursulin wrote: On 04/12/2017 15:02,

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] meson: Don't install headers (rev3)

== Series Details == Series: series starting with [1/6] meson: Don't install headers (rev3) URL : https://patchwork.freedesktop.org/series/35033/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow

Re: [Intel-gfx] [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()

Hi, I sent this individual i915 patch to our CI, and it is passing on all platforms: https://patchwork.freedesktop.org/series/34822/ Is it ok if I merge this to drm-tip already? Regards, Joonas On Mon, 2017-11-27 at 13:50 -0500, Sinan Kaya wrote: > +dri-de...@lists.freedesktop.org > > On

Re: [Intel-gfx] [PATCH] drm/i915: Finish i915_gem_wait_for_idle() on the global execution timeline

Quoting Chris Wilson (2017-12-11 21:42:22) > In order to be sure that we catch the most recent request to be > executed, we need to finish on the global execution timeline. This > prevents a race where the request is being transferred between timelines > behind our back, jumping it ahead in the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()

== Series Details == Series: drm/i915: Don't check #active_requests from i915_gem_wait_for_idle() URL : https://patchwork.freedesktop.org/series/35227/ State : success == Summary == Series 35227v1 drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Dump the engine state before declaring wedged from wait_for_engines()

On Mon, 2017-12-11 at 19:41 +, Chris Wilson wrote: > If wait_for_engines() fails and we resort to declaring the HW wedged, > dump the engine state for debugging. > > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen > Cc: Mika

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Bump timeout for wait_for_engines()

On Mon, 2017-12-11 at 19:41 +, Chris Wilson wrote: > Extract the timeout we use in i915_gem_idle_work_handler() and reuse it > for wait_for_engines() in i915_gem_wait_for_idle(). It too has the same > problem in sometimes having to wait for an extended period before the HW > settles, so make

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/drv_module_reload: Reload with full mmio-debugging

== Series Details == Series: igt/drv_module_reload: Reload with full mmio-debugging URL : https://patchwork.freedesktop.org/series/35218/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51 igt/kms_flip: Allow very large

Re: [Intel-gfx] GemniLake laptops goes power off directly after performing suspend

On Fri, Dec 08, 2017 at 10:31:30AM +, Daniel Drake wrote: > Hi, > > Adding intel-gfx list in case i915 developers can help. Updated summary below. > > On Thu, Dec 7, 2017 at 2:14 AM, Chris Chiu wrote: > > On Wed, Dec 6, 2017 at 9:34 PM, Rafael J. Wysocki

Re: [Intel-gfx] [PATCH] drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()

Quoting Chris Wilson (2017-12-12 13:21:48) > i915_gem_wait_for_idle() is called from inside the shrinker, to ensure > that we drain the last resources from the GPU in dire circumstances (OOM). > As we may allocate whilst building a request, it is then possible to hit > the shrinker with a request

[Intel-gfx] [PATCH] drm/i915: Don't check #active_requests from i915_gem_wait_for_idle()

i915_gem_wait_for_idle() is called from inside the shrinker, to ensure that we drain the last resources from the GPU in dire circumstances (OOM). As we may allocate whilst building a request, it is then possible to hit the shrinker with a request under construction, and so we must account for the

[Intel-gfx] ✓ Fi.CI.BAT: success for test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc (rev3)

== Series Details == Series: test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc (rev3) URL : https://patchwork.freedesktop.org/series/34749/ State : success == Summary == IGT patchset tested on top of latest successful build 74407418720ff7a9de7caabec05d4c3afe9a5c51

Re: [Intel-gfx] [PATCH v2] drm/i915: Downgrade misleading "Memory usable" message

On Tue, 2017-12-12 at 11:35 +, Chris Wilson wrote: > It never meant what it said, as it was always the total size of the > Global GTT and not a limit upon memory usage. Originally it served as a > quick guide to the largest batch that could be submitted by userspace, > an approximation to its

[Intel-gfx] ✗ Fi.CI.BAT: failure for docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

== Series Details == Series: docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c URL : https://patchwork.freedesktop.org/series/35221/ State : failure == Summary == Applying: docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c error: Failed to merge in the changes. Using

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Downgrade misleading "Memory usable" message (rev2)

== Series Details == Series: drm/i915: Downgrade misleading "Memory usable" message (rev2) URL : https://patchwork.freedesktop.org/series/32790/ State : failure == Summary == Series 32790v2 drm/i915: Downgrade misleading "Memory usable" message

Re: [Intel-gfx] [PATCH v3 i-g-t] test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

On Tue, Dec 12, 2017 at 02:10:56PM +0200, Arkadiusz Hiler wrote: > On Tue, Dec 12, 2017 at 11:59:13AM +0100, Maarten Lankhorst wrote: > > From: Arkadiusz Hiler > > > > Compiler complained on crc_lowres and crc_hires2 being uninitialized > > and indeed,

Re: [Intel-gfx] [PATCH v2] drm/i915: Downgrade misleading "Memory usable" message

Quoting Matthew Auld (2017-12-12 12:16:14) > On 12 December 2017 at 11:35, Chris Wilson wrote: > > It never meant what it said, as it was always the total size of the > > Global GTT and not a limit upon memory usage. Originally it served as a > > quick guide to the

[Intel-gfx] [PATCH igt 2/2] lib/core: Don't leak dummyloads between subtests

If a test fails or skips early, it may not clean up after itself. In lieu of having a framework for test deconstructors, hook igt_terminate_spin_batches() into exit_subtest() itself so that we don't allow a recursive batch from an earlier test to leak into the next and cause an unexpected GPU

[Intel-gfx] [PATCH igt 1/2] lib/dummyload: Wrap global list inside its own mutex

Give the list a mutex, for we try to iterate over it from many a random context. Signed-off-by: Chris Wilson --- lib/igt_dummyload.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index bb2be557a..d19b4e5ea 100644

Re: [Intel-gfx] [PATCH v2] drm/i915: Downgrade misleading "Memory usable" message

On 12 December 2017 at 11:35, Chris Wilson wrote: > It never meant what it said, as it was always the total size of the > Global GTT and not a limit upon memory usage. Originally it served as a > quick guide to the largest batch that could be submitted by userspace, > an

Re: [Intel-gfx] [PATCH] docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

> Am 12.12.2017 um 13:05 schrieb Michal Wajdeczko : > > On Tue, 12 Dec 2017 12:38:37 +0100, Markus Heiser > wrote: > >> With commit d9e2e0143c the 'GuC-specific firmware loader' doc >> section was removed from intel_guc_loader.c without a

Re: [Intel-gfx] [PATCH v3 i-g-t] test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

On Tue, Dec 12, 2017 at 11:59:13AM +0100, Maarten Lankhorst wrote: > From: Arkadiusz Hiler > > Compiler complained on crc_lowres and crc_hires2 being uninitialized > and indeed, display_commit_mode() seems to have intention of retruning > the value through the

Re: [Intel-gfx] [PATCH] docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

On Tue, 12 Dec 2017 12:38:37 +0100, Markus Heiser wrote: With commit d9e2e0143c the 'GuC-specific firmware loader' doc section was removed from intel_guc_loader.c without a replacement. So lets remove it from the Kernel-doc:: .. kernel-doc::

[Intel-gfx] [PATCH] docs: fix, intel_guc_loader.c has been moved to intel_guc_fw.c

With commit d9e2e0143c the 'GuC-specific firmware loader' doc section was removed from intel_guc_loader.c without a replacement. So lets remove it from the Kernel-doc:: .. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c :doc: GuC-specific firmware loader With commit e8668bbcb0

[Intel-gfx] [PATCH v2] drm/i915: Downgrade misleading "Memory usable" message

It never meant what it said, as it was always the total size of the Global GTT and not a limit upon memory usage. Originally it served as a quick guide to the largest batch that could be submitted by userspace, an approximation to its maximum RSS, but was phrased badly. Today with the 48b ppgtt,

Re: [Intel-gfx] [PATCH v6 0/5] drm/i915: Expose more GPU properties through sysfs

On 11/12/2017 21:05, Daniel Vetter wrote: On Mon, Dec 11, 2017 at 02:38:53PM +, Tvrtko Ursulin wrote: On 11/12/2017 10:50, Joonas Lahtinen wrote: + Daniel, Chris On Thu, 2017-12-07 at 09:21 +, Tvrtko Ursulin wrote: On 04/12/2017 15:02, Lionel Landwerlin wrote: Hi, After discussion

Re: [Intel-gfx] [PATCH] drm/i915: Print an error message for a reset failure on gen2

Quoting Ville Syrjälä (2017-12-12 06:35:31) > On Mon, Dec 11, 2017 at 08:40:40PM +, Chris Wilson wrote: > > Since on gen2, we do not universally have a GPU reset implementation, we > > fail i915_reset() at intel_has_gpu_reset(). However, this is also > > intentionally disabled for CI testing

Re: [Intel-gfx] [PATCH v3 i-g-t] test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

On Tue, Dec 12, 2017 at 11:59:13AM +0100, Maarten Lankhorst wrote: > From: Arkadiusz Hiler > > Compiler complained on crc_lowres and crc_hires2 being uninitialized > and indeed, display_commit_mode() seems to have intention of retruning

[Intel-gfx] [PATCH i-g-t v2 1/1] meson: Install .testlist files and README from tests/intel-ci

v2: README too, and a better variable name (Ville) Signed-off-by: Petri Latvala Cc: Daniel Vetter Cc: Ville Syrjälä --- tests/intel-ci/meson.build | 8 tests/meson.build | 2 ++ 2 files changed,

[Intel-gfx] [PATCH igt] igt/drv_module_reload: Reload with full mmio-debugging

mmio-debugging is lazy, we only turn on per-access checking after a periodic check to see if an error has been flagged. If we load the module with mmio_debug, we can validate that no such errors occur during module_init, which is one of the trickier times to get right (having to balance

[Intel-gfx] [PATCH v3 i-g-t] test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

From: Arkadiusz Hiler Compiler complained on crc_lowres and crc_hires2 being uninitialized and indeed, display_commit_mode() seems to have intention of retruning the value through the parameter that is only a single pointer. This couses only the local copy of the

[Intel-gfx] [PATCH i-g-t v2 1/1] meson: Install test-list.txt to libexecdir

Piglit needs test-list.txt to be in the same directory as the test binaries. The corresponding change to autotools was done in commit commit 23b7c99c8f6b2da9f624d4f0c40fe1355d5a2dcc Author: Petri Latvala Date: Fri Aug 25 13:13:51 2017 +0300 tests/Makefile.am:

Re: [Intel-gfx] [PATCH i-g-t 4/6] meson: Install test-list.txt to libexecdir

On Thu, Dec 07, 2017 at 06:29:55PM +0200, Ville Syrjälä wrote: > On Thu, Dec 07, 2017 at 03:40:29PM +0200, Petri Latvala wrote: > > Piglit needs test-list.txt to be in the same directory as the test > > binaries. > > Referencing the corresponding autotools commit would have made this > easier to

[Intel-gfx] [PATCH i-g-t v2] test/kms_plane_lowres: Fix display_commit_mode() so it returns the crc

Compiler complained on crc_lowres and crc_hires2 being uninitialized and indeed, display_commit_mode() seems to have intention of retruning the value through the parameter that is only a single pointer. This couses only the local copy of the pointer, the one inside display_commit_mode(), to be

Re: [Intel-gfx] [PATCH i-g-t 3/6] meson: Install benchmarks to $libexec/intel-gpu-tools/benchmarks

On Thu, Dec 07, 2017 at 06:52:30PM +0100, Daniel Vetter wrote: > On Thu, Dec 07, 2017 at 06:32:58PM +0200, Ville Syrjälä wrote: > > On Thu, Dec 07, 2017 at 03:40:28PM +0200, Petri Latvala wrote: > > > Signed-off-by: Petri Latvala > > > Cc: Daniel Vetter

Re: [Intel-gfx] [PATCH v8 0/9] make stolen resource centric

+ Paulo and Rodrigo I merged these to dinq now. Rodrigo, do mention in the next -next pull that we there's early-quirks changes mixed here, we have got the Acks. Thanks for the patches and review! Regards, Joonas On Mon, 2017-12-11 at 15:18 +, Matthew Auld wrote: > Continuation of Paulo'

Re: [Intel-gfx] [PATCH v2 0/4] mmio save restore refine in vgpu switch

Hi Li, I guess this is still on the wrong mailing list :) You have a better chance of getting review input in the gvt list. Regards, Joonas On Tue, 2017-12-12 at 10:09 +0800, Weinan Li wrote: > Merge switch_mmio_to_vgpu and switch_mmio_to_host, use delta update for > mocs save restore, deal

Re: [Intel-gfx] [PATCH igt] igt/kms_flip: Allow very large bo to fail pageflips with E2BIG

On Mon, 2017-12-11 at 17:22 +, Chris Wilson wrote: > We tried to allow very large buffers (larger than the mappable aperture) > to be flippable by allowing them to be bound into the unmappable region. > Sadly, not our hw is capable of utilising the unmappable region for > scanout (and on some

Re: [Intel-gfx] [PATCH] x86/gpu: add CFL to early quirks

+ Jani, who'll continue with -fixes On Mon, 2017-12-11 at 13:50 -0800, Lucas De Marchi wrote: > On Mon, Dec 11, 2017 at 2:26 AM, Joonas Lahtinen > wrote: > > On Fri, 2017-12-08 at 10:47 -0800, Lucas De Marchi wrote: > > > CFL was missing from intel_early_ids[]. >

Re: [Intel-gfx] [PATCH i-g-t] igt/kms_rotation_crc: Add horizontal flip subtest.

On Wed, Nov 22, 2017 at 03:05:55PM -0800, Anusha Srivatsa wrote: > From: Joseph Garvey > > Test that horizontal flip works with supported rotations. Includes > a fix for the unrotated fb which was not being positioned correctly > with portrait and landscape rectangles.

Re: [Intel-gfx] [PATCH] drm/i915: Remove unused IRQ chip data of HDMI LPE audio

On Tue, 12 Dec 2017 10:26:08 +0100, Chen, Augustine wrote: > > > > > > That *looks* more correct to me based on a cursory glance at the > > > > > > x86 code, but I didn't trawl very deeply. > > > > > > > > > > The x86 core cares not at all about interrupt chips which are > > > > > created in a

Re: [Intel-gfx] [PATCH] drm/i915: Remove unused IRQ chip data of HDMI LPE audio

> -Original Message- > From: Takashi Iwai [mailto:ti...@suse.de] > Sent: Monday, December 11, 2017 9:23 PM > To: Ville Syrjälä > Cc: Anand, Jerome ; Thomas Gleixner > ; Chen, Augustine ;

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