[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : warning == Summary == Possible new issues: Test kms_flip: Subgroup 2x-plain-flip: pass

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Send DPCD ON for MST before phy_up (rev2)

== Series Details == Series: drm/i915/dp: Send DPCD ON for MST before phy_up (rev2) URL : https://patchwork.freedesktop.org/series/41232/ State : success == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup fbcpsr-1p-primscrn-shrfb-msflip-blt:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3) URL : https://patchwork.freedesktop.org/series/32657/ State : failure == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup fbc-2p-scndscrn-cur-indfb-move:

Re: [Intel-gfx] [PATCH 3/3] drm/i915/icl: update ddb entry start/end mask during hw ddb readout

On Thu, Apr 05, 2018 at 02:47:56PM +0530, Mahesh Kumar wrote: > Gen11/ICL onward ddb entry start/end mask is increased from 10 bits to > 11 bits. This patch make changes to use proper mask for ICL+ during > hardware ddb value readout. > > Changes since V1: > - Use _MASK & _SHIFT macro (James) >

Re: [Intel-gfx] [PATCH 08/17] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI

On Thu, Feb 22, 2018 at 12:55:10AM -0300, Paulo Zanoni wrote: > From: Manasi Navare > > This is an important part of the DDI initalization as well as > for changing the voltage during DisplayPort link training. > > The Voltage swing seqeuence is similar to Cannonlake.

Re: [Intel-gfx] [PATCH v4] drm: Fix downstream dev count read

On Thu, Apr 05, 2018 at 04:04:14AM +0530, Ramalingam C wrote: > > > On Thursday 05 April 2018 12:53 AM, Sean Paul wrote: > > On Wed, Apr 04, 2018 at 12:07:41PM -0700, Rodrigo Vivi wrote: > > > On Wed, Apr 04, 2018 at 11:57:42PM +0530, Ramalingam C wrote: > > > > In both HDMI and DP, device count

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [01/14] drm/i915/icl: Introduce initial Icelake Workarounds

== Series Details == Series: series starting with [01/14] drm/i915/icl: Introduce initial Icelake Workarounds URL : https://patchwork.freedesktop.org/series/41247/ State : warning == Summary == Series 41247v1 series starting with [01/14] drm/i915/icl: Introduce initial Icelake Workarounds

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915/icl: Introduce initial Icelake Workarounds

== Series Details == Series: series starting with [01/14] drm/i915/icl: Introduce initial Icelake Workarounds URL : https://patchwork.freedesktop.org/series/41247/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0dbd53fd7f8c drm/i915/icl: Introduce initial Icelake Workarounds

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 17:19 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would sometimes be possible for the initial power_up_phy() to start > timing out. This would only be observed in the last action before the > sink went into D3 mode

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 17:19 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would sometimes be possible for the initial power_up_phy() to start > timing out. This would only be observed in the last action before the > sink went into D3 mode

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : success == Summary == Series 41095v3 series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2)

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2) URL : https://patchwork.freedesktop.org/series/41230/ State : warning == Summary == Possible new issues: Test kms_flip: Subgroup 2x-flip-vs-modeset: pass ->

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3)

== Series Details == Series: series starting with [v4] drm/i915: Enable edp psr error interrupts on hsw (rev3) URL : https://patchwork.freedesktop.org/series/41095/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6494853a48be drm/i915: Enable edp psr error interrupts on hsw

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Send DPCD ON for MST before phy_up (rev2)

== Series Details == Series: drm/i915/dp: Send DPCD ON for MST before phy_up (rev2) URL : https://patchwork.freedesktop.org/series/41232/ State : success == Summary == Series 41232v2 drm/i915/dp: Send DPCD ON for MST before phy_up

[Intel-gfx] [PATCH 14/14] drm/i915/icl: Enable Sampler DFR

Sampler Dynamic Frequency Rebalancing (DFR) aims to reduce Sampler power by dynamically changing its clock frequency in low-throughput conditions. This patches enables it by default on Gen11. v2: Wrong operation to clear the bit (Praveen) Cc: Sagar Arun Kamble Cc:

[Intel-gfx] [PATCH 03/14] drm/i915/icl: WaModifyGamTlbPartitioning

Adjust default GAM TLB partitioning for performance reasons. v2: Only touch the bits that we really need Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 5 + drivers/gpu/drm/i915/intel_pm.c | 5 +

[Intel-gfx] [PATCH 10/14] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken2

Required to dinamically set 'Small PL Lossless Fix Enable' Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. Cc: Mika Kuoppala Signed-off-by: Oscar Mateo

[Intel-gfx] [PATCH 06/14] drm/i915/icl: WaDisableImprovedTdlClkGating

Revert to the legacy implementation. v2: GEN7_ROW_CHICKEN2 is masked v3: - Rebased - Renamed to Wa_2006611047 - A0 and B0 only Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h| 1 +

[Intel-gfx] [PATCH 12/14] drm/i915/icl: WaAllowUmdWriteTRTTRootTable

Required for TR-TT (Tiled Resource Translation Table) support. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. Cc: Mika Kuoppala Signed-off-by: Oscar Mateo

[Intel-gfx] [PATCH 05/14] drm/i915/icl: WaDisableCleanEvicts

Avoids an undefined LLC behavior. BSpec: 9613 v2: Renamed to Wa_1405733216 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 6 ++ 2 files changed, 7

[Intel-gfx] [PATCH 07/14] drm/i915/icl: WaCL2SFHalfMaxAlloc

This workarounds an issue with insufficient storage for the CL2 and SF units. v2: Renamed to Wa_1405766107 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 4 drivers/gpu/drm/i915/intel_pm.c | 7

[Intel-gfx] [PATCH 02/14] drm/i915/icl: WaGAPZPriorityScheme

The default GAPZ arbitrer priority value at power-on has been found to be incorrect. v2: Now renamed to Wa_1405543622 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 5 +++--

[Intel-gfx] [PATCH 13/14] drm/i915/icl: WaEnableStateCacheRedirectToCS

Redirects the state cache to the CS Command buffer section for performance reasons. v2: Rebased Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h| 1 + drivers/gpu/drm/i915/intel_engine_cs.c | 4

[Intel-gfx] [PATCH 01/14] drm/i915/icl: Introduce initial Icelake Workarounds

Inherit workarounds from previous platforms that are still valid for Icelake. v2: GEN7_ROW_CHICKEN2 is masked v3: - Removed the TODO comment about WA_SET_BIT for WaInPlaceDecompressionHang, since this has been fixed already in upstream. - Squashed with this patch from Paulo Zanoni

[Intel-gfx] [PATCH 11/14] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7

Required to dinamically set 'Trilinear Filter Quality Mode' Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. Cc: Mika Kuoppala Signed-off-by: Oscar Mateo

[Intel-gfx] [PATCH 04/14] drm/i915/icl: WaL3BankAddressHashing

Revert to an L3 non-hash model, for performance reasons. v2: - Place the WA name above the actual change - Improve the register naming v3: - Rebased - Renamed to Wa_1604223664 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo ---

[Intel-gfx] [PATCH 09/14] drm/i915/icl: WaSendPushConstantsFromMMIO

Allows UMDs to set 'Disable Gather at Set Shader Common Slice'. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it... v2: Rebased Cc: Mika Kuoppala

[Intel-gfx] [PATCH 08/14] drm/i915/icl: WaDisCtxReload

Revert to the legacy implementation to avoid a system hang. v2: Correct the address for GAMW_ECO_DEV_RW_IA_REG v3: Renamed to Wa_220166154 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 3 +++

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/7] drm/arc: Stop consulting plane->fb

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb URL : https://patchwork.freedesktop.org/series/41230/ State : success == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup fbcpsr-1p-primscrn-shrfb-msflip-blt:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3) URL : https://patchwork.freedesktop.org/series/32657/ State : success == Summary == Series 32657v3 drm/i915: set minimum CD clock to twice the BCLK.

Re: [Intel-gfx] [Freedreno] [PATCH 01/10] include: Move ascii85 functions from i915 to linux/ascii85.h

On Thu, Apr 05, 2018 at 04:00:47PM -0600, Jordan Crouse wrote: > The i915 DRM driver very cleverly used ascii85 encoding for their > GPU state file. Move the encode functions to a general header file to > support other drivers that might be interested in the same > functionality. In a previous

[Intel-gfx] [PATCH 01/10] include: Move ascii85 functions from i915 to linux/ascii85.h

The i915 DRM driver very cleverly used ascii85 encoding for their GPU state file. Move the encode functions to a general header file to support other drivers that might be interested in the same functionality. Reviewed-by: Chris Wilson Signed-off-by: Jordan Crouse

[Intel-gfx] [PATCH v4] drm/i915: Enable edp psr error interrupts on hsw

From: Daniel Vetter The definitions for the error register should be valid on bdw/skl too, but there we haven't even enabled DE_MISC handling yet. Somewhat confusing the the moved register offset on bdw is only for the _CTL/_AUX register, and that _IIR/IMR stayed where

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev3)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev3) URL : https://patchwork.freedesktop.org/series/32657/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8183ab2bd26b drm/i915: set minimum CD clock to twice the BCLK. -:98: CHECK:SPACING: spaces

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Enable edp psr error interrupts on hsw

On Thu, 2018-04-05 at 14:42 -0700, Dhinakaran Pandiyan wrote: > > > On Thu, 2018-04-05 at 20:40 +, Souza, Jose wrote: > > On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > > > From: Daniel Vetter > > > > > > The definitions for the error register

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/audio: Fix audio issue on BXT

== Series Details == Series: drm/i915/audio: Fix audio issue on BXT URL : https://patchwork.freedesktop.org/series/41227/ State : success == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup fbcpsr-1p-primscrn-shrfb-msflip-blt: fail ->

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Enable edp psr error interrupts on bdw+

On Thu, 2018-04-05 at 20:38 +, Souza, Jose wrote: > On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > > From: Ville Syrjälä > > > > Plug in the bdw+ irq handling for PSR interrupts. bdw+ supports psr > > on > > any transcoder in theory, though

[Intel-gfx] [PATCH v3] drm/i915/dp: Send DPCD ON for MST before phy_up

When doing a modeset where the sink is transitioning from D3 to D0 , it would sometimes be possible for the initial power_up_phy() to start timing out. This would only be observed in the last action before the sink went into D3 mode was intel_dp_sink_dpms(DRM_MODE_DPMS_OFF). We originally thought

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Enable edp psr error interrupts on hsw

On Thu, 2018-04-05 at 20:40 +, Souza, Jose wrote: > On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > > From: Daniel Vetter > > > > The definitions for the error register should be valid on bdw/skl > > too, > > but there we haven't even enabled

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2)

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2) URL : https://patchwork.freedesktop.org/series/41230/ State : success == Summary == Series 41230v2 series starting with [1/7] drm/arc: Stop consulting plane->fb

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2)

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb (rev2) URL : https://patchwork.freedesktop.org/series/41230/ State : warning == Summary == $ dim checkpatch origin/drm-tip 72b80067880c drm/arc: Stop consulting plane->fb -:22: WARNING:BAD_SIGN_OFF:

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 16:36 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would sometimes be possible for the initial power_up_phy() to start > timing out. This would only be observed in the last action before the > sink went into D3 mode

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up

Actually - ignore this patch, I'm going to do a v3 because i just noticed there is something very silly and broken I just introduced into the disable codepath On Thu, 2018-04-05 at 16:36 -0400, Lyude Paul wrote: > When doing a modeset where the sink is transitioning from D3 to D0 , it > would

Re: [Intel-gfx] [PATCH 1/7] drm/arc: Stop consulting plane->fb

On Thu, Apr 05, 2018 at 11:19:44PM +0300, Ville Syrjälä wrote: > On Thu, Apr 05, 2018 at 10:08:57PM +0200, Daniel Vetter wrote: > > On Thu, Apr 05, 2018 at 10:50:29PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > We want to stop using plane->fb

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Enable edp psr error interrupts on hsw

On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > From: Daniel Vetter > > The definitions for the error register should be valid on bdw/skl > too, > but there we haven't even enabled DE_MISC handling yet. > > Somewhat confusing the the moved register offset

Re: [Intel-gfx] [PATCH 7/7] drm/vmwgfx: Stop messing about with plane->fb/old_fb/crtc

On Thu, Apr 05, 2018 at 10:50:35PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > plane->fb/old_fb/crtc should no longer be used by atomic > drivers. Stop messing about with them. > > TODO: Squash with the core/helper patch? Not possible, because the core

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Enable edp psr error interrupts on bdw+

On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > From: Ville Syrjälä > > Plug in the bdw+ irq handling for PSR interrupts. bdw+ supports psr > on > any transcoder in theory, though the we don't currenty enable PSR > except > on the EDP transcoder. >

Re: [Intel-gfx] [PATCH 2/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset()

> > On Thu, Apr 05, 2018 at 08:15:05PM +, Deepak Singh Rawat wrote: > > > > > > > > From: Ville Syrjälä > > > > > > Instead of looking at plane->fb let's look at the proper new > > > plane state. > > > > > > Not that the code makes a ton of sense. It's only

[Intel-gfx] [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

In glk when device boots with 1366x768 panel, HDA codec doesn't comeup. This result in no audio forever as cdclk is < 96Mhz. This chagne will ensure CD clock to be twice of BCLK. v2: - Address comment (Jani) - New design approach Bugzilla:

[Intel-gfx] [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up

When doing a modeset where the sink is transitioning from D3 to D0 , it would sometimes be possible for the initial power_up_phy() to start timing out. This would only be observed in the last action before the sink went into D3 mode was intel_dp_sink_dpms(DRM_MODE_DPMS_OFF). We originally thought

[Intel-gfx] [PATCH v2 3/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_helper_dirty()

From: Ville Syrjälä Instead of plane->fb (which we're going to deprecate for atomic drivers) we need to look at plane->state->fb. The maze of code leading to vmw_kms_helper_dirty() wasn't particularly clear, but my analysis concluded that the calls originating from

Re: [Intel-gfx] [PATCH 2/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset()

On Thu, Apr 05, 2018 at 08:15:05PM +, Deepak Singh Rawat wrote: > > > > > From: Ville Syrjälä > > > > Instead of looking at plane->fb let's look at the proper new > > plane state. > > > > Not that the code makes a ton of sense. It's only going through the >

Re: [Intel-gfx] [PATCH 3/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_helper_dirty()

On Thu, Apr 05, 2018 at 10:15:57PM +0200, Thomas Hellstrom wrote: > On 04/05/2018 09:50 PM, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Instead of plane->fb (which we're going to deprecate for atomic drivers) > > we need to look at plane->state->fb. The

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc (rev2)

== Series Details == Series: series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc (rev2) URL : https://patchwork.freedesktop.org/series/41216/ State : success == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/arc: Stop consulting plane->fb

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb URL : https://patchwork.freedesktop.org/series/41230/ State : success == Summary == Series 41230v1 series starting with [1/7] drm/arc: Stop consulting plane->fb

Re: [Intel-gfx] [PATCH 1/7] drm/arc: Stop consulting plane->fb

On Thu, Apr 05, 2018 at 10:08:57PM +0200, Daniel Vetter wrote: > On Thu, Apr 05, 2018 at 10:50:29PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > We want to stop using plane->fb with atomic driver, so stop looking at > > it. > > > > I have no idea

Re: [Intel-gfx] [PATCH 3/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_helper_dirty()

On 04/05/2018 09:50 PM, Ville Syrjala wrote: From: Ville Syrjälä Instead of plane->fb (which we're going to deprecate for atomic drivers) we need to look at plane->state->fb. The maze of code leading to vmw_kms_helper_dirty() wasn't particularly clear, but my

Re: [Intel-gfx] [PATCH 2/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset()

> > From: Ville Syrjälä > > Instead of looking at plane->fb let's look at the proper new > plane state. > > Not that the code makes a ton of sense. It's only going through the > crtcs in the atomic state, so assuming not all of them are included > we're not even

Re: [Intel-gfx] [PATCH 1/7] drm/arc: Stop consulting plane->fb

On Thu, Apr 05, 2018 at 10:50:29PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > We want to stop using plane->fb with atomic driver, so stop looking at > it. > > I have no idea what this code is trying to achieve. There is no > corresponding check in the

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/arc: Stop consulting plane->fb

== Series Details == Series: series starting with [1/7] drm/arc: Stop consulting plane->fb URL : https://patchwork.freedesktop.org/series/41230/ State : warning == Summary == $ dim checkpatch origin/drm-tip b94876325cd5 drm/arc: Stop consulting plane->fb 8c083114e1a4 drm/vmwgfx: Stop using

Re: [Intel-gfx] [PATCH v2 05/13] drm/i915: Stop updating plane->fb/crtc

On Thu, Apr 5, 2018 at 7:02 PM, Ville Syrjala wrote: > From: Ville Syrjälä > > We want to get rid of plane->fb/crtc on atomic drivers. Stop setting > them. > > v2: Fix up the comment in intel_crtc_active() and > nuke the rest of

Re: [Intel-gfx] [PATCH 1/5] drm/i915/icl: Add reset control register changes

On 4/5/2018 7:00 AM, Mika Kuoppala wrote: From: Michel Thierry The bits used to reset the different engines/domains have changed in GEN11, this patch maps the reset engine mask bits with the new bits in the reset control register. v2: Use shift-left instead of BIT

Re: [Intel-gfx] [PATCH 7/7] drm/i915/dp: fix compliance test adjustments

On Thu, Apr 05, 2018 at 05:39:05PM +0300, Jani Nikula wrote: > Abstract compliance test adjustments to a single function. Also make the > bpc adjustments affect the limits, actually forcing the bpc. Seems like > directly changing the pipe_bpp in the past could not have been > effective. > >

Re: [Intel-gfx] [PATCH 6/7] drm/i915/dp: abstract link config selection

On Thu, Apr 05, 2018 at 05:39:04PM +0300, Jani Nikula wrote: > For now, there's just the one link config selection, optimizing for slow > and wide link. No functional changes. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c | 81 >

[Intel-gfx] [PATCH 6/7] drm/vmwgfx: Stop using plane->fb in atomic_enable()

From: Ville Syrjälä Instead of looking at the (soon to be deprecated) plane->fb we'll examing plane->state->fb instead. We can do this because vmw_du_crtc_atomic_check() prevents us from enabling a crtc without the primary plane also being enabled. Due to that

[Intel-gfx] [PATCH 7/7] drm/vmwgfx: Stop messing about with plane->fb/old_fb/crtc

From: Ville Syrjälä plane->fb/old_fb/crtc should no longer be used by atomic drivers. Stop messing about with them. TODO: Squash with the core/helper patch? Cc: Thomas Hellstrom Cc: Sinclair Yeh Cc: VMware Graphics

[Intel-gfx] [PATCH 5/7] drm/vmwgfx: Stop updating plane->fb

From: Ville Syrjälä We want to get rid of plane->fb on atomic drivers. Stop setting it. Cc: Thomas Hellstrom Cc: Sinclair Yeh Cc: VMware Graphics Cc: Daniel Vetter

[Intel-gfx] [PATCH 4/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_update_implicit_fb()

From: Ville Syrjälä The only caller of vmw_kms_update_implicit_fb() is the page_flip hook which itself gets called with the plane mutex already held. Hence we can look at plane->state safely. Toss in a lockdep assert to make the situation more clear. Cc: Thomas

[Intel-gfx] [PATCH 3/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_helper_dirty()

From: Ville Syrjälä Instead of plane->fb (which we're going to deprecate for atomic drivers) we need to look at plane->state->fb. The maze of code leading to vmw_kms_helper_dirty() wasn't particularly clear, but my analysis concluded that the calls originating from

[Intel-gfx] [PATCH 2/7] drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset()

From: Ville Syrjälä Instead of looking at plane->fb let's look at the proper new plane state. Not that the code makes a ton of sense. It's only going through the crtcs in the atomic state, so assuming not all of them are included we're not even calculating the

[Intel-gfx] [PATCH 1/7] drm/arc: Stop consulting plane->fb

From: Ville Syrjälä We want to stop using plane->fb with atomic driver, so stop looking at it. I have no idea what this code is trying to achieve. There is no corresponding check in the enable path. Also since arc_pgu_set_pxl_fmt() will anyway oops if there is no

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc

== Series Details == Series: series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc URL : https://patchwork.freedesktop.org/series/41216/ State : success == Summary == Possible new issues: Test kms_frontbuffer_tracking: Subgroup fbcpsr-1p-primscrn-shrfb-msflip-blt:

Re: [Intel-gfx] [PATCH v4 3/4] drm/i915/psr: Control PSR interrupts via debugfs

On Wed, 2018-04-04 at 18:37 -0700, Dhinakaran Pandiyan wrote: > Interrupts other than the one for AUX errors are required only for > debug, > so unmask them via debugfs when the user requests debug. > > User can make such a request with > echo 1 > /dri/0/i915_edp_psr_debug > > There are no locks

Re: [Intel-gfx] [PATCH 5/5] drm/i915/icl: Enable RC6 and RPS in Gen11

On 4/5/2018 7:00 AM, Mika Kuoppala wrote: From: Oscar Mateo AFAICT, once the new interrupt is in place, the rest should behave the same as Gen10. v2: Update ring frequencies (Sagar) v3: Rebase. Cc: Daniele Ceraolo Spurio Cc: Sagar Arun

Re: [Intel-gfx] [PATCH 4/7] drm/i915/dp: move eDP VBT bpp claming code to intel_dp_compute_bpp()

On Thu, Apr 05, 2018 at 05:39:02PM +0300, Jani Nikula wrote: > Keep related things together. No functional changes. > > Signed-off-by: Jani Nikula > --- Definitely looks more organized. Reviewed-by: Manasi Navare >

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context

Quoting Chris Wilson (2018-03-30 14:18:01) > We don't handle resetting the kernel context very well, or presumably any > context executing its breadcrumb commands in the ring as opposed to the > batchbuffer and flush. If we trigger a device reset twice in quick > succession while the kernel

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: set minimum CD clock to twice the BCLK. (rev2)

== Series Details == Series: drm/i915: set minimum CD clock to twice the BCLK. (rev2) URL : https://patchwork.freedesktop.org/series/32657/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK

Re: [Intel-gfx] [PATCH 2/7] drm/i915/dp: move link_bw and rate_select debugging where used

On Thu, Apr 05, 2018 at 10:22:38AM -0700, Rodrigo Vivi wrote: > On Thu, Apr 05, 2018 at 05:39:00PM +0300, Jani Nikula wrote: > > The debug prints make more sense where the results are actually used, > > and this cleans up extra clutter from the already overcrowded > > intel_dp_compute_config(). >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/audio: Fix audio issue on BXT

== Series Details == Series: drm/i915/audio: Fix audio issue on BXT URL : https://patchwork.freedesktop.org/series/41227/ State : success == Summary == Series 41227v1 drm/i915/audio: Fix audio issue on BXT https://patchwork.freedesktop.org/api/1.0/series/41227/revisions/1/mbox/ Known

[Intel-gfx] [PATCH igt 2/2] igt/gem_eio: Drop DRM_MASTER so we can reacquire it in the subtests

As we reopen the fd for each subtest, and we need a DRM_MASTER, we need to drop master on the original before we are allowed to claim DRM_MASTER on the second. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/gem_eio.c | 2 ++ 1 file

[Intel-gfx] [PATCH igt 1/2] lib: Acquire master for pollable spinbatch on gen4/5

gen4/5 require a DRM_MASTER to use MI_STORE_DW, make it so. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- lib/igt_dummyload.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/igt_dummyload.c

Re: [Intel-gfx] [PATCH 3/5] drm/i915/icl: Handle RPS interrupts correctly for Gen11

On 4/5/2018 7:00 AM, Mika Kuoppala wrote: From: Oscar Mateo Using the new hierarchical interrupt infrastructure. v2: Rebase v3: Rebase v4: use class/instance handler (Mika) Cc: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio

Re: [Intel-gfx] [PATCH 1/7] drm/i915/dp: remove stale comment about bw constants

On Thu, Apr 05, 2018 at 05:38:59PM +0300, Jani Nikula wrote: > We haven't used the DP bw constants here for a while. No functional > changes. > > Signed-off-by: Jani Nikula Reviewed-by: Manasi Navare > --- > drivers/gpu/drm/i915/intel_dp.c |

[Intel-gfx] [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK.

In glk when device boots with 1366x768 panel, HDA codec doesn't comeup. This result in no audio forever as cdclk is < 96Mhz. This chagne will ensure CD clock to be twice of BCLK. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937 Signed-off-by: Abhay Kumar ---

[Intel-gfx] [PATCH] drm/i915/audio: Fix audio issue on BXT

On Apollolake, with stress test warm reboot, audio card was not getting enumerated after reboot. This was a spurious issue happening on Apollolake. HW codec and HD audio controller link was going out of sync for which there was a fix in i915 driver but was not getting invoked for BXT. Extending

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: link config compute refactoring

== Series Details == Series: drm/i915/dp: link config compute refactoring URL : https://patchwork.freedesktop.org/series/41215/ State : success == Summary == Possible new issues: Test kms_cursor_legacy: Subgroup cursor-vs-flip-toggle: fail -> PASS

Re: [Intel-gfx] [PATCH 4/5] drm/i915/icl: Deal with GT INT DW correctly

On 4/5/2018 7:00 AM, Mika Kuoppala wrote: From: Oscar Mateo BSpec says: "Second level interrupt events are stored in the GT INT DW. GT INT DW is a double buffered structure. A snapshot of events is taken when SW reads GT INT DW. From the time of read to the time of SW

Re: [Intel-gfx] [PATCH 04/13] drm/amdgpu/dc: Stop updating plane->fb

On 2018-04-05 12:41 PM, Daniel Vetter wrote: > On Thu, Apr 05, 2018 at 06:13:51PM +0300, Ville Syrjala wrote: >> From: Ville Syrjälä >> >> We want to get rid of plane->fb on atomic drivers. Stop setting it. >> >> Cc: Alex Deucher >> Cc:

Re: [Intel-gfx] [PATCH 2/5] drm/i915/icl: Use hw engine class, instance to find irq handler

On 4/5/2018 10:10 AM, Daniele Ceraolo Spurio wrote: On 05/04/18 07:00, Mika Kuoppala wrote: Interrupt identity register we already read from hardware contains engine class and instance fields. Leverage these fields to find correct engine to handle the interrupt. v3: rebase on top of rps intr

Re: [Intel-gfx] [PATCH] drm/i915: Fix audio issue on BXT

On Thu, 2018-04-05 at 22:12 +0530, Gaurav K Singh wrote: > On Apollolake, with stress test warm reboot, audio card > was not getting enumerated after reboot. This was a > spurious issue happening on Apollolake. HW codec and > HD audio controller link was going out of sync for which > there was

Re: [Intel-gfx] [PATCH] drm/i915/dp: Send DPCD ON for MST before phy_up

On Thu, 2018-04-05 at 19:38 +0300, Ville Syrjälä wrote: > On Wed, Apr 04, 2018 at 07:27:21PM -0400, Lyude Paul wrote: > > As it turns out, the aux block being off was not the real problem here, > > as transition from D3 to D0 is mandated by the DP spec to take a maximum > > of 1ms, whereas

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc (rev2)

== Series Details == Series: series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc (rev2) URL : https://patchwork.freedesktop.org/series/41216/ State : success == Summary == Series 41216v2 series starting with [01/13] drm/msm: Stop consulting plane->fb/crtc

Re: [Intel-gfx] [PATCH] i915/dp_mst: Keep AUX block running when disabling DPMS

Hi. [This is an automated email] This commit has been processed because it contains a "Fixes:" tag. fixing commit: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable MST hub."). The bot has also determined it's probably a bug fixing patch. (score: 98.3082) The bot has tested the

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915/icl: Add reset control register changes

== Series Details == Series: series starting with [1/5] drm/i915/icl: Add reset control register changes URL : https://patchwork.freedesktop.org/series/41214/ State : success == Summary == Possible new issues: Test kms_cursor_legacy: Subgroup cursor-vs-flip-toggle:

Re: [Intel-gfx] [PATCH 2/7] drm/i915/dp: move link_bw and rate_select debugging where used

On Thu, Apr 05, 2018 at 05:39:00PM +0300, Jani Nikula wrote: > The debug prints make more sense where the results are actually used, > and this cleans up extra clutter from the already overcrowded > intel_dp_compute_config(). > > Signed-off-by: Jani Nikula > --- >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm: i915: Fix audio issue on BXT (rev4)

== Series Details == Series: drm: i915: Fix audio issue on BXT (rev4) URL : https://patchwork.freedesktop.org/series/35955/ State : failure == Summary == Series 35955v4 drm: i915: Fix audio issue on BXT https://patchwork.freedesktop.org/api/1.0/series/35955/revisions/4/mbox/ Possible

Re: [Intel-gfx] [PATCH 1/7] drm/i915/dp: remove stale comment about bw constants

On Thu, Apr 05, 2018 at 05:38:59PM +0300, Jani Nikula wrote: > We haven't used the DP bw constants here for a while. No functional > changes. > > Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_dp.c | 1 -

Re: [Intel-gfx] [PATCH 2/5] drm/i915/icl: Use hw engine class, instance to find irq handler

On 05/04/18 07:00, Mika Kuoppala wrote: Interrupt identity register we already read from hardware contains engine class and instance fields. Leverage these fields to find correct engine to handle the interrupt. v3: rebase on top of rps intr use correct class / instance limits (Michel)

[Intel-gfx] [PATCH v2 05/13] drm/i915: Stop updating plane->fb/crtc

From: Ville Syrjälä We want to get rid of plane->fb/crtc on atomic drivers. Stop setting them. v2: Fix up the comment in intel_crtc_active() and nuke the rest of the stale comments (Daniel) Cc: Daniel Vetter Signed-off-by: Ville

Re: [Intel-gfx] [PATCH 13/13] drm: Add local 'plane' variable for tmp->primary

On Thu, Apr 05, 2018 at 06:14:00PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Clean up the ugly tmp->primary-> stuff in > __drm_mode_set_config_internal() with a local plane variable. > > Cc: Daniel Vetter > Suggested-by: Daniel

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