On Tue 24-07-18 12:53:07, Andrew Morton wrote:
[...]
> > On top of that the proposed cleanup looks as follows:
> >
>
> Looks good to me. Seems a bit strange that we omit the pr_info()
> output if the mm was partially reaped - people would still want to know
> this? Not very important though.
On Tue 24-07-18 14:07:49, David Rientjes wrote:
[...]
> mm/oom_kill.c: clean up oom_reap_task_mm() fix
>
> indicate reaping has been partially skipped so we can expect future skips
> or another start before finish.
But we are not skipping. This is essentially the same case as mmap_sem
trylock fa
== Series Details ==
Series: drm/i915/icl: implement icl_digital_port_connected() (rev2)
URL : https://patchwork.freedesktop.org/series/47151/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4537_full -> Patchwork_9760_full =
== Summary - WARNING ==
Minor unknown changes c
On Tue, Jul 24, 2018 at 05:28:09PM -0700, Paulo Zanoni wrote:
> Do like the other functions and check for the status bits. The "Hot
> Plug Detection" page from our documentation says we can't just use the
> ISR bits on the CPU side, so use the correct registers.
nit: here you are saying it's for a
== Series Details ==
Series: drm/i915/icl: implement icl_digital_port_connected() (rev2)
URL : https://patchwork.freedesktop.org/series/47151/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4537 -> Patchwork_9760 =
== Summary - SUCCESS ==
No regressions found.
External
== Series Details ==
Series: drm/i915/icl: implement icl_digital_port_connected() (rev2)
URL : https://patchwork.freedesktop.org/series/47151/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/icl: implement icl_digital_port_connected()
Okay!
Commit: drm/i915/icl: sto
== Series Details ==
Series: drm/i915/dp: Improve clock recovery loop limit comment
URL : https://patchwork.freedesktop.org/series/47156/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4537_full -> Patchwork_9759_full =
== Summary - FAILURE ==
Serious unknown changes comi
The type is detected based on the live status bits. Once detected,
it's not supposed to be changed, so we have some sanity checks for
that.
v2: Rebase.
Cc: Animesh Manna
Signed-off-by: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.h | 7 +
drivers/gpu/dr
Do like the other functions and check for the status bits. The "Hot
Plug Detection" page from our documentation says we can't just use the
ISR bits on the CPU side, so use the correct registers.
v2: Rebase.
v3:
- Simplify true/false assignment (Rodrigo).
- Reorganize is_gen if ladder (Rodrigo)
The Gen11 TypeC PHY DDI Buffer chapter, PHY Clock Gating Programming
section says that PHY clock gating should be disabled before starting
voltage swing programming, then enabled after any link training is
complete.
v2: Simple rebase.
Cc: Animesh Manna
Cc: Manasi Navare
Reviewed-by: Maarten Lan
From: Animesh Manna
In ICL, Flexible IO Adapter (FIA) muxes data and clocks of USB 3.1,
tbt and display controller. In DP alt mode FIA configure the
number of lanes and will be used apart from DPCD read to calculate max
available lanes for DP enablement.
v2 (from Paulo): Simple rebase.
Reviewed
Hi
This new version of the series excludes the controversial patch about
the HPD connect flow. Let's reach an agreement on this part first,
then we discuss what to do without having to rebase too many times the
patches we already agree on. Only patches 1 and 2 need review.
Cc: Rodrigo Vivi
Than
Programming this register is part of the Enable Sequence for
DisplayPort on ICL. Do as the spec says.
v2: Simple rebase.
Cc: Animesh Manna
Reviewed-by: Maarten Lankhorst (v1)
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 15
drivers/gpu/drm/i915/intel_ddi.c | 2
Reviewed-by: Marc Herbert
Thx Nathan, I think this helps. I'm still curious how training normally
converges much faster than the total number of possibilities but - unlike
this latest clarification below - I expect the spec(s) to document that.
On 24/07/2018 15:33, Nathan Ciobanu wrote:
> Clari
== Series Details ==
Series: drm/i915/icl: implement icl_digital_port_connected()
URL : https://patchwork.freedesktop.org/series/47151/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4536_full -> Patchwork_9758_full =
== Summary - WARNING ==
Minor unknown changes coming w
== Series Details ==
Series: drm/i915/dp: Improve clock recovery loop limit comment
URL : https://patchwork.freedesktop.org/series/47156/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4537 -> Patchwork_9759 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Clarifies the clock recovery loop limit comment that 80
max_cr_tries for pre-DP1.4 devices was chosen as a very
tolerant upper bound.
Assumptions made:
- DP1.4 syncs should be smarter so they won't need more
than 10 tries
- pre-DP1.4 syncs should be compliant enough to not need
that many tries (80)
== Series Details ==
Series: drm/i915/icl: implement icl_digital_port_connected()
URL : https://patchwork.freedesktop.org/series/47151/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4536 -> Patchwork_9758 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Gratuitous top posting to re-kick the thread.
For Gen11 we can't have an on/off switch anyway (media simply won't run
with an oncompatible slice config), so let's agree on an api to allow userland
to select the slice configuration for its contexts, for Gen11 only. I'd prefer a
simple {MediaConfig/
Do like the other functions and check for the status bits. The "Hot
Plug Detection" page from our documentation says we can't just use the
ISR bits on the CPU side, so use the correct registers.
v2: Rebase.
v3:
- Simplify true/false assignment (Rodrigo).
- Reorganize is_gen if ladder (Rodrigo)
On Tue, Jul 24, 2018 at 10:23:30PM +0200, Marcin Owsiany wrote:
>2018-07-24 20:37 GMT+02:00 Rodrigo Vivi <[1]rodrigo.v...@intel.com>:
>
> On Sat, Jul 21, 2018 at 09:43:53AM +0200, Marcin Owsiany wrote:
> >pt., 20 lip 2018, 23:35 użytkownik Rodrigo Vivi
> ><[1][2]rodrigo.
== Series Details ==
Series: Add Colorspace connector property interface
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4535_full -> Patchwork_9757_full =
== Summary - WARNING ==
Minor unknown changes coming with Patch
2018-07-24 20:37 GMT+02:00 Rodrigo Vivi :
> On Sat, Jul 21, 2018 at 09:43:53AM +0200, Marcin Owsiany wrote:
> >pt., 20 lip 2018, 23:35 użytkownik Rodrigo Vivi
> ><[1]rodrigo.v...@intel.com> napisał:
> >
> > On Fri, Jul 20, 2018 at 11:01:38PM +0200, Marcin Owsiany wrote:
> > >
On Tue, 24 Jul 2018 16:17:47 +0200 Michal Hocko wrote:
> On Fri 20-07-18 17:09:02, Andrew Morton wrote:
> [...]
> > - Undocumented return value.
> >
> > - comment "failed to reap part..." is misleading - sounds like it's
> > referring to something which happened in the past, is in fact
> > r
On Sat, Jul 21, 2018 at 09:43:53AM +0200, Marcin Owsiany wrote:
>pt., 20 lip 2018, 23:35 użytkownik Rodrigo Vivi
><[1]rodrigo.v...@intel.com> napisał:
>
> On Fri, Jul 20, 2018 at 11:01:38PM +0200, Marcin Owsiany wrote:
> >2018-07-20 22:22 GMT+02:00 Rodrigo Vivi
> <[1][2]
On Fri, 20 Jul 2018 15:33:51 +0200, Jakub Bartmiński
wrote:
It would appear that the calculated GuC pin bias was larger than it
should be, as the GuC address space does NOT contain the "HW contexts
RSVD"
part of the WOPCM. Thus, the GuC pin bias is simply the GuC WOPCM size.
Signed-off-by
== Series Details ==
Series: drm/i915: Protect guc_fini_wq() against module load abort (rev2)
URL : https://patchwork.freedesktop.org/series/47127/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4534_full -> Patchwork_9756_full =
== Summary - FAILURE ==
Serious unknown ch
The i915 DRM driver very cleverly used ascii85 encoding for their
GPU state file. Move the encode functions to a general header file to
support other drivers that might be interested in the same
functionality.
v4: Make the return value const char * as suggested by Chris Wilson
v3: Fix error_puts -
On Mon, Jul 23, 2018 at 02:27:35PM -0700, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> According to DP spec (2.9.3.1 of DP 1.4) if
> EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD
> 02200h through 0220Fh shall contain the DPRX's true capability. These
> value
== Series Details ==
Series: Add Colorspace connector property interface
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4535 -> Patchwork_9757 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://p
On Mon, Jul 23, 2018 at 02:27:34PM -0700, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> This bit was added to DP Training Aux RD interval with DP 1.3. Via
> descriptiion of the spec this field indicates the panels true
> capabilities are described in DPCD address space 02200h through
== Series Details ==
Series: Add Colorspace connector property interface
URL : https://patchwork.freedesktop.org/series/47132/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm: Add colorspace property
Okay!
Commit: drm/i915: Attach colorspace property and enable modeset
O
== Series Details ==
Series: Add Colorspace connector property interface
URL : https://patchwork.freedesktop.org/series/47132/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6ef31f2983ca drm: Add colorspace property
d223f56b07d5 drm/i915: Attach colorspace property and enable mo
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic.c | 1 +
drivers/gpu/drm/i915/intel_hdmi.c | 3 +++
2 files changed,
Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with proper colorspace value set which
will help to enable wider color gamut like BT2020 on sink.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 2
This patch series creates a new connector property to program
colorspace to sink devices. Modern sink devices support more
than 1 type of colorspace like 601, 709, BT2020 etc. This helps
to switch based on content type which is to be displayed. The
decision lies with compositors as to in which scen
This patch adds a colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_atomic.c| 4
drivers/gpu/drm/drm_connector.c | 31
== Series Details ==
Series: drm/i915: Protect guc_fini_wq() against module load abort (rev2)
URL : https://patchwork.freedesktop.org/series/47127/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4534 -> Patchwork_9756 =
== Summary - SUCCESS ==
No regressions found.
Ext
== Series Details ==
Series: mm, oom: distinguish blockable mode for mmu notifiers (rev8)
URL : https://patchwork.freedesktop.org/series/45263/
State : failure
== Summary ==
Applying: mm, oom: distinguish blockable mode for mmu notifiers
error: sha1 information is lacking or useless (mm/oom_ki
Prevent
[ 397.873143] general protection fault: [#1] PREEMPT SMP PTI
[ 397.873154] CPU: 4 PID: 4799 Comm: drv_module_relo Tainted: G U
4.18.0-rc6-CI-CI_DRM_4534+ #1
[ 397.873162] Hardware name: Micro-Star International Co., Ltd. MS-7B54/Z370M
MORTAR (MS-7B54), BIOS 1.10 12/
On Fri 20-07-18 17:09:02, Andrew Morton wrote:
[...]
> - Undocumented return value.
>
> - comment "failed to reap part..." is misleading - sounds like it's
> referring to something which happened in the past, is in fact
> referring to something which might happen in the future.
>
> - fails to
Quoting Chris Wilson (2018-07-24 14:40:46)
> Prevent
> [ 397.873143] general protection fault: [#1] PREEMPT SMP PTI
> [ 397.873154] CPU: 4 PID: 4799 Comm: drv_module_relo Tainted: G U
> 4.18.0-rc6-CI-CI_DRM_4534+ #1
> [ 397.873162] Hardware name: Micro-Star International Co.
== Series Details ==
Series: drm/i915: Protect guc_fini_wq() against module load abort
URL : https://patchwork.freedesktop.org/series/47127/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4534 -> Patchwork_9754 =
== Summary - SUCCESS ==
No regressions found.
External U
Prevent
[ 397.873143] general protection fault: [#1] PREEMPT SMP PTI
[ 397.873154] CPU: 4 PID: 4799 Comm: drv_module_relo Tainted: G U
4.18.0-rc6-CI-CI_DRM_4534+ #1
[ 397.873162] Hardware name: Micro-Star International Co., Ltd. MS-7B54/Z370M
MORTAR (MS-7B54), BIOS 1.10 12/
Quoting Tvrtko Ursulin (2018-07-24 11:29:31)
> From: Tvrtko Ursulin
>
> HDA audio device can be present at various PCI paths on different systems
> which the existing code did not account for.
>
> Furthermore the failure to enable runtime PM was silent leaving callers
> in the dark.
>
> Improve
Quoting Katarzyna Dec (2018-07-24 13:08:25)
> On Mon, Jul 23, 2018 at 09:07:35PM +0100, Chris Wilson wrote:
> > Time the runtime for emitting deep dependency tree, while keeping it
> > full of umpteen thousand requests.
> >
> > Signed-off-by: Chris Wilson
>
> After conversation on IRC with dispe
On Mon, Jul 23, 2018 at 09:07:35PM +0100, Chris Wilson wrote:
> Time the runtime for emitting deep dependency tree, while keeping it
> full of umpteen thousand requests.
>
> Signed-off-by: Chris Wilson
After conversation on IRC with dispelling doubts:
Reviewed-by: Katarzyna Dec
Kasia :)
__
Quoting Tvrtko Ursulin (2018-07-24 11:33:47)
>
> On 20/07/2018 12:11, Chris Wilson wrote:
> > On Sandybridge, we need a workaround to wait for the CPU thread to wake
> > up before we are sure that we have enabled the GT power well. However,
> > we do see the errors being reported and failed reads
On Mon, Jul 23, 2018 at 09:07:33PM +0100, Chris Wilson wrote:
> edid_override is a i915.ko debugfs feature; just skip any kms test that
> depends on being able to override the edid.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107337
> Signed-off-by: Chris Wilson
Reviewed-by: Katar
On 20/07/2018 12:11, Chris Wilson wrote:
On Sandybridge, we need a workaround to wait for the CPU thread to wake
up before we are sure that we have enabled the GT power well. However,
we do see the errors being reported and failed reads returning spurious
results. To try and capture more details
From: Tvrtko Ursulin
HDA audio device can be present at various PCI paths on different systems
which the existing code did not account for.
Furthermore the failure to enable runtime PM was silent leaving callers
in the dark.
Improve it by auto-locating the PCI path and logging a warning when
so
From: Tvrtko Ursulin
HDA audio device can be present at various PCI paths on different systems
which the existing code did not account for.
Furthermore the failure to enable runtime PM was silent leaving callers
in the dark.
Improve it by auto-locating the PCI path and logging a warning when
so
From: Tvrtko Ursulin
HDA audio device can be present at various PCI paths on different systems
which the existing code did not account for.
Furthermore the failure to enable runtime PM was silent leaving callers
in the dark.
Improve it by auto-locating the PCI path and logging a warning when
so
Quoting Michał Winiarski (2018-07-24 09:48:59)
> On Sat, Jul 21, 2018 at 01:50:37PM +0100, Chris Wilson wrote:
> > A reasonably common operation is to pin the map of the vma alongside the
> > vma itself for the lifetime of the vma, and so release both pin at the
> > same time as destroying the vma.
On Sat, Jul 21, 2018 at 01:50:37PM +0100, Chris Wilson wrote:
> A reasonably common operation is to pin the map of the vma alongside the
> vma itself for the lifetime of the vma, and so release both pin at the
> same time as destroying the vma. It is common enough to pull into the
> release functio
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