On 02/10/2018 13:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-10-02 13:20:05)
On 01/10/2018 20:44, Chris Wilson wrote:
The final call to zlib_deflate(Z_FINISH) may require more output
space to be allocated and so needs to re-invoked. Failure to do so in
the current code leads to incom
Quoting Chris Wilson (2018-10-02 12:18:49)
> Quoting Andi Shyti (2018-10-02 10:20:47)
> > During driver load it's considered that the i915_driver_create()
> > function fails only in case of insufficient memory. Indeed, in
> > case of failure of i915_driver_create(), the load function
> > returns in
The final call to zlib_deflate(Z_FINISH) may require more output
space to be allocated and so needs to re-invoked. Failure to do so in
the current code leads to incomplete zlib streams (albeit intact due to
the use of Z_SYNC_FLUSH) resulting in the occasional short object
capture.
v2: Check agains
On 01/10/2018 20:44, Chris Wilson wrote:
We do not need to continually clear our dedicated PTE for error capture
as it will be updated and invalidated to the next object. Only at the
end do we wish to be sure that the PTE doesn't point back to any buffer.
Signed-off-by: Chris Wilson
---
driv
Quoting Tvrtko Ursulin (2018-10-02 13:20:05)
>
> On 01/10/2018 20:44, Chris Wilson wrote:
> > The final call to zlib_deflate(Z_FINISH) may require more output
> > space to be allocated and so needs to re-invoked. Failure to do so in
> > the current code leads to incomplete zlib streams (albeit int
== Series Details ==
Series: drm/i915: Show actual along side request frequency in
debugfs/i915_rps_boost_info (rev2)
URL : https://patchwork.freedesktop.org/series/50431/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4914 -> Patchwork_10323 =
== Summary - SUCCESS ==
No
On Mon, Oct 01, 2018 at 05:31:27PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Print the plane hw state readout results in the common format
> we already use for pipes and encoders. Also print some clearer
> debug messages when we disable planes during the early phases
> of state readou
On 01/10/2018 20:44, Chris Wilson wrote:
The final call to zlib_deflate(Z_FINISH) may require more output
space to be allocated and so needs to re-invoked. Failure to do so in
the current code leads to incomplete zlib streams (albeit intact due to
the use of Z_SYNC_FLUSH) resulting in the occasi
On Mon, Oct 01, 2018 at 05:31:20PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> When we decide that a plane is attached to the wrong pipe we try
> to turn off said plane. However we are passing around the crtc we
> think that the plane is supposed to be using rather than the crtc
> it is
== Series Details ==
Series: Add XYUV format support (rev7)
URL : https://patchwork.freedesktop.org/series/48007/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4914 -> Patchwork_10322 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10322 absolutel
On Tue, Oct 02, 2018 at 12:26:01PM +0100, Chris Wilson wrote:
> Enabling hangcheck only takes effect at the start of a new request
> queue. Before we re-enable hangcheck after our poking around, we
> therefore need to wait until the gpu is idle otherwise the next test
> will start without hangcheck
On 01/10/2018 20:44, Chris Wilson wrote:
A few callsites where deciding on using WC or WB maps based on
HAS_LLC(), so replace them with the equivalent helper function
i915_map_coherent_type().
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +--
drivers/
Quoting Tvrtko Ursulin (2018-10-02 12:41:18)
>
> On 02/10/2018 12:32, Chris Wilson wrote:
> > Previously we hesitated in adding the hw probe for the actual GPU
> > frequency for rps_boost as it is quite cumbersome, but given some
> > surprising HW behaviour it would be useful to know both the RPS
Thanks, found the note now. So all the EDP/MIPI VDSC regs and
functionality are in PG2.
On Mon, Oct 01, 2018 at 09:32:48PM +0300, Runyan, Arthur J wrote:
> The power domains printed inside the register description are out of date.
> The bspec text page on power wells has a note about that and it
== Series Details ==
Series: Add XYUV format support (rev7)
URL : https://patchwork.freedesktop.org/series/48007/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7ef74de686fe drm: Introduce new DRM_FORMAT_XYUV
-:30: WARNING:LONG_LINE: line over 100 characters
#30: FILE: drivers/g
On 02/10/2018 12:32, Chris Wilson wrote:
Previously we hesitated in adding the hw probe for the actual GPU
frequency for rps_boost as it is quite cumbersome, but given some
surprising HW behaviour it would be useful to know both the RPS boost
state and the actual HW state in one location.
v2: v
Previously we hesitated in adding the hw probe for the actual GPU
frequency for rps_boost as it is quite cumbersome, but given some
surprising HW behaviour it would be useful to know both the RPS boost
state and the actual HW state in one location.
v2: vlv/chv needs more tlc
Reported-by: Tomi Sar
Enabling hangcheck only takes effect at the start of a new request
queue. Before we re-enable hangcheck after our poking around, we
therefore need to wait until the gpu is idle otherwise the next test
will start without hangcheck and subsequently hang forever.
Signed-off-by: Chris Wilson
Cc: Petr
Quoting Andi Shyti (2018-10-02 10:20:47)
> During driver load it's considered that the i915_driver_create()
> function fails only in case of insufficient memory. Indeed, in
> case of failure of i915_driver_create(), the load function
> returns indiscriminately -ENOMEM ignoring the real cause of
> f
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use
Introduced new XYUV scan-in format for framebuffer and
added support for it to i915(SkyLake+).
Stanislav Lisovskiy (2):
drm: Introduce new DRM_FORMAT_XYUV
drm/i915: Adding YUV444 packed format support for skl+
drivers/gpu/drm/drm_fourcc.c | 1 +
drivers/gpu/drm/i915/i915_reg.h
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
v7: Added is_yuv field initialization according to latest
drm_fourcc format structure initialization changes.
v8: Edited commit message to be more
== Series Details ==
Series: drm/i915: fix wrong error number report (rev2)
URL : https://patchwork.freedesktop.org/series/50406/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4913 -> Patchwork_10321 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https
Quoting Tvrtko Ursulin (2018-10-02 12:02:26)
>
> On 02/10/2018 09:36, Chris Wilson wrote:
> > Previously we hesitated in adding the hw probe for the actual GPU
> > frequency for rps_boost as it is quite cumbersome, but given some
> > surprising HW behaviour it would be useful to know both the RPS
On 02/10/2018 09:36, Chris Wilson wrote:
Previously we hesitated in adding the hw probe for the actual GPU
frequency for rps_boost as it is quite cumbersome, but given some
surprising HW behaviour it would be useful to know both the RPS boost
state and the actual HW state in one location.
Repor
On Mon, 01 Oct 2018 22:17:53 +0200, Daniele Ceraolo Spurio
wrote:
GuC stores some data in there, which might be stale after a reset.
We already reset the WQ head and tail, but more things are being moved
to the descriptor with the interface updates. Instead of trying to track
them one by one,
== Series Details ==
Series: drm/i915: Show actual along side request frequency in
debugfs/i915_rps_boost_info
URL : https://patchwork.freedesktop.org/series/50431/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4913 -> Patchwork_10320 =
== Summary - SUCCESS ==
No regres
Op 23-08-18 om 00:57 schreef Matt Roper:
> On Wed, Aug 15, 2018 at 12:34:05PM +0200, Maarten Lankhorst wrote:
>> Add plane alpha blending support with the different blend modes.
>> This has been tested on a icl to show the correct results,
>> on earlier platforms small rounding errors cause issues.
The following patches with Fixes: do not cleanly apply
to drm-intel-next-fixes:
47658556da85 ("drm/i915/dp: Do not grab crtc modeset lock in intel_dp_detect()")
Please provide a backported patch ASAP, if they are relevant to be
backported. If they should not be included in drm-intel-next-fixes,
p
On Wed, Sep 26, 2018 at 10:42:25PM +, Souza, Jose wrote:
> On Tue, 2018-09-25 at 15:17 +0300, Ville Syrjälä wrote:
> > On Mon, Sep 24, 2018 at 06:16:49PM -0700, José Roberto de Souza
> > wrote:
> > > For ICL type-c ports there is a aux power restriction, it can only
> > > be
> > > enabled while
Quoting Tvrtko Ursulin (2018-10-02 10:05:11)
>
> On 01/10/2018 20:39, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-10-01 17:41:00)
> >>
> >> On 01/10/2018 17:24, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2018-10-01 17:15:24)
> + len = sizeof(struct drm_i915_query_engine_
sna/gen9+: Had to split out wm_kernel from the sna_composite_op flags,
otherwise new shader kernels go beyond existing flags field.
Signed-off-by: Stanislav Lisovskiy
---
src/render_program/Makefile.am| 2 +
.../exa_wm_src_sample_argb_ayuv.g8a | 60 +
.../exa
During driver load it's considered that the i915_driver_create()
function fails only in case of insufficient memory. Indeed, in
case of failure of i915_driver_create(), the load function
returns indiscriminately -ENOMEM ignoring the real cause of
failure.
In i915_driver_create() get the consistent
== Series Details ==
Series: drm/i915/psr: Enable PSR1 on gen-9+ HW (rev2)
URL : https://patchwork.freedesktop.org/series/49312/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4911_full -> Patchwork_10319_full =
== Summary - WARNING ==
Minor unknown changes coming with Pa
On Mon, 01 Oct 2018 22:17:54 +0200, Daniele Ceraolo Spurio
wrote:
If the HW has not processed the db invalidation request yet, clearing
the cookie can generate a db ring. We clear the cookie when we
(re-)allocate the doorbell so no need to do it on destroy as well as no
one is going to look a
On 01/10/2018 20:39, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-10-01 17:41:00)
On 01/10/2018 17:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-10-01 17:15:24)
+ len = sizeof(struct drm_i915_query_engine_info) +
+ I915_NUM_ENGINES * sizeof(struct drm_i915_engine
On Thu, Sep 06, 2018 at 12:15:30AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/intel_csr.c Added ICL Stepping info. (rev2)
> URL : https://patchwork.freedesktop.org/series/49058/
> State : success
Thanks for the patch pushed to -dinq.
For the future: for the one line de
> > struct intel_device_info *device_info;
> > struct drm_i915_private *i915;
> > + int err;
> >
> > i915 = kzalloc(sizeof(*i915), GFP_KERNEL);
> > if (!i915)
> > return NULL;
>
> Ahem.
oh yes :)
Thanks,
Andi
___
On Mon, Oct 01, 2018 at 05:29:07PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Plane sanitation needs vblank interrupts (on account of CxSR disable).
> So let's restore vblank interrupts earlier.
>
> v2: Make it actually build
>
> Cc: sta...@vger.kernel.org
> Cc: Dennis
> Tested-by:
Previously we hesitated in adding the hw probe for the actual GPU
frequency for rps_boost as it is quite cumbersome, but given some
surprising HW behaviour it would be useful to know both the RPS boost
state and the actual HW state in one location.
Reported-by: Tomi Sarvela
Signed-off-by: Chris W
== Series Details ==
Series: drm/i915/psr: Enable PSR1 on gen-9+ HW (rev2)
URL : https://patchwork.freedesktop.org/series/49312/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4911_full -> Patchwork_10318_full =
== Summary - WARNING ==
Minor unknown changes coming with Pa
Quoting Antonio Argenziano (2018-10-01 22:53:46)
> Fair enough.
>
> Acked-by: Antonio Argenziano
>
> for the series.
Please, read the following chapters (they're applicable for the patch
tag meanings in IGT, too):
https://www.kernel.org/doc/html/v4.18/process/submitting-patches.html#when-to-us
On Mon, Oct 01, 2018 at 11:35:05PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 24, 2018 at 06:12:27PM +0200, Daniel Vetter wrote:
> > On Thu, Sep 20, 2018 at 09:51:44PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Check the infoframes and infoframe enable state when comparing t
== Series Details ==
Series: drm/i915/psr: Enable PSR1 on gen-9+ HW (rev2)
URL : https://patchwork.freedesktop.org/series/49312/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4911 -> Patchwork_10319 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https:
== Series Details ==
Series: drm/i915/psr: Enable PSR1 on gen-9+ HW (rev2)
URL : https://patchwork.freedesktop.org/series/49312/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4911 -> Patchwork_10318 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https:
Quoting Jyoti Yadav (2018-10-02 05:42:27)
> DC5 and DC6 counter register tells about residency of DC5 and DC6.
> These registers are same for SKL and ICL.
>
> v2 : Remove csr_version check.
> Added generic check regarding DC counters for Gen9 onwards. (Rodrigo)
>
> Signed-off-by: Jyoti Yada
== Series Details ==
Series: drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs
entry. (rev2)
URL : https://patchwork.freedesktop.org/series/49800/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4911_full -> Patchwork_10317_full =
== Summary - WARNING ==
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