Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On Wed, 19 Dec 2018, "Winkler, Tomas" wrote: >> >> On Wed, 19 Dec 2018, "C, Ramalingam" wrote: >> > On 12/19/2018 8:05 PM, Daniel Vetter wrote: >> >> On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: >> >>> struct intel_hdcp { >> >>> @@ -414,6 +430,24 @@ struct intel_hdcp { >> >>>

Re: [Intel-gfx] [PATCH] drm/amd: Compile fix for amdgpu_dm.c

Hi Mika, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20181219] [cannot apply to v4.20-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dsc: Fix the deadlock in dsc debugfs node

== Series Details == Series: drm/i915/dsc: Fix the deadlock in dsc debugfs node URL : https://patchwork.freedesktop.org/series/54312/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333_full -> Patchwork_11131_full Summary -

[Intel-gfx] ✗ Fi.CI.BAT: failure for MST refcounting/atomic helpers cleanup (rev2)

== Series Details == Series: MST refcounting/atomic helpers cleanup (rev2) URL : https://patchwork.freedesktop.org/series/54030/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11132 Summary --- **FAI

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for MST refcounting/atomic helpers cleanup (rev2)

== Series Details == Series: MST refcounting/atomic helpers cleanup (rev2) URL : https://patchwork.freedesktop.org/series/54030/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends Okay

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MST refcounting/atomic helpers cleanup (rev2)

== Series Details == Series: MST refcounting/atomic helpers cleanup (rev2) URL : https://patchwork.freedesktop.org/series/54030/ State : warning == Summary == $ dim checkpatch origin/drm-tip f950c3fa3447 drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends -:84: CHECK:OPEN_

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsc: Fix the deadlock in dsc debugfs node

== Series Details == Series: drm/i915/dsc: Fix the deadlock in dsc debugfs node URL : https://patchwork.freedesktop.org/series/54312/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11131 Summary ---

[Intel-gfx] [PATCH v2 14/16] drm/dp_mst: Start tracking per-port VCPI allocations

There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking

[Intel-gfx] [PATCH v2 15/16] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()

It occurred to me that we never actually check this! So let's start doing that. Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Harry Wentland Cc: Juston Li --- drivers/gpu/drm/drm_dp_mst_topology.c | 11 +++ 1 file changed, 7 insertions(+), 4

[Intel-gfx] [PATCH v2 07/16] drm/amdgpu/display: Keep malloc ref to MST port

Just like i915 and nouveau, it's a good idea for us to hold a malloc reference to the port here so that we never pass a freed pointer to any of the DP MST helper functions. Also, we stop unsetting aconnector->port in dm_dp_destroy_mst_connector(). There's literally no point to that assignment that

[Intel-gfx] [PATCH v2 11/16] drm/nouveau: Stop unsetting mstc->port, use malloc refs

Same as we did for i915, but for nouveau this time. Additionally, we grab a malloc reference to the port that lasts for the entire lifetime of nv50_mstc, which gives us the guarantee that mstc->port will always point to valid memory for as long as the mstc stays around. Signed-off-by: Lyude Paul

[Intel-gfx] [PATCH v2 13/16] drm/dp_mst: Add some atomic state iterator macros

Changes since v6: - Move EXPORT_SYMBOL() for drm_dp_mst_topology_state_funcs to this commit - Document __drm_dp_mst_state_iter_get() and note that it shouldn't be called directly Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Harry Wentland Cc:

[Intel-gfx] [PATCH v2 08/16] drm/nouveau: Remove bogus cleanup in nv50_mstm_add_connector()

Trying to destroy the connector using mstc->connector.funcs->destroy() if connector initialization fails is wrong: there is no possible codepath in nv50_mstc_new where nv50_mstm_add_connector() would return <0 and mstc would be non-NULL. Signed-off-by: Lyude Paul Cc: Daniel Vetter Cc: David Airl

[Intel-gfx] [PATCH v2 10/16] drm/nouveau: Keep malloc references to MST ports

Now that we finally have a sane way to keep port allocations around, use it to fix the potential unchecked ->port accesses that nouveau makes by making sure we keep the mst port allocated for as long as it's drm_connector is accessible. Additionally, now that we've guaranteed that mstc->port is al

[Intel-gfx] [PATCH v2 09/16] drm/nouveau: Remove unnecessary VCPI checks in nv50_msto_cleanup()

There is no need to look at the port's VCPI allocation before calling drm_dp_mst_deallocate_vcpi(), as we already have msto->disabled to let us avoid cleaning up an msto more then once. The DP MST core will never call drm_dp_mst_deallocate_vcpi() on it's own, which is presumably what these checks a

[Intel-gfx] [PATCH v2 16/16] drm/nouveau: Use atomic VCPI helpers for MST

Currently, nouveau uses the yolo method of setting up MST displays: it uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the display configuration. These helpers don't take care to make sure they take a reference to the mstb port that they're checking, and additionally don't actual

[Intel-gfx] [PATCH v2 04/16] drm/dp_mst: Stop releasing VCPI when removing ports from topology

This has never actually worked, and isn't needed anyway: the driver's always going to try to deallocate VCPI when it tears down the display that the VCPI belongs to. Signed-off-by: Lyude Paul Reviewed-by: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc: Harry Wentland Cc: Juston Li --- driv

[Intel-gfx] [PATCH v2 01/16] drm/dp_mst: Rename drm_dp_mst_get_validated_(port|mstb)_ref and friends

s/drm_dp_get_validated_port_ref/drm_dp_mst_topology_get_port_validated/ s/drm_dp_put_port/drm_dp_mst_topology_put_port/ s/drm_dp_get_validated_mstb_ref/drm_dp_mst_topology_get_mstb_validated/ s/drm_dp_put_mst_branch_device/drm_dp_mst_topology_put_mstb/ This is a much more consistent naming scheme,

[Intel-gfx] [PATCH v2 03/16] drm/dp_mst: Restart last_connected_port_and_mstb() if topology ref fails

While this isn't a complete fix, this will improve the reliability of drm_dp_get_last_connected_port_and_mstb() pretty significantly during hotplug events, since there's a chance that the in-memory topology tree may not be fully updated when drm_dp_get_last_connected_port_and_mstb() is called and t

[Intel-gfx] [PATCH v2 05/16] drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs

Up until now, freeing payloads on remote MST hubs that just had ports removed has almost never worked because we've been relying on port validation in order to stop us from accessing ports that have already been freed from memory, but ports which need their payloads released due to being removed wi

[Intel-gfx] [PATCH v2 02/16] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports

The current way of handling refcounting in the DP MST helpers is really confusing and probably just plain wrong because it's been hacked up many times over the years without anyone actually going over the code and seeing if things could be simplified. To the best of my understanding, the current s

[Intel-gfx] [PATCH v2 12/16] drm/nouveau: Grab payload lock in nv50_msto_payload()

Going through the currently programmed payloads isn't safe without holding mgr->payload_lock, so actually do that and warn if anyone tries calling nv50_msto_payload() in the future without grabbing the right locks. Signed-off-by: Lyude Paul Cc: Daniel Vetter Cc: David Airlie Cc: Jerry Zuo Cc:

[Intel-gfx] [PATCH v2 06/16] drm/i915: Keep malloc references to MST ports

So that the ports stay around until we've destroyed the connectors, in order to ensure that we don't pass an invalid pointer to any MST helpers once we introduce the new MST VCPI helpers. Changes since v1: * Move drm_dp_mst_get_port_malloc() to where we assign intel_connector->port - danvet Sig

[Intel-gfx] [PATCH v2 00/16] MST refcounting/atomic helpers cleanup

This is the series I've been working on for a while now to get all of the atomic DRM drivers in the tree to use the atomic MST helpers, and to make the atomic MST helpers actually idempotent. Turns out it's a lot more difficult to do that without also fixing how port and branch device refcounting w

Re: [Intel-gfx] [PATCH] drm/i915/dsc: Fix the deadlock in dsc debugfs node

Reviewed-by: Lyude Paul On Wed, 2018-12-19 at 15:51 -0800, Manasi Navare wrote: > The DSC debugfs node causes a possible deadlock situation. This patch > resets the try_again at the beginning of loop to fix this. > > Fixes: e845f099f1c6 ('drm/i915/dsc: Add Per connector debugfs node for DSC > su

[Intel-gfx] [PATCH] drm/i915/dsc: Fix the deadlock in dsc debugfs node

The DSC debugfs node causes a possible deadlock situation. This patch resets the try_again at the beginning of loop to fix this. Fixes: e845f099f1c6 ('drm/i915/dsc: Add Per connector debugfs node for DSC support/enable') Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109097 Cc: Lyude Paul

Re: [Intel-gfx] [PATCH v8] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

On Wed, Dec 19, 2018 at 08:08:51AM +, Chris Wilson wrote: > Quoting Manasi Navare (2018-12-06 00:54:07) > > DSC can be supported per DP connector. This patch adds a per connector > > debugfs node to expose DSC support capability by the kernel. > > The same node can be used from userspace to for

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

> > On Wed, 19 Dec 2018, "C, Ramalingam" wrote: > > On 12/19/2018 8:05 PM, Daniel Vetter wrote: > >> On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: > >>> struct intel_hdcp { > >>> @@ -414,6 +430,24 @@ struct intel_hdcp { > >>>*/ > >>> u8 content_type; > >>>

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4) URL : https://patchwork.freedesktop.org/series/54285/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333_full -> Patchwork_11130_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4) URL : https://patchwork.freedesktop.org/series/54285/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11130

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4) URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Remove H

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev4) URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0f84807bc887 drm/i915: Remove HW semaphores f

Re: [Intel-gfx] uABI / Removing DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig

On Wed, 19 Dec 2018 12:08:18 +0200 Joonas Lahtinen wrote: > To me, it seems almost as if folks are too preoccupied with thinking if > we somehow can do this through tracepoints, to stop and actually think > if we should. Regardless of whether it should or shouldn't, one solution to this is to ma

[Intel-gfx] [PATCH v2] drm/i915: Remove redundant trailing request flush

Now that we perform the request flushing inline with emitting the breadcrumb, we can remove the now redundant manual flush. And we can also remove the infrastructure that remained only for its purpose. v2: emit_breadcrumb_sz is in dwords, but rq->reserved_space is in bytes Signed-off-by: Chris Wi

Re: [Intel-gfx] [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters

On Wed, Oct 24, 2018 at 03:28:16PM -0700, Manasi Navare wrote: > This patch adds inline functions and helpers for obtaining > DP sink's supported DSC parameters like DSC sink support, > eDP compressed BPP supported, maximum slice count supported > by the sink devices, DSC line buffer bit depth supp

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3) URL : https://patchwork.freedesktop.org/series/54285/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5333_full -> Patchwork_11129_full ==

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On Wed, 19 Dec 2018, "C, Ramalingam" wrote: > On 12/19/2018 8:05 PM, Daniel Vetter wrote: >> On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: >>> struct intel_hdcp { >>> @@ -414,6 +430,24 @@ struct intel_hdcp { >>> */ >>> u8 content_type; >>> struct hdcp_port_data port_

Re: [Intel-gfx] [WIP PATCH 03/15] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports

On Wed, 2018-12-19 at 13:48 +0100, Daniel Vetter wrote: > On Tue, Dec 18, 2018 at 04:27:58PM -0500, Lyude Paul wrote: > > On Fri, 2018-12-14 at 10:29 +0100, Daniel Vetter wrote: > > > On Thu, Dec 13, 2018 at 08:25:32PM -0500, Lyude Paul wrote: > > > > The current way of handling refcounting in the

Re: [Intel-gfx] [RFC 3/4] drm/i915/perf: handle interrupts from the OA unit

Quoting Lionel Landwerlin (2018-12-19 18:03:26) > On 19/12/2018 16:19, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2018-12-19 14:37:46) > >> static void free_oa_config(struct drm_i915_private *dev_priv, > >> @@ -1852,6 +1854,13 @@ static void gen7_oa_enable(struct i915_perf_stream > >> *s

Re: [Intel-gfx] [RFC 3/4] drm/i915/perf: handle interrupts from the OA unit

On 19/12/2018 16:19, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-12-19 14:37:46) static void free_oa_config(struct drm_i915_private *dev_priv, @@ -1852,6 +1854,13 @@ static void gen7_oa_enable(struct i915_perf_stream *stream) */ gen7_init_oa_buffer(dev_priv); +

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: add OA interrupt support

== Series Details == Series: drm/i915/perf: add OA interrupt support URL : https://patchwork.freedesktop.org/series/54280/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333_full -> Patchwork_11127_full Summary --- *

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3) URL : https://patchwork.freedesktop.org/series/54285/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11129

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3) URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Remove H

[Intel-gfx] [PATCH i-g-t] i915/gem_workarounds: adding 0xe420 register to WO list

From: talha nassar HW team confirmed that this register is write-only. References: https://bugs.freedesktop.org/show_bug.cgi?id=107338 Cc: Chris Wilson Cc: Mika Kuoppala Signed-off-by: talha nassar --- tests/i915/gem_workarounds.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3)

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation (rev3) URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim checkpatch origin/drm-tip dd18acd49bb2 drm/i915: Remove HW semaphores f

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On 12/19/2018 10:05 PM, Daniel Vetter wrote: On Wed, Dec 19, 2018 at 5:22 PM C, Ramalingam wrote: On 12/19/2018 9:28 PM, Daniel Vetter wrote: On Wed, Dec 19, 2018 at 09:09:00PM +0530, C, Ramalingam wrote: On 12/19/2018 8:46 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:15AM +0530,

[Intel-gfx] [PATCH v2] drm/i915: Remove redundant trailing request flush

Now that we perform the request flushing inline with emitting the breadcrumb, we can remove the now redundant manual flush. And we can also remove the infrastructure that remained only for its purpose. v2: emit_breadcrumb_sz is in dwords, but rq->reserved_space is in bytes Signed-off-by: Chris Wi

Re: [Intel-gfx] [RFC v3 1/3] PM/runtime: Add a new interface to get accounted time

On Wed, 19 Dec 2018 at 17:36, Ulf Hansson wrote: > > On Wed, 19 Dec 2018 at 14:26, Vincent Guittot > wrote: > > > > On Wed, 19 Dec 2018 at 11:43, Ulf Hansson wrote: > > > > > > On Wed, 19 Dec 2018 at 11:34, Vincent Guittot > > > wrote: > > > > > > > > On Wed, 19 Dec 2018 at 11:21, Ulf Hansson

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4)

== Series Details == Series: series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4) URL : https://patchwork.freedesktop.org/series/54213/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5333_full -> Patchwork_11126_full =

[Intel-gfx] [PATCH v2] drm/i915: Remove redundant trailing request flush

Now that we perform the request flushing inline with emitting the breadcrumb, we can remove the now redundant manual flush. And we can also remove the infrastructure that remained only for its purpose. v2: emit_breadcrumb_sz is in dwords, but rq->reserved_space is in bytes Signed-off-by: Chris Wi

Re: [Intel-gfx] [PATCH 4/9] drm/i915: Remove redundant trailing request flush

Quoting Chris Wilson (2018-12-19 14:57:42) > @@ -616,9 +612,13 @@ i915_request_alloc(struct intel_engine_cs *engine, > struct i915_gem_context *ctx) > * i915_request_add() call can't fail. Note that the reserve may need > * to be redone if the request is not actually submitted st

Re: [Intel-gfx] [RFC v3 1/3] PM/runtime: Add a new interface to get accounted time

On Wed, 19 Dec 2018 at 14:26, Vincent Guittot wrote: > > On Wed, 19 Dec 2018 at 11:43, Ulf Hansson wrote: > > > > On Wed, 19 Dec 2018 at 11:34, Vincent Guittot > > wrote: > > > > > > On Wed, 19 Dec 2018 at 11:21, Ulf Hansson wrote: > > > > > > > > > > > > > > > > > > > diff --git a/drivers/base

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On Wed, Dec 19, 2018 at 5:22 PM C, Ramalingam wrote: > > > On 12/19/2018 9:28 PM, Daniel Vetter wrote: > > On Wed, Dec 19, 2018 at 09:09:00PM +0530, C, Ramalingam wrote: > >> On 12/19/2018 8:46 PM, Daniel Vetter wrote: > >>> On Thu, Dec 13, 2018 at 09:31:15AM +0530, Ramalingam C wrote: > Enum

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On 12/19/2018 9:28 PM, Daniel Vetter wrote: On Wed, Dec 19, 2018 at 09:09:00PM +0530, C, Ramalingam wrote: On 12/19/2018 8:46 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:15AM +0530, Ramalingam C wrote: Enums and macros are defined for HDCP2.2 link check. Signed-off-by: Ramalingam

Re: [Intel-gfx] [RFC 3/4] drm/i915/perf: handle interrupts from the OA unit

Quoting Lionel Landwerlin (2018-12-19 14:37:46) > static void free_oa_config(struct drm_i915_private *dev_priv, > @@ -1852,6 +1854,13 @@ static void gen7_oa_enable(struct i915_perf_stream > *stream) > */ > gen7_init_oa_buffer(dev_priv); > > + if (stream->oa_interrupt_moni

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54285/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11128 ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: add OA interrupt support

== Series Details == Series: drm/i915/perf: add OA interrupt support URL : https://patchwork.freedesktop.org/series/54280/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11127 Summary --- **WARNING**

Re: [Intel-gfx] [PATCH v9 37/39] drm/i915: Fix KBL HDCP2.2 encrypt status signalling

On 12/19/2018 9:10 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:39AM +0530, Ramalingam C wrote: Implement the required WA sequence for KBL to fix the incorrect positioning of the window of oppurtunity and enc_en signalling. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/inte

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Remove HW semap

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On Wed, Dec 19, 2018 at 09:09:00PM +0530, C, Ramalingam wrote: > > On 12/19/2018 8:46 PM, Daniel Vetter wrote: > > On Thu, Dec 13, 2018 at 09:31:15AM +0530, Ramalingam C wrote: > > > Enums and macros are defined for HDCP2.2 link check. > > > > > > Signed-off-by: Ramalingam C > > > --- > > > in

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54285/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3578a1217c9a drm/i915: Remove HW semaphores for gen7

Re: [Intel-gfx] [PATCH v9 09/39] drm/i915: Enable and Disable of HDCP2.2

On Thu, Dec 13, 2018 at 09:31:11AM +0530, Ramalingam C wrote: > Considering that HDCP2.2 is more secure than HDCP1.4, When a setup > supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled. > > When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is > enabled. > > This change implements a

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On 12/19/2018 9:05 PM, Daniel Vetter wrote: On Wed, Dec 19, 2018 at 08:35:48PM +0530, C, Ramalingam wrote: On 12/19/2018 8:05 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: + if (!hdcp->is_repeater && shim->config_stream_type) { + /*

Re: [Intel-gfx] [PATCH v9 08/39] drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking

On Thu, Dec 13, 2018 at 09:31:10AM +0530, Ramalingam C wrote: > "hdcp_encrypted" flag is defined to denote the HDCP1.4 encryption status. > This SW tracking is used to determine the need for real hdcp1.4 disable > and hdcp_check_link upon CP_IRQ. > > On CP_IRQ we filter the CP_IRQ related to the s

Re: [Intel-gfx] [PATCH v9 37/39] drm/i915: Fix KBL HDCP2.2 encrypt status signalling

On Thu, Dec 13, 2018 at 09:31:39AM +0530, Ramalingam C wrote: > Implement the required WA sequence for KBL to fix the > incorrect positioning of the window of oppurtunity and enc_en > signalling. > > Signed-off-by: Ramalingam C > --- > drivers/gpu/drm/i915/intel_hdcp.c | 29 +

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On 12/19/2018 8:46 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:15AM +0530, Ramalingam C wrote: Enums and macros are defined for HDCP2.2 link check. Signed-off-by: Ramalingam C --- include/drm/drm_hdcp.h | 8 1 file changed, 8 insertions(+) diff --git a/include/drm/drm_

Re: [Intel-gfx] [PATCH v9 12/39] drm/i915: Implement HDCP2.2 repeater authentication

On 12/19/2018 8:18 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:14AM +0530, Ramalingam C wrote: Implements the HDCP2.2 repeaters authentication steps such as verifying the downstream topology and sending stream management information. v2: Rebased. v3: -EINVAL is returned for topol

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On Wed, Dec 19, 2018 at 08:35:48PM +0530, C, Ramalingam wrote: > On 12/19/2018 8:05 PM, Daniel Vetter wrote: > > On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: > > > + if (!hdcp->is_repeater && shim->config_stream_type) { > > > + /* > > > + * Errata for DP: As Stream

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/perf: add OA interrupt support

== Series Details == Series: drm/i915/perf: add OA interrupt support URL : https://patchwork.freedesktop.org/series/54280/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: rework aging tail workaround Okay! Commit: drm/i915/perf: add new

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: add OA interrupt support

== Series Details == Series: drm/i915/perf: add OA interrupt support URL : https://patchwork.freedesktop.org/series/54280/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2834454cd419 drm/i915/perf: rework aging tail workaround -:197: CHECK:SPACING: No space is necessary after a

Re: [Intel-gfx] [RFC v3 1/3] PM/runtime: Add a new interface to get accounted time

On Wed, 19 Dec 2018 at 10:58, Ulf Hansson wrote: > > On Tue, 18 Dec 2018 at 15:55, Vincent Guittot > wrote: > > > > Some drivers (like i915/drm) need to get the accounted suspended time. > > pm_runtime_accounted_time_get() will return the suspended or active > > accounted time until now. > > I su

Re: [Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

On Wed, Dec 19, 2018 at 03:21:56PM +0100, Rafael J. Wysocki wrote: > On Wed, Dec 19, 2018 at 1:39 PM Daniel Vetter wrote: > > > > This is the much more correct fix for my earlier attempt at: > > > > https://lkml.org/lkml/2018/12/10/118 > > > > Short recap: > > > > - There's not actually a locking

Re: [Intel-gfx] [PATCH v9 07/39] drm/i915: MEI interface definition

On Wed, Dec 19, 2018 at 08:45:41PM +0530, C, Ramalingam wrote: > > On 12/19/2018 7:30 PM, Daniel Vetter wrote: > > On Thu, Dec 13, 2018 at 09:31:09AM +0530, Ramalingam C wrote: > > > Defining the mei-i915 interface functions and initialization of > > > the interface. > > > > > > v2: > > >Adju

Re: [Intel-gfx] [PATCH v9 13/39] drm: HDCP2.2 link check related constants

On Thu, Dec 13, 2018 at 09:31:15AM +0530, Ramalingam C wrote: > Enums and macros are defined for HDCP2.2 link check. > > Signed-off-by: Ramalingam C > --- > include/drm/drm_hdcp.h | 8 > 1 file changed, 8 insertions(+) > > diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h >

Re: [Intel-gfx] [PATCH v9 07/39] drm/i915: MEI interface definition

On 12/19/2018 7:30 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:09AM +0530, Ramalingam C wrote: Defining the mei-i915 interface functions and initialization of the interface. v2: Adjust to the new interface changes. [Tomas] Added further debug logs for the failures at MEI i/f.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4)

== Series Details == Series: series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4) URL : https://patchwork.freedesktop.org/series/54213/ State : success == Summary == CI Bug Log - changes from CI_DRM_5333 -> Patchwork_11126 ===

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On 12/19/2018 8:05 PM, Daniel Vetter wrote: On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: Implements HDCP2.2 authentication for hdcp2.2 receivers, with following steps: Authentication and Key exchange (AKE). Locality Check (LC). Session Key Exchange(SKE).

Re: [Intel-gfx] [PATCH v9 04/39] component: alloc component_match without any comp to match

On Wed, Dec 19, 2018 at 02:42:45PM +0100, Daniel Vetter wrote: > On Thu, Dec 13, 2018 at 09:31:06AM +0530, Ramalingam C wrote: > > If all the components associated to a component master is not added > > to the component framework due to the HW capability or Kconfig > > selection, component_match wi

Re: [Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

On Wed, Dec 19, 2018 at 02:26:22PM +0100, Daniel Vetter wrote: > On Wed, Dec 19, 2018 at 02:18:25PM +0100, Daniel Vetter wrote: > > On Wed, Dec 19, 2018 at 01:49:30PM +0100, Greg Kroah-Hartman wrote: > > > On Wed, Dec 19, 2018 at 01:39:09PM +0100, Daniel Vetter wrote: > > > > --- a/include/linux/de

[Intel-gfx] [PATCH 8/9] drm/i915/ringbuffer: Move irq seqno barrier to the GPU for gen5

The irq_seqno_barrier is a tradeoff between doing work on every request (on the GPU) and doing work after every interrupt (on the CPU). We presume we have many more requests than interrupts! However, for Ironlake, the workaround is a pretty hideous usleep() and so even though it was found we need t

[Intel-gfx] [PATCH 5/9] drm/i915/ringbuffer: Remove irq-seqno w/a for gen6/7 rcs

Having transitioned to using PIPECONTROL to combine the flush with the breadcrumb write using their post-sync functions, assume that this will resolve the serialisation with the subsequent MI_USER_INTERRUPT. That is when inspecting the breadcrumb after an interrupt we can rely on the write being po

[Intel-gfx] [PATCH 6/9] drm/i915/ringbuffer: Remove irq-seqno w/a for gen6 xcs

The MI_FLUSH_DW does appear coherent with the following MI_USER_INTERRUPT, but only on Sandybridge. Ivybridge requires a heavier hammer, but on Sandybridge we can stop requiring the irq_seqno barrier. Testcase: igt/gem_sync Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_ringbuffer.c

[Intel-gfx] [PATCH 9/9] drm/i915: Drop unused engine->irq_seqno_barrier w/a

Now that we have eliminated the CPU-side irq_seqno_barrier by moving the delays on the GPU before emitting the MI_USER_INTERRUPT, we can remove the engine->irq_seqno_barrier infrastructure. Though intentionally slowing down the GPU is nasty, so is the code we can now remove! Signed-off-by: Chris W

[Intel-gfx] [PATCH 7/9] drm/i915/ringbuffer: Move irq seqno barrier to the GPU for gen7

The irq_seqno_barrier is a tradeoff between doing work on every request (on the GPU) and doing work after every interrupt (on the CPU). We presume we have many more requests than interrupts! However, the current w/a for Ivybridge is an implicit delay that currently fails sporadically and consistent

[Intel-gfx] [PATCH 3/9] drm/i915/ringbuffer: Pull the render flush into breadcrumb emission

In preparation for removing the manual EMIT_FLUSH prior to emitting the breadcrumb implement the flush inline with writing the breadcrumb for ringbuffer emission. With a combined flush+breadcrumb, we can use a single operation to both flush and after the flush is complete (post-sync) write the bre

[Intel-gfx] [PATCH 4/9] drm/i915: Remove redundant trailing request flush

Now that we perform the request flushing inline with emitting the breadcrumb, we can remove the now redundant manual flush. And we can also remove the infrastructure that remained only for its purpose. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_request.c | 13 ++--

[Intel-gfx] [PATCH 2/9] drm/i915/execlists: Pull the render flush into breadcrumb emission

In preparation for removing the manual EMIT_FLUSH prior to emitting the breadcrumb implement the flush inline with writing the breadcrumb for execlists. Using one command to both flush and write the breadcrumb is naturally a tiny bit faster than splitting it into two. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 1/9] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

The writing is on the wall for the existence of a single execution queue along each engine, and as a consequence we will not be able to track dependencies along the HW queue itself, i.e. we will not be able to use HW semaphores on gen7 as they use a global set of registers (and unlike gen8+ we can

Re: [Intel-gfx] [PATCH v9 12/39] drm/i915: Implement HDCP2.2 repeater authentication

On Thu, Dec 13, 2018 at 09:31:14AM +0530, Ramalingam C wrote: > Implements the HDCP2.2 repeaters authentication steps such as verifying > the downstream topology and sending stream management information. > > v2: Rebased. > v3: > -EINVAL is returned for topology error and rollover scenario. >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4)

== Series Details == Series: series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size (rev4) URL : https://patchwork.freedesktop.org/series/54213/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7854930e939b drm/i915: Prepare for larger CSB status FIFO size 7

[Intel-gfx] ✓ Fi.CI.IGT: success for sysfs: Disable lockdep for driver bind/unbind files (rev2)

== Series Details == Series: sysfs: Disable lockdep for driver bind/unbind files (rev2) URL : https://patchwork.freedesktop.org/series/54238/ State : success == Summary == CI Bug Log - changes from CI_DRM_5332_full -> Patchwork_11124_full S

Re: [Intel-gfx] [PATCH v9 11/39] drm: helper functions for hdcp2 seq_num to from u32

On Thu, Dec 13, 2018 at 09:31:13AM +0530, Ramalingam C wrote: > Library functions for endianness are aligned for 16/32/64 bits. > But hdcp sequence numbers are 24bits(big endian). > So for their conversion to and from u32 helper functions are developed. > > Signed-off-by: Ramalingam C > --- > in

[Intel-gfx] [RFC 3/4] drm/i915/perf: handle interrupts from the OA unit

The OA unit can notify that its circular buffer is half full through an interrupt and we would like to give the application the ability to make use of this interrupt to get rid of CPU checks on the OA buffer. This change wires up the interrupt to the i915-perf stream and leaves it ignored for now.

[Intel-gfx] [RFC 4/4] drm/i915/perf: add interrupt enabling parameter

This let's the application choose to be driven by the interrupt mechanism of the HW. In conjuction with long periods for checks for the availability of data on the CPU, this can reduce the CPU load when doing capture of OA data. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf

[Intel-gfx] [RFC 0/4] drm/i915/perf: add OA interrupt support

Hi all, Tests run by the GPA/vTune teams reported a high CPU consumption on polling data from the i915-perf stream. This is due to a design decision to check the OA buffer head/tail pointers 200 times per seconds. The reasonning being not using the interrupt was initially that you could want to pr

[Intel-gfx] [RFC 1/4] drm/i915/perf: rework aging tail workaround

We're about to introduce an options to open the perf stream, giving the user ability to configure how often it wants the kernel to pull the OA registers for available data. Right now the workaround against the OA tail pointer race condition requires at least twice the internal kernel pulling timer

[Intel-gfx] [RFC 2/4] drm/i915/perf: add new open param to configure polling of OA buffer

This new parameter let's the application choose how often the OA buffer should be checked on the CPU side for data availability. Longer polling period tend to reduce CPU overhead if the application does not care about somewhat real time data collection. Signed-off-by: Lionel Landwerlin --- drive

Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication

On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote: > Implements HDCP2.2 authentication for hdcp2.2 receivers, with > following steps: > Authentication and Key exchange (AKE). > Locality Check (LC). > Session Key Exchange(SKE). > DP Errata for stream type configura

Re: [Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

On Wed, Dec 19, 2018 at 1:39 PM Daniel Vetter wrote: > > This is the much more correct fix for my earlier attempt at: > > https://lkml.org/lkml/2018/12/10/118 > > Short recap: > > - There's not actually a locking issue, it's just lockdep being a bit > too eager to complain about a possible deadl

Re: [Intel-gfx] [PATCH v9 07/39] drm/i915: MEI interface definition

On Thu, Dec 13, 2018 at 09:31:09AM +0530, Ramalingam C wrote: > Defining the mei-i915 interface functions and initialization of > the interface. > > v2: > Adjust to the new interface changes. [Tomas] > Added further debug logs for the failures at MEI i/f. > port in hdcp_port data is equipped

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