[Intel-gfx] [PATCH] drm/modes: Prevent division by zero htotal

2019-01-22 Thread Tina Zhang
This patch prevents division by zero htotal. Signed-off-by: Tina Zhang Cc: Adam Jackson Cc: Dave Airlie Cc: Daniel Vetter --- drivers/gpu/drm/drm_modes.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Kahola, Mika
On Tue, 2019-01-22 at 21:09 +0200, Ville Syrjälä wrote: > On Tue, Jan 22, 2019 at 08:09:40PM +0200, Jani Nikula wrote: > > On Tue, 22 Jan 2019, Ville Syrjälä > > wrote: > > > On Tue, Jan 22, 2019 at 02:58:24PM +0200, Mika Kahola wrote: > > > > Avoid divide by zero warning on static analysis. > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: correct the pitch check for NV12 framebuffer (rev3)

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915: correct the pitch check for NV12 framebuffer (rev3) URL : https://patchwork.freedesktop.org/series/53928/ State : success == Summary == CI Bug Log - changes from CI_DRM_5468 -> Patchwork_12011 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: do a posting read after irq install

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/icl: do a posting read after irq install URL : https://patchwork.freedesktop.org/series/55598/ State : success == Summary == CI Bug Log - changes from CI_DRM_5468_full -> Patchwork_12010_full Summary

Re: [Intel-gfx] [PATCH] drm/i915/gvt: switch to kernel types

2019-01-22 Thread Zhenyu Wang
On 2019.01.21 11:51:41 +0200, Jani Nikula wrote: > Mixed C99 and kernel types use is getting ugly. Prefer kernel types. > > sed -i 's/\buint\(8\|16\|32\|64\)_t\b/u\1/g' > > Signed-off-by: Jani Nikula > --- Looks good to me. Acked-by: Zhenyu Wang Will queue this up. Thanks! >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: do a posting read after irq install

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/icl: do a posting read after irq install URL : https://patchwork.freedesktop.org/series/55598/ State : success == Summary == CI Bug Log - changes from CI_DRM_5468 -> Patchwork_12010 Summary ---

Re: [Intel-gfx] [PATCH] drm/i915/icl: do a posting read after irq install

2019-01-22 Thread Daniele Ceraolo Spurio
On 1/22/2019 6:32 PM, Daniele Ceraolo Spurio wrote: When reading GEN11_GT_INTR_DWx closely after enabling the interrupts in gen11_irq_postinstall, the returned value is garbage. This can To clarify, this only happens (or at least I've only seen it) during runtime_resume. Daniele cause

[Intel-gfx] [PATCH] drm/i915/icl: do a posting read after irq install

2019-01-22 Thread Daniele Ceraolo Spurio
When reading GEN11_GT_INTR_DWx closely after enabling the interrupts in gen11_irq_postinstall, the returned value is garbage. This can cause other parts of the setup code (e.g. gen11_reset_one_iir) to think that there are interrupts to be cleared when there are none. The garbage value is only

Re: [Intel-gfx] [PATCH 20/34] drm/i915: Introduce concept of per-timeline (context) HWSP

2019-01-22 Thread John Harrison
On 1/21/2019 14:21, Chris Wilson wrote: Supplement the per-engine HWSP with a per-timeline HWSP. That is a per-request pointer through which we can check a local seqno, abstracting away the presumption of a global seqno. In this first step, we point each request back into the engine's HWSP so

Re: [Intel-gfx] [PATCH 12/34] drm/i915: Issue engine resets onto idle engines

2019-01-22 Thread Chris Wilson
Quoting John Harrison (2019-01-23 01:18:36) > On 1/21/2019 14:20, Chris Wilson wrote: > > @@ -479,8 +477,6 @@ static int __igt_reset_engine(struct drm_i915_private > > *i915, bool active) > > break; > > } > > > > -

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_schedule: Verify that using HW semaphores doesn't block

2019-01-22 Thread Chris Wilson
We may use HW semaphores to schedule nearly-ready work such that they are already spinning on the GPU waiting for the completion on another engine. However, we don't want for that spinning task to actually block any real work should it be scheduled. Signed-off-by: Chris Wilson ---

Re: [Intel-gfx] [PATCH 12/34] drm/i915: Issue engine resets onto idle engines

2019-01-22 Thread John Harrison
On 1/21/2019 14:20, Chris Wilson wrote: Always perform the requested reset, even if we believe the engine is idle. Presumably there was a reason the caller wanted the reset, and in the near future we lose the easy tracking for whether the engine is idle. Signed-off-by: Chris Wilson ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120 URL : https://patchwork.freedesktop.org/series/55586/ State : success == Summary == CI Bug Log - changes from CI_DRM_5465_full -> Patchwork_12009_full

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/4] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks (rev2)

2019-01-22 Thread Souza, Jose
On Fri, 2019-01-18 at 22:23 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v4,1/4] drm/i915/psr: Allow PSR2 to be > enabled when debugfs asks (rev2) > URL : https://patchwork.freedesktop.org/series/55379/ > State : success IGT series that this patches was

Re: [Intel-gfx] [PATCH 33/34] drm/i915: Prioritise non-busywait semaphore workloads

2019-01-22 Thread Chris Wilson
Quoting Chris Wilson (2019-01-21 22:21:16) > We don't want to busywait on the GPU if we have other work to do. If we > give non-busywaiting workloads higher (initial) priority than workloads > that require a busywait, we will prioritise work that is ready to run > immediately. Fwiw, without

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Apply a subtest filter (rev3)

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Apply a subtest filter (rev3) URL : https://patchwork.freedesktop.org/series/55576/ State : success == Summary == CI Bug Log - changes from CI_DRM_5465_full -> Patchwork_12008_full Summary

Re: [Intel-gfx] [PATCH 3/4] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3/4 wakeup time

2019-01-22 Thread Dhinakaran Pandiyan
On Wed, 2019-01-16 at 15:43 -0800, José Roberto de Souza wrote: > A new field with the training pattern(TP) wakeup time for PSR2 was These values are for PSR1, aren't they? Like you write in Patch 4/4, the PSR2 control register does not have a bit to set anything other than Tp2. -DK > added to

Re: [Intel-gfx] [PATCH 4/4] drm/i915/psr: Add HBR3 support

2019-01-22 Thread Dhinakaran Pandiyan
On Wed, 2019-01-16 at 15:43 -0800, José Roberto de Souza wrote: > If the sink and source supports HBR3, TP4 should be used as link > training pattern. > For PSR2 there is no register to set and enable TP4 but according to > eDP spec TP3 is still a training pattern acceptable for HBR3 panels. >

Re: [Intel-gfx] [PATCH 02/34] drm/i915/execlists: Suppress preempting self

2019-01-22 Thread Chris Wilson
Quoting John Harrison (2019-01-22 22:18:46) > On 1/21/2019 14:20, Chris Wilson wrote: > > In order to avoid preempting ourselves, we currently refuse to schedule > > the tasklet if we reschedule an inflight context. However, this glosses > > over a few issues such as what happens after a CS

Re: [Intel-gfx] [PATCH 08/34] drm/i915: Make all GPU resets atomic

2019-01-22 Thread Chris Wilson
Quoting John Harrison (2019-01-22 22:19:04) > On 1/21/2019 14:20, Chris Wilson wrote: > > In preparation for the next few commits, make resetting the GPU atomic. > > Currently, we have prepared gen6+ for atomic resetting of individual > > engines, but now there is a requirement to perform the

Re: [Intel-gfx] [PATCH 09/34] drm/i915/guc: Disable global reset

2019-01-22 Thread John Harrison
On 1/21/2019 14:20, Chris Wilson wrote: The guc (and huc) currently inexcruitably depend on struct_mutex for device reinitialisation from inside the reset, and indeed taking any mutex here is verboten (as we must be able to reset from underneath any of our mutexes). That makes recovering the guc

Re: [Intel-gfx] [PATCH 02/34] drm/i915/execlists: Suppress preempting self

2019-01-22 Thread John Harrison
On 1/21/2019 14:20, Chris Wilson wrote: In order to avoid preempting ourselves, we currently refuse to schedule the tasklet if we reschedule an inflight context. However, this glosses over a few issues such as what happens after a CS completion event and we then preempt the newly executing

Re: [Intel-gfx] [PATCH 08/34] drm/i915: Make all GPU resets atomic

2019-01-22 Thread John Harrison
On 1/21/2019 14:20, Chris Wilson wrote: In preparation for the next few commits, make resetting the GPU atomic. Currently, we have prepared gen6+ for atomic resetting of individual engines, but now there is a requirement to perform the whole device level reset (just the register poking) from

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120 URL : https://patchwork.freedesktop.org/series/55586/ State : success == Summary == CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12009

Re: [Intel-gfx] [PATCH v8 4/7] drm/i915: use a macro to define MOCS entries

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 21:33:25) > On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote: > > > > Quoting Lucas De Marchi (2019-01-22 05:12:24) > > > Let's use a macro to make tables smaller and at the same time allow us > > > to add fields that apply to all entries in future. > > > > >

Re: [Intel-gfx] [PATCH v8 4/7] drm/i915: use a macro to define MOCS entries

2019-01-22 Thread Lucas De Marchi
On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote: > > Quoting Lucas De Marchi (2019-01-22 05:12:24) > > Let's use a macro to make tables smaller and at the same time allow us > > to add fields that apply to all entries in future. > > > > For the sake of readability, I'm calling an exception on

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120 URL : https://patchwork.freedesktop.org/series/55586/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7cdae1834120 drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

[Intel-gfx] [RFC] drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120

2019-01-22 Thread Manasi Navare
On Gen 11 platform, to enable resolutions like 5K@120 where the pixel clock is greater than pipe pixel rate, we need to split it across 2 pipes and enable it using DSC and big joiner. In order to support this dual pipe single port mode, we need to link two crtcs involved in this ganged mode. This

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Apply a subtest filter (rev3)

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Apply a subtest filter (rev3) URL : https://patchwork.freedesktop.org/series/55576/ State : success == Summary == CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12008 Summary ---

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type

2019-01-22 Thread Ville Syrjälä
On Tue, Jan 22, 2019 at 08:39:53PM -, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. > NAK reply type > URL : https://patchwork.freedesktop.org/series/55581/ > State : failure > > == Summary == > > CI Bug Log -

[Intel-gfx] [PATCH i-g-t v2] tests/kms_flip: Add test to check suspend/resume

2019-01-22 Thread Shayenne Moura
This patch adds one test to evaluate suspend/resume operations using kms_flip. Signed-off-by: Shayenne Moura v2: Reduce test time to 10 (Daniel) --- tests/kms_flip.c | 1 + 1 file changed, 1 insertion(+) mode change 100644 => 100755 tests/kms_flip.c diff --git a/tests/kms_flip.c

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type

2019-01-22 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type URL : https://patchwork.freedesktop.org/series/55581/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12007

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type

2019-01-22 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type URL : https://patchwork.freedesktop.org/series/55581/ State : warning == Summary == $ dim checkpatch origin/drm-tip 84875e8bb29f drm/dp/mst: Provide defines for ACK vs. NAK reply

[Intel-gfx] [PATCH] drm/i915/selftests: Apply a subtest filter

2019-01-22 Thread Chris Wilson
In bringup on simulated HW even rudimentary tests are slow, and so many may fail that we want to be able to filter out the noise to focus on the specific problem. Even just the tests groups provided for igt is not specific enough, and we would like to isolate one particular subtest (and probably

[Intel-gfx] [PATCH v2 1/2] drm/dp/mst: Provide defines for ACK vs. NAK reply type

2019-01-22 Thread Ville Syrjala
From: Ville Syrjälä Make the code a bit easier to read by providing symbolic names for the reply_type (ACK vs. NAK). Also clean up some brace stuff while at it. v2: s/DP_REPLY/DP_SIDEBAND_REPLY/ (DK) Fix some checkpatch issues Signed-off-by: Ville Syrjälä Reviewed-by: Dhinakaran Pandiyan

[Intel-gfx] [PATCH v2 2/2] drm/dp/mst: Provide better debugs for NAK replies

2019-01-22 Thread Ville Syrjala
From: Ville Syrjälä Decode the NAK reply fields to make it easier to parse the logs. v2: s/STR/DP_STR/ to avoid conflict with some header stuff (0day) Use drm_dp_mst_req_type_str() more (DK) Signed-off-by: Ville Syrjälä Reviewed-by: Dhinakaran Pandiyan ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Apply a subtest filter (rev2)

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Apply a subtest filter (rev2) URL : https://patchwork.freedesktop.org/series/55576/ State : success == Summary == CI Bug Log - changes from CI_DRM_5464 -> Patchwork_12006 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid divide by zero

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915: Avoid divide by zero URL : https://patchwork.freedesktop.org/series/55560/ State : success == Summary == CI Bug Log - changes from CI_DRM_5464_full -> Patchwork_12005_full Summary ---

[Intel-gfx] [PATCH] drm/i915/selftests: Apply a subtest filter

2019-01-22 Thread Chris Wilson
In bringup on simulated HW even rudimentary tests are slow, and so many may fail that we want to be able to filter out the noise to focus on the specific problem. Even just the tests groups provided for igt is not specific enough, and we would like to isolate one particular subtest (and probably

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Ville Syrjälä
On Tue, Jan 22, 2019 at 08:09:40PM +0200, Jani Nikula wrote: > On Tue, 22 Jan 2019, Ville Syrjälä wrote: > > On Tue, Jan 22, 2019 at 02:58:24PM +0200, Mika Kahola wrote: > >> Avoid divide by zero warning on static analysis. > >> > >> Signed-off-by: Mika Kahola > >> --- > >>

[Intel-gfx] [PATCH i-g-t] i915/selftest: Allow filtering of individual subtests

2019-01-22 Thread Chris Wilson
Take an environment variable, SELFTESTS=foo,bar, and pass that along to the kernel (as i915.st_filter=foo,bar) to provide fine grained test selection. This can be either as an exact match to select only that test, or to exclude only test. For example, SELFTESTS=igt_vma_create,igt_vma_pin1

[Intel-gfx] [PATCH] drm/i915/selftests: Apply a subtest filter

2019-01-22 Thread Chris Wilson
In bringup on simulated HW even rudimentary tests are slow, and so many may fail that we want to be able to filter out the noise to focus on the specific problem. Even just the tests groups provided for igt is not specific enough, and we would like to isolate one particular subtest (and probably

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Jani Nikula
On Tue, 22 Jan 2019, Ville Syrjälä wrote: > On Tue, Jan 22, 2019 at 02:58:24PM +0200, Mika Kahola wrote: >> Avoid divide by zero warning on static analysis. >> >> Signed-off-by: Mika Kahola >> --- >> drivers/gpu/drm/i915/intel_pm.c | 6 -- >> 1 file changed, 4 insertions(+), 2 deletions(-)

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2019-01-22 Thread Lionel Landwerlin
On 22/01/2019 16:25, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2019-01-16 17:36:22) With the currently available parameters for the i915-perf stream, there are still situations that are not well covered : If an application opens the stream with polling disable or at very low frequency

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Enable fastset for non-boot modesets.

2019-01-22 Thread Jani Nikula
On Tue, 08 Jan 2019, Maarten Lankhorst wrote: > Now that our state comparison functions are pretty complete, we should > enable fastset by default when a modeset can be avoided. Even if we're > not completely certain about the inherited state, we can be certain > after the first modeset that our

Re: [Intel-gfx] [PATCH 2/5] drm/i915/backlight: Fix backlight takeover on LPT, v3.

2019-01-22 Thread Jani Nikula
On Tue, 08 Jan 2019, Maarten Lankhorst wrote: > On lynxpoint the bios sometimes sets up the backlight using the CPU > display, but the driver expects using the PWM PCH override register. > > Read the value from the CPU register, then convert it to the other > units by converting from the old

Re: [Intel-gfx] [PATCH 1/5] drm/i915/backlight: Restore backlight on resume, v3.

2019-01-22 Thread Jani Nikula
On Tue, 08 Jan 2019, Maarten Lankhorst wrote: > Restore our saved values for backlight. This way even with fastset on > S4 resume we will correctly restore the backlight to the active values. > > Changes since v1: > - Call enable_backlight() when backlight.level is set. On suspend >

Re: [Intel-gfx] [PATCH 13/15] drm/i915/tv: Generate better pipe timings for TV encoder

2019-01-22 Thread Ville Syrjälä
On Tue, Jan 22, 2019 at 07:22:24PM +0200, Imre Deak wrote: > On Mon, Nov 12, 2018 at 06:59:58PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > To make vblank timestamps work better with the TV encoder let's > > scale the pipe timings such that the relationship between the > > TV

Re: [Intel-gfx] [PATCH 13/15] drm/i915/tv: Generate better pipe timings for TV encoder

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:58PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > To make vblank timestamps work better with the TV encoder let's > scale the pipe timings such that the relationship between the > TV active and TV blanking periods is mirrored in the > corresponding pipe

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12 URL : https://patchwork.freedesktop.org/series/8/ State : success == Summary == CI Bug Log - changes from CI_DRM_5463_full -> Patchwork_12004_full

Re: [Intel-gfx] [PATCH] iommu/intel: quirk to disable DMAR for QM57 igfx

2019-01-22 Thread Joerg Roedel
On Tue, Jan 22, 2019 at 04:48:26PM +0200, Joonas Lahtinen wrote: > According to our IOMMU folks there exists some desire to be able to assign > the iGFX device aka have intel_iommu=on instead of intel_iommu=igfx_off > due to how the devices might be grouped in IOMMU groups. Even when you > would

Re: [Intel-gfx] [PATCH v3] drm/i915: correct the pitch check for NV12 framebuffer

2019-01-22 Thread Sitaram, Raviraj P
Hi Ville, NV12 support for small src viewport sizes and rotation vs clipping scenarios are added into IGT by JP. Commit details are as follows. commit 8614d5eb114a660c3bd7ff77eab8bed53424cd30 Author: Juha-Pekka Heikkila Date: Fri Dec 21 15:42:33 2018 +0200 tests/kms_rotation_crc: add

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2019-01-22 Thread Joonas Lahtinen
Quoting Lionel Landwerlin (2019-01-16 17:36:22) > With the currently available parameters for the i915-perf stream, > there are still situations that are not well covered : > > If an application opens the stream with polling disable or at very low > frequency and OA interrupt enabled, no data

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Ville Syrjälä
On Tue, Jan 22, 2019 at 02:58:24PM +0200, Mika Kahola wrote: > Avoid divide by zero warning on static analysis. > > Signed-off-by: Mika Kahola > --- > drivers/gpu/drm/i915/intel_pm.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid divide by zero

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915: Avoid divide by zero URL : https://patchwork.freedesktop.org/series/55560/ State : success == Summary == CI Bug Log - changes from CI_DRM_5464 -> Patchwork_12005 Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH 27/34] drm/i915: Remove the intel_engine_notify tracepoint

2019-01-22 Thread Tvrtko Ursulin
On 21/01/2019 22:21, Chris Wilson wrote: The global seqno is defunct and so we have no meaningful indicator of forward progress for an engine. You need to listen to the request signaling tracepoints instead. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 2 --

Re: [Intel-gfx] [PATCH 26/34] drm/i915: Identify active requests

2019-01-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-01-22 15:34:07) > > On 21/01/2019 22:21, Chris Wilson wrote: > > To allow requests to forgo a common execution timeline, one question we > > need to be able to answer is "is this request running?". To track > > whether a request has started on HW, we can emit a

Re: [Intel-gfx] [PATCH 26/34] drm/i915: Identify active requests

2019-01-22 Thread Tvrtko Ursulin
On 21/01/2019 22:21, Chris Wilson wrote: To allow requests to forgo a common execution timeline, one question we need to be able to answer is "is this request running?". To track whether a request has started on HW, we can emit a breadcrumb at the beginning of the request and check its

Re: [Intel-gfx] [PATCH 25/34] drm/i915: Track active timelines

2019-01-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-01-22 14:56:32) > > On 21/01/2019 22:21, Chris Wilson wrote: > > Now that we pin timelines around use, we have a clearly defined lifetime > > and convenient points at which we can track only the active timelines. > > This allows us to reduce the list iteration to only

Re: [Intel-gfx] [PATCH 12/15] drm/i915/tv: Add 1080p30/50/60 TV modes

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:57PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Add the missing 1080p TV modes. On gen4 all of them work just fine, > whereas on gen3 only the 30Hz mode actually works correctly. > > Signed-off-by: Ville Syrjälä Matches the spec: Reviewed-by: Imre Deak

Re: [Intel-gfx] [PATCH 11/15] drm/i915/tv: Nuke reported_modes[]

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:56PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Remove the silly reported_modes[] array. I suppse once upon a time > this actually had something to do with modes we reported to userspace. > Now it is just the placeholder for the mode we use for load

Re: [Intel-gfx] [PATCH 25/34] drm/i915: Track active timelines

2019-01-22 Thread Tvrtko Ursulin
On 21/01/2019 22:21, Chris Wilson wrote: Now that we pin timelines around use, we have a clearly defined lifetime and convenient points at which we can track only the active timelines. This allows us to reduce the list iteration to only consider those active timelines and not all.

Re: [Intel-gfx] [PATCH 10/15] drm/i915/tv: Make TV mode autoselection actually useable

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:55PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > The current code insists on picking a new TV mode when > switching between component and non-component cables. > That's super annoying. Let's just keep the current TV > mode unless the new cable type

Re: [Intel-gfx] [PATCH] iommu/intel: quirk to disable DMAR for QM57 igfx

2019-01-22 Thread Joonas Lahtinen
Quoting Joerg Roedel (2019-01-22 13:01:09) > Hi Daniel, > > On Tue, Jan 22, 2019 at 11:46:39AM +0100, Daniel Vetter wrote: > > Note that the string of platforms which have various issues with iommu > > and igfx is very long, thus far we only disabled it where there's no > > workaround to stop it

Re: [Intel-gfx] [PATCH 09/15] drm/i915/tv: Use drm_mode_set_name() to name TV modes

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:54PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > No point in storing the mode names in the array. drm_mode_set_name() > will give us the same names without wasting space for these string > constants. > > Signed-off-by: Ville Syrjälä Reviewed-by: Imre

Re: [Intel-gfx] [PATCH 08/15] drm/i915/tv: Deobfuscate preferred mode selection

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:53PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Rewrite the preferred mode selection to just check > whether the TV modes is HD or SD. For SD TV modes we > favor 480 line modes, for 720p we prefer 720 line modes, > and for 1080i/p we prefer 1080 line

Re: [Intel-gfx] [PATCH v8 5/7] drm/i915: keep track of used entries in MOCS table

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 05:12:25) > Instead of considering we have defined entries for any index in the > table, let's keep track of the ones we explicitly defined. This will > allow Gen 11 to have it's new table defined in which we have holes of > undefined entries. > > Repeated

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12

2019-01-22 Thread Patchwork
== Series Details == Series: drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12 URL : https://patchwork.freedesktop.org/series/8/ State : success == Summary == CI Bug Log - changes from CI_DRM_5463 -> Patchwork_12004

Re: [Intel-gfx] [PATCH v8 6/7] drm/i915: cache number of MOCS entries

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 05:12:26) > Instead of checking the gen number every time we need to know the max > number of entries, just save it into the table struct so we don't need > extra branches throughout the code. This will be useful for Ice Lake > that has 64 rather than 62 defined

Re: [Intel-gfx] [PATCH v8 4/7] drm/i915: use a macro to define MOCS entries

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 05:12:24) > Let's use a macro to make tables smaller and at the same time allow us > to add fields that apply to all entries in future. > > For the sake of readability, I'm calling an exception on 80 chars limit. > Lines are aligned for easy comparison of the

Re: [Intel-gfx] [PATCH v8 3/7] drm/i915/skl: Rework MOCS tables to keep common part in a define

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 05:12:23) > From: Tomasz Lis > > The MOCS tables are going to be very similar across platforms. > > To reduce the amount of copied code, this patch rips the common part and > puts it into a definition valid for all gen9 platforms. > > v2: Made defines for

Re: [Intel-gfx] [PATCH v8 1/7] drm/i915: initialize unused MOCS entries to PTE

2019-01-22 Thread Chris Wilson
Quoting Lucas De Marchi (2019-01-22 05:12:21) > Instead of initializing them to uncached, let's set them to PTE for > kernel tracking. While at it do some minor adjustments to comments and > coding style. > > Signed-off-by: Lucas De Marchi I'm in favour. I do not think this contributes an ABI

Re: [Intel-gfx] [PATCH 07/38] drm/i915: Stop tracking MRU activity on VMA

2019-01-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-01-18 16:03:27) > > On 18/01/2019 14:00, Chris Wilson wrote: > > Our goal is to remove struct_mutex and replace it with fine grained > > locking. One of the thorny issues is our eviction logic for reclaiming > > space for an execbuffer (or GTT mmaping, among a few

Re: [Intel-gfx] [PATCH] drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12

2019-01-22 Thread Juha-Pekka Heikkila
Please ignore this. This patch is all wrong. /Juha-Pekka On 22.1.2019 14.41, Juha-Pekka Heikkila wrote: Using visible plane width for testing NV12 source suitability may fail randomly when plane is clipped. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109381 Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Kahola, Mika
On Tue, 2019-01-22 at 15:07 +0200, Jani Nikula wrote: > On Tue, 22 Jan 2019, Mika Kahola wrote: > > Avoid divide by zero warning on static analysis. > > > > Signed-off-by: Mika Kahola > > --- > > drivers/gpu/drm/i915/intel_pm.c | 6 -- > > 1 file changed, 4 insertions(+), 2 deletions(-) >

Re: [Intel-gfx] [PATCH 07/15] drm/i915/tv: Nuke silly 0 initialzation of xpos/ypos

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:51PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Just assign the margin values directly to xpos/ypos instead > of first initializing to zero and then adding the values. > > Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak > --- >

Re: [Intel-gfx] [PATCH 06/15] drm/i915/tv: Use bools where appropriate

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:50PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > 'component_only' is a bool. Initialize it like a bool. > > Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_tv.c | 24 > 1 file changed,

Re: [Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Jani Nikula
On Tue, 22 Jan 2019, Mika Kahola wrote: > Avoid divide by zero warning on static analysis. > > Signed-off-by: Mika Kahola > --- > drivers/gpu/drm/i915/intel_pm.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c

Re: [Intel-gfx] [PATCH 05/15] drm/i915/tv: Store the TV oversampling factor in the TV mode

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:49PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Store the oversampling factor as a number in the TV modes. We > shall want to arithmetic with this which is easier if it's > a number we can use directly. > > Signed-off-by: Ville Syrjälä Reviewed-by:

[Intel-gfx] [PATCH] drm/i915: Avoid divide by zero

2019-01-22 Thread Mika Kahola
Avoid divide by zero warning on static analysis. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_pm.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8b63afa3a221..6a8e8b3f44c2 100644 ---

Re: [Intel-gfx] [PATCH 04/15] drm/i915/tv: Fix tv mode clocks

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:48PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > The oversample clock is always supposed to be either 108 MHz > or 148.5 MHz. Make it so. > > Signed-off-by: Ville Syrjälä Matches the spec: Reviewed-by: Imre Deak > --- >

Re: [Intel-gfx] [PATCH 03/15] drm/i915/tv: Fix interlaced ysize calculation

2019-01-22 Thread Imre Deak
On Mon, Nov 12, 2018 at 06:59:47PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Fix the calculation of the vertical active period for interlaced > TV modes. > > Signed-off-by: Ville Syrjälä Matches the spec: Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_tv.c | 2 +- >

Re: [Intel-gfx] [PATCH v3 02/15] drm/i915: Don't try to use the hardware frame counter with i965gm TV output

2019-01-22 Thread Imre Deak
On Tue, Nov 27, 2018 at 10:05:50PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > On i965gm the hardware frame counter does not work when > the TV encoder is active. So let's not try to consult > the hardware frame counter in that case. Instead we'll > fall back to the timestamp based

Re: [Intel-gfx] [PATCH 07/34] drm/i915: Refactor out intel_context_init()

2019-01-22 Thread Chris Wilson
Quoting Mika Kuoppala (2019-01-22 12:39:08) > Chris Wilson writes: > > +static inline void > > +intel_context_init(struct intel_context *ce, > > +struct i915_gem_context *ctx, > > +struct intel_engine_cs *engine) > > +{ > > + ce->gem_context = ctx; > > +} > > +

Re: [Intel-gfx] [PATCH 03/34] drm/i915: Show all active engines on hangcheck

2019-01-22 Thread Chris Wilson
Quoting Mika Kuoppala (2019-01-22 12:33:00) > Chris Wilson writes: > > > This turns out to be quite useful if one happens to be debugging > > semaphore deadlocks. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/intel_hangcheck.c | 15 +++ > > 1 file changed, 11

[Intel-gfx] [PATCH] drm/i915: Use fb width to measure fb width instead of visible plane width when verify NV12

2019-01-22 Thread Juha-Pekka Heikkila
Using visible plane width for testing NV12 source suitability may fail randomly when plane is clipped. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109381 Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/intel_sprite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Intel-gfx] [PATCH 07/34] drm/i915: Refactor out intel_context_init()

2019-01-22 Thread Mika Kuoppala
Chris Wilson writes: > Prior to adding a third instance of intel_context_init() and extending > the information stored therewithin, refactor out the common assignments. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_context.c | 7 ++- >

Re: [Intel-gfx] [PATCH 04/34] drm/i915/selftests: Refactor common live_test framework

2019-01-22 Thread Matthew Auld
On Mon, 21 Jan 2019 at 22:22, Chris Wilson wrote: > > Before adding yet another copy of struct live_test and its handler, > refactor the existing code into a common framework for live selftests. > For many live selftests, we want to know if the GPU hung or otherwise > misbehaved during the

Re: [Intel-gfx] [PATCH 03/34] drm/i915: Show all active engines on hangcheck

2019-01-22 Thread Mika Kuoppala
Chris Wilson writes: > This turns out to be quite useful if one happens to be debugging > semaphore deadlocks. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/intel_hangcheck.c | 15 +++ > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git

Re: [Intel-gfx] [PATCH 07/34] drm/i915: Refactor out intel_context_init()

2019-01-22 Thread Matthew Auld
On Mon, 21 Jan 2019 at 23:41, Chris Wilson wrote: > > Prior to adding a third instance of intel_context_init() and extending > the information stored therewithin, refactor out the common assignments. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld

Re: [Intel-gfx] [PATCH 24/34] drm/i915: Track the context's seqno in its own timeline HWSP

2019-01-22 Thread Tvrtko Ursulin
On 21/01/2019 22:21, Chris Wilson wrote: Now that we have allocated ourselves a cacheline to store a breadcrumb, we can emit a write from the GPU into the timeline's HWSP of the per-context seqno as we complete each request. This drops the mirroring of the per-engine HWSP and allows each

Re: [Intel-gfx] [PATCH 3/4] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3/4 wakeup time

2019-01-22 Thread Jani Nikula
On Wed, 16 Jan 2019, José Roberto de Souza wrote: > A new field with the training pattern(TP) wakeup time for PSR2 was > added to VBT, so lets use it when available otherwise it will > fallback to PSR1 wakeup time. Same problems as with the two previous patches: - The new field name is too

Re: [Intel-gfx] [PATCH 2/4] drm/i915/psr: Store VBT TP wakeup times into a enum

2019-01-22 Thread Jani Nikula
On Wed, 16 Jan 2019, José Roberto de Souza wrote: > Newer VBTs and the PSR registers uses a enum to set the TPs wakeup > time, so lets use this format to store wakeup times and avoid > conversions every time that PSR is activated. The VBT is a messy blob of data, and intel_bios.c in many places

Re: [Intel-gfx] [PATCH 06/34] drm/i915/selftests: Create a clean GGTT for vma/gtt selftesting

2019-01-22 Thread Matthew Auld
On Mon, 21 Jan 2019 at 23:41, Chris Wilson wrote: > > Some tests (e.g. igt_vma_pin1) presume that we have a completely clean > GGTT so that it can probe boundaries without fear that something is > already allocated there. However, the mock device is starting to get > complicated and following

Re: [Intel-gfx] [PATCH 2/5] drm/i915: always return something

2019-01-22 Thread Kahola, Mika
Patch look ok to me. On Thu, 2019-01-17 at 12:21 -0800, Lucas De Marchi wrote: > Even if we don't have the correct clock and get a warning, we should > not > skip the return. > > Fixes: 1fa11ee2d9d0 ("drm/i915/icl: start adding the TBT pll") > Cc: Paulo Zanoni > Cc: # v4.19+ Reviewed-by: Mika

Re: [Intel-gfx] [PATCH 05/34] drm/i915/selftests: Track evict objects explicitly

2019-01-22 Thread Matthew Auld
On Mon, 21 Jan 2019 at 22:22, Chris Wilson wrote: > > During review of commit 71fc448c1aaf ("drm/i915/selftests: Make evict > tolerant of foreign objects"), Matthew mentioned it would be better if > we explicitly tracked the objects we created. We have an obj->st_link > hook for this purpose, so

Re: [Intel-gfx] [PATCH 1/4] drm/i915/vbt: Add 'tp4' to varibles holding TP2/3/4 PSR wakeup time

2019-01-22 Thread Jani Nikula
On Wed, 16 Jan 2019, José Roberto de Souza wrote: > Recent update in spec made the field holding the TP2 and TP3 wakeup > time for PSR also hold the TP4, so lets rename the variables to > reflect that. > > BSpec: 20131 > > Cc: Dhinakaran Pandiyan > Signed-off-by: José Roberto de Souza > --- >

Re: [Intel-gfx] [PATCH 23/34] drm/i915: Share per-timeline HWSP using a slab suballocator

2019-01-22 Thread Tvrtko Ursulin
On 22/01/2019 11:12, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-01-22 10:47:11) On 21/01/2019 22:21, Chris Wilson wrote: If we restrict ourselves to only using a cacheline for each timeline's HWSP (we could go smaller, but want to avoid needless polluting cachelines on different

Re: [Intel-gfx] [PATCH 23/34] drm/i915: Share per-timeline HWSP using a slab suballocator

2019-01-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-01-22 10:47:11) > > On 21/01/2019 22:21, Chris Wilson wrote: > > If we restrict ourselves to only using a cacheline for each timeline's > > HWSP (we could go smaller, but want to avoid needless polluting > > cachelines on different engines between different contexts),

Re: [Intel-gfx] [PATCH 27/38] drm/i915: Introduce the i915_user_extension_method

2019-01-22 Thread Tvrtko Ursulin
On 22/01/2019 10:47, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-01-22 09:31:31) On 18/01/2019 14:00, Chris Wilson wrote: +/* + * SPDX-License-Identifier: MIT + * + * Copyright © 2018 Intel Corporation + */ + +#include +#include +#include + +#include "i915_user_extensions.h" + +int

  1   2   >