== Series Details ==
Series: drm/i915/icl: use ranges for voltage level lookup
URL : https://patchwork.freedesktop.org/series/61742/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6213 -> Patchwork_13198
Summary
---
== Series Details ==
Series: drm/i915: Vulkan performance query support (rev4)
URL : https://patchwork.freedesktop.org/series/60916/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6195_full -> Patchwork_13180_full
Summary
Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use
range checks. Prepare for having other frequencies in these ranges by
not comparing the exact frequency.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_cdclk.c | 21 +
1 file changed, 9
== Series Details ==
Series: drm/i915: rename header test build commands to avoid conflicts
URL : https://patchwork.freedesktop.org/series/61655/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6195_full -> Patchwork_13179_full
== Series Details ==
Series: drm/ioctl: Ditch DRM_UNLOCKED except for the legacy vblank ioctl (rev2)
URL : https://patchwork.freedesktop.org/series/61299/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6195_full -> Patchwork_13178_full
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/guc: always use Command
Transport Buffers
URL : https://patchwork.freedesktop.org/series/61739/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6211 -> Patchwork_13197
== Series Details ==
Series: Display uncore
URL : https://patchwork.freedesktop.org/series/61735/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6211 -> Patchwork_13196
Summary
---
**FAILURE**
Serious unknown
== Series Details ==
Series: drm/crc-debugfs: Also sprinkle irqrestore over early exits
URL : https://patchwork.freedesktop.org/series/61731/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6211 -> Patchwork_13195
Summary
Yes, this makes more sense.
Reviewed-by: Clint Taylor
-Clint
On 6/6/19 11:09 AM, Matt Roper wrote:
We shouldn't assume that HBR3 on combo PHYs is an EHL-specific
capability. Let's follow the standard i915 convention of assuming
future platforms will inherit all features of the latest
Now that we've moved the Gen9 GuC blobs to version 32 we have CTB
support on all gens, so no need to restrict the usage to Gen11+.
Note that MMIO communication is still required for CTB initialization.
v2: fix commit message nits (Michal)
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal
The size has been increased to 2MB starting from Gen11. GuC and HuC FWs
fit in 1MB so we were fine even with the legacy define, but let's still
move to the correct one before the blobs grow to avoid being caught off
guard in the future.
v2: return early if the platform doesn't have GuC, fix nits
== Series Details ==
Series: Display uncore
URL : https://patchwork.freedesktop.org/series/61735/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: use vfuncs for reg_read/write_fw_domains
Okay!
Commit: drm/i915: kill uncore_sanitize
Okay!
== Series Details ==
Series: Display uncore
URL : https://patchwork.freedesktop.org/series/61735/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ce3c9cc8889e drm/i915: use vfuncs for reg_read/write_fw_domains
-:58: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'func' - possible
== Series Details ==
Series: drm/crc-debugfs: Also sprinkle irqrestore over early exits
URL : https://patchwork.freedesktop.org/series/61731/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
31e4149411c8 drm/crc-debugfs: Also sprinkle irqrestore over early exits
-:42:
On 6/6/19 2:52 PM, Daniele Ceraolo Spurio wrote:
Multiple uncore structures will share the debug infrastructure, so
move it to a common place and add extra locking around it.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 1 +
Multiple uncore structures will share the debug infrastructure, so
move it to a common place and add extra locking around it.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_uncore.c |
Now that we've split out the mmio_debug, we can manipulate that
independently from the debugfs and just call the normal forcewake
get/put functions.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_debugfs.c | 19 +--
drivers/gpu/drm/i915/i915_drv.c | 2 +-
As an example of usage of the new structure
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_hdmi.c | 275 --
1 file changed, 151 insertions(+), 124 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
When we know which engines we're fusing off we can immediately remove
the corresponding forcewake domain, no need to go though the masks
again.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/intel_device_info.c | 4 +++
In an upcoming patch we will introduce a display uncore with no forcewake
domains, so let's avoid wasting memory and be ready to allocate only what
we need.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_uncore.c | 141 +---
Very rough RFC on splitting GT and display register access to give an
idea of what I was aiming at since this came back into discussion on
IRC.
The first few patches are mainly cleanup and reduction of the usage of
uncore_to_i915. I originally planned to kill uncore_to_i915 entirely
but I see
uncore_sanitize performs no action on the uncore structure and just
calls intel_sanitize_gt_powersave, so we can just call the latter
directly.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 12 ++--
drivers/gpu/drm/i915/intel_uncore.c | 9 -
Instead of going through the if-else chain every time, let's save the
function in the uncore structure. Note that the new functions are
purposely not used from the reg read/write functions to keep the
inlining there.
While at it, use the new macro to call the old ones to clean the code a
bit.
A forcewake-less uncore to be used to decouple GT accesses from display
ones to avoid serializing them when there is no need.
All the uncore suspend/resume functions are forcewake-related, so no
need to call them for display_uncore.
Signed-off-by: Daniele Ceraolo Spurio
---
On Thu, Jun 06, 2019 at 02:56:53PM +0300, Jani Nikula wrote:
> On Thu, 06 Jun 2019, Daniel Vetter wrote:
> > On Thu, Jun 6, 2019 at 9:38 AM Harish Chegondi
> > wrote:
> >>
> >> This would allow the EDID override to be handled correctly in
> >> drm_do_get_edid() for cases where EDID data is
I. was. blind.
Caught with vkms, which has some really slow crc computation function.
Fixes: 1882018a70e0 ("drm/crc-debugfs: User irqsafe spinlock in
drm_crtc_add_crc_entry")
Cc: Rodrigo Siqueira
Cc: Tomeu Vizoso
Cc: Emil Velikov
Cc: Benjamin Gaignard
Cc: Ville Syrjälä
Signed-off-by:
On Thu, May 30, 2019 at 4:40 PM Matt Roper wrote:
>
> EHL defines two new MOCS table entries but is otherwise compatible with
> the ICL MOCS table.
>
> These table entries (16 and 17) should still be considered unused for
> ICL and as such their behavior remains undefined for that platform.
>
>
Verified that patch fixes the issue. My ICL with SAGV forced to max now boots
to desktop with display.
This patch resolves my issue completely. Thanks for your help!
~Felix DeGrood
-Original Message-
From: Ville Syrjala
Sent: Thursday, June 06, 2019 5:42 AM
To:
== Series Details ==
Series: drm/i915: Assume combo PHY HBR3 will be inherited by future platforms
URL : https://patchwork.freedesktop.org/series/61724/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6210 -> Patchwork_13194
We shouldn't assume that HBR3 on combo PHYs is an EHL-specific
capability. Let's follow the standard i915 convention of assuming
future platforms will inherit all features of the latest platform.
Fixes: b71438606343 ("drm/i915/ehl: Support HBR3 on EHL combo PHY")
Cc: Manasi Navare
Cc: Rodrigo
Fixes: c26e76418f49 ("tests/gem_exec_balancer: Manually calculate VLA struct
sizes")
Signed-off-by: Chris Wilson
Cc: Arkadiusz Hiler
---
tests/i915/gem_exec_balancer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_balancer.c
On Thu, Jun 06, 2019 at 09:09:08AM -0700, Lucas De Marchi wrote:
> On Thu, Jun 06, 2019 at 09:00:56AM -0700, Rodrigo Vivi wrote:
> > On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
> > > On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> > > > On Wed, Jun 05, 2019 at
== Series Details ==
Series: series starting with [1/2] Documentation/i915: Fix kernel-doc
references to moved gem files
URL : https://patchwork.freedesktop.org/series/61645/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6194_full -> Patchwork_13177_full
Quoting Mika Kuoppala (2019-06-05 16:04:09)
> Chris Wilson writes:
>
> > Measure the baseline latency between contexts in order to directly
> > compare that with the additional cost of preemption.
> >
> > Signed-off-by: Chris Wilson
> > ---
> > tests/i915/gem_exec_latency.c | 230
On Thu, Jun 06, 2019 at 09:00:56AM -0700, Rodrigo Vivi wrote:
On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > Unlike ICL, EHL's combo PHYs can support
On Wed, Jun 05, 2019 at 03:15:22PM -0700, Matt Roper wrote:
> On Wed, Jun 05, 2019 at 02:51:08PM -0700, Manasi Navare wrote:
> > On Wed, Jun 05, 2019 at 02:18:32PM -0700, Matt Roper wrote:
> > > Unlike ICL, EHL's combo PHYs can support HBR3 data rates. Note that
> > > this just extends the upper
Quoting Matthew Auld (2019-06-05 15:03:03)
> On Mon, 3 Jun 2019 at 18:49, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > index 7868dd48d931..68262231f56f 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
On 06/06, Ser, Simon wrote:
> On Tue, 2019-06-04 at 23:30 -0300, Rodrigo Siqueira wrote:
> > The kms_flip test relies on VBlank support, and this situation may
> > exclude some virtual drivers to take advantage of this set of tests.
> > This commit adds a mechanism that checks if a module has
On Tue, Apr 09, 2019 at 11:00:10PM +0300, Ville Syrjälä wrote:
> On Tue, Apr 09, 2019 at 05:40:49PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Our SDVO audio support is pretty bogus. We can't push audio over the
> > SDVO bus, so trying to enable audio in the SDVO control
Chris Wilson writes:
> Quoting Chris Wilson (2019-05-31 12:32:45)
>> On i915_gem_load_power_context() we do care whether or not we succeed in
>> completing the switch back to the kernel context (via idling the
>> engines). Currently, we detect if an error occurs while we wait, but we
>> do not
== Series Details ==
Series: drm/i915: Deal with machines that expose less than three QGV points
URL : https://patchwork.freedesktop.org/series/61713/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6206 -> Patchwork_13193
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: move pm related declarations to
intel_pm.h
URL : https://patchwork.freedesktop.org/series/61712/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6206 -> Patchwork_13192
On Thu, Jun 06, 2019 at 10:36:35AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Replace some gen6/7 open coded rmw with intel_uncore_rmw.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 42 +
>
== Series Details ==
Series: drm/i915: Move object close under its own lock
URL : https://patchwork.freedesktop.org/series/61710/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6206 -> Patchwork_13191
Summary
---
On Thu, Jun 06, 2019 at 10:36:38AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> These functions operate on ggtt so make them take that directly as
> parameter.
This patch makes me wonder where we really want and need to go.
We need to move out of dev_priv and global i915...
but do
On Thu, Jun 06, 2019 at 10:36:39AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> These two are only used from within i915_gem_gtt.c and can trivially be
> made static.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 8
On Thu, 06 Jun 2019 14:23:09 +0200, Tvrtko Ursulin
wrote:
On 06/06/2019 12:58, Michal Wajdeczko wrote:
On Thu, 06 Jun 2019 11:36:38 +0200, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
Not quite.
Function
On Wed, Jun 05, 2019 at 09:18:09PM +0100, Guillaume Tucker wrote:
> Add Docker image and Gitlab CI steps to run builds for the MIPS
> architecture using Debian Buster.
>
> Signed-off-by: Guillaume Tucker
> ---
> .gitlab-ci.yml | 28
> Dockerfile.debian-mips
On Wed, Jun 05, 2019 at 04:55:35PM -0700, Lucas De Marchi wrote:
> While loading the DMC firmware we were double checking the headers made
> sense, but in no place we checked that we were actually reading memory
> we were supposed to. This could be wrong in case the firmware file is
> truncated or
On Wed, Jun 05, 2019 at 06:05:23PM -0700, Souza, Jose wrote:
> This is the same as WHL, we added the AML separated just in case it
> needed some different workaround or code path but looks like it don't
> need at all.
>
> Any objection with this change Rodrigo?
Nope.
Reviewed-by: Rodrigo Vivi
== Series Details ==
Series: drm/i915: Deal with machines that expose less than three QGV points
URL : https://patchwork.freedesktop.org/series/61713/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Deal with machines that expose less than
From: Ville Syrjälä
When SAGV is forced to disabled/min/med/max in the BIOS pcode will
only hand us a single QGV point instead of the normal three. Fix
the code to deal with that instead declaring the bandwidth limit
to be 0 MB/s (and thus preventing any planes from being enabled).
Also shrink
== Series Details ==
Series: Implicit dev_priv removal
URL : https://patchwork.freedesktop.org/series/61705/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6205 -> Patchwork_13190
Summary
---
**SUCCESS**
No
Quoting Jani Nikula (2019-06-06 13:22:03)
> This no longer exists.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_frontbuffer.c | 6 --
> 1 file changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_frontbuffer.c
>
Quoting Jani Nikula (2019-06-06 13:22:02)
> Some function declarations in intel_drv.h were missed when
> intel_atomic_plane.h was created.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.h | 16
> drivers/gpu/drm/i915/intel_drv.h | 12
Quoting Jani Nikula (2019-06-06 13:22:01)
> intel_mark_busy(), intel_mark_idle(), and skl_cdclk_get_vco() no longer
> exist.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
Quoting Jani Nikula (2019-06-06 13:22:00)
> Move more missed declarations from i915_drv.h to intel_pm.h.
>
> Signed-off-by: Jani Nikula
Must send the intel_gt_pm conversions...
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx mailing list
On 06/06/2019 12:58, Michal Wajdeczko wrote:
On Thu, 06 Jun 2019 11:36:38 +0200, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
Not quite.
Function intel_guc_reserved_gtt_size() operates on struct intel_guc
and
intel_mark_busy(), intel_mark_idle(), and skl_cdclk_get_vco() no longer
exist.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index
Some function declarations in intel_drv.h were missed when
intel_atomic_plane.h was created.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_atomic_plane.h | 16
drivers/gpu/drm/i915/intel_drv.h | 12
2 files changed, 16 insertions(+), 12
Move more missed declarations from i915_drv.h to intel_pm.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 10 --
drivers/gpu/drm/i915/i915_irq.c | 1 +
drivers/gpu/drm/i915/intel_pm.h | 9 +
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git
This no longer exists.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_frontbuffer.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_frontbuffer.c
b/drivers/gpu/drm/i915/intel_frontbuffer.c
index aa34e33b6087..d6036b9ad16a 100644
---
On Thu, 06 Jun 2019, Masahiro Yamada wrote:
> On Thu, Jun 6, 2019 at 4:57 PM Jani Nikula wrote:
>>
>> You're totally right, it needs to be fixed in your tree. For that, I
>> think the best option is your fixup patch #2.
>
>
> OK, I will squash patch #2.
Many thanks!
BR,
Jani.
--
Jani Nikula,
On Thu, Jun 6, 2019 at 4:57 PM Jani Nikula wrote:
>
> You're totally right, it needs to be fixed in your tree. For that, I
> think the best option is your fixup patch #2.
OK, I will squash patch #2.
--
Best Regards
Masahiro Yamada
___
Intel-gfx
Quoting Zhenyu Wang (2019-06-05 11:49:03)
>
> Hi,
>
> More gvt fixes for 5.2-rc. This fixed one regression when enabling
> debug build of i915 guest, guest ring state fix after execution
> for hang check, and with two misc fixes from klocwork check.
Pulled this. Thanks for the PR.
Regards,
Hi Dave & Daniel,
No i915 fixes this week, but forwarding the GVT pull request still.
One GVT regression fix for debug build of i915 guest, guest ring
state fix after execution for hang check and a couple of static
checker fixes.
CI is being clogged curently, but we really don't have that much
On Thu, 06 Jun 2019 11:36:38 +0200, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
Not quite.
Function intel_guc_reserved_gtt_size() operates on struct intel_guc
and is defined in intel_guc.c for proper layering,
On Thu, 06 Jun 2019, Daniel Vetter wrote:
> On Thu, Jun 6, 2019 at 9:38 AM Harish Chegondi
> wrote:
>>
>> This would allow the EDID override to be handled correctly in
>> drm_do_get_edid() for cases where EDID data is missing or corrupt.
>>
>> All drm_probe_ddc() does is call
On 06/06/2019 12:37, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 12:28:23)
On 06/06/2019 12:06, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:19:10)
On 06/06/2019 10:09, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-05 11:40:27)
On 04/06/2019 16:24, Chris
Quoting Chris Wilson (2019-05-31 12:32:45)
> On i915_gem_load_power_context() we do care whether or not we succeed in
> completing the switch back to the kernel context (via idling the
> engines). Currently, we detect if an error occurs while we wait, but we
> do not report one if it occurred
== Series Details ==
Series: drm/i915: Move object close under its own lock
URL : https://patchwork.freedesktop.org/series/61710/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Move object close under its own lock
Quoting Tvrtko Ursulin (2019-06-06 12:28:23)
>
> On 06/06/2019 12:06, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-06-06 10:19:10)
> >>
> >> On 06/06/2019 10:09, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2019-06-05 11:40:27)
>
> On 04/06/2019 16:24, Chris Wilson wrote:
>
On Thu, Jun 6, 2019 at 9:38 AM Harish Chegondi
wrote:
>
> This would allow the EDID override to be handled correctly in
> drm_do_get_edid() for cases where EDID data is missing or corrupt.
>
> All drm_probe_ddc() does is call drm_do_probe_ddc_edid( , , , 1)
> which probes the display by reading 1
On 06/06/2019 12:06, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:19:10)
On 06/06/2019 10:09, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-05 11:40:27)
On 04/06/2019 16:24, Chris Wilson wrote:
The intent was to skip unused HW contexts by checking ce->state.
However,
Use i915_gem_object_lock() to guard the LUT and active reference to
allow us to break free of struct_mutex for handling GEM_CLOSE.
Testcase: igt/gem_close_race
Testcase: igt/gem_exec_parallel
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_context.c
On Thu, 06 Jun 2019, Harish Chegondi wrote:
> This would allow the EDID override to be handled correctly in
> drm_do_get_edid() for cases where EDID data is missing or corrupt.
>
> All drm_probe_ddc() does is call drm_do_probe_ddc_edid( , , , 1)
> which probes the display by reading 1 byte of
On Tue, 2019-06-04 at 23:30 -0300, Rodrigo Siqueira wrote:
> The kms_flip test relies on VBlank support, and this situation may
> exclude some virtual drivers to take advantage of this set of tests.
> This commit adds a mechanism that checks if a module has VBlank. If the
> target module has
Quoting Tvrtko Ursulin (2019-06-06 10:19:10)
>
> On 06/06/2019 10:09, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-06-05 11:40:27)
> >>
> >> On 04/06/2019 16:24, Chris Wilson wrote:
> >>> The intent was to skip unused HW contexts by checking ce->state.
> >>> However, this only works for
On 06/06/2019 11:05, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:36:18)
From: Tvrtko Ursulin
Mostly patches reworking the code and GEM init paths to remove some implicit
dev_priv dependencies (I915_READ/I915_WRITE), plus some small tweaks to tidy
GEM init paths to use more
On 06/06/2019 10:57, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-06-06 10:36:27)
>> From: Tvrtko Ursulin
>>
>> Continuing the conversion and elimination of implicit dev_priv.
>>
>> Signed-off-by: Tvrtko Ursulin
>> Suggested-by: Rodrigo Vivi
>> ---
>>
On 06/06/2019 10:50, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:36:23)
From: Tvrtko Ursulin
The function mostly uses uncore so make the argument reflect that.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_reset.c | 8
On 06/06/2019 11:01, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:36:29)
From: Tvrtko Ursulin
Gen8+ does not have swizziling so function will exit on the top most check.
At the same time convert the BUG to MISSING_CASE for a little more debug
info.
Signed-off-by: Tvrtko
== Series Details ==
Series: Implicit dev_priv removal
URL : https://patchwork.freedesktop.org/series/61705/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Reset only affected engines when handling error capture
Okay!
Commit: drm/i915: Tidy
== Series Details ==
Series: Implicit dev_priv removal
URL : https://patchwork.freedesktop.org/series/61705/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
970f22aa796e drm/i915: Reset only affected engines when handling error capture
118c531673db drm/i915: Tidy engine mask
Quoting Tvrtko Ursulin (2019-06-06 10:36:18)
> From: Tvrtko Ursulin
>
> Mostly patches reworking the code and GEM init paths to remove some implicit
> dev_priv dependencies (I915_READ/I915_WRITE), plus some small tweaks to tidy
> GEM init paths to use more logical input parameters (enabled by
Quoting Tvrtko Ursulin (2019-06-06 10:36:29)
> From: Tvrtko Ursulin
>
> Gen8+ does not have swizziling so function will exit on the top most check.
>
> At the same time convert the BUG to MISSING_CASE for a little more debug
> info.
>
> Signed-off-by: Tvrtko Ursulin
> ---
>
Quoting Tvrtko Ursulin (2019-06-06 10:36:28)
> From: Tvrtko Ursulin
>
> This step is more about the GEM and less about the hardware so move it to
> the more appropriate place.
Just happens to be the wrong place. It needs to be reset after we
restart the HW as the capabilities do change
Quoting Tvrtko Ursulin (2019-06-06 10:36:27)
> From: Tvrtko Ursulin
>
> Continuing the conversion and elimination of implicit dev_priv.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c
Quoting Tvrtko Ursulin (2019-06-06 10:36:25)
> From: Tvrtko Ursulin
>
> The function mostly uses uncore so make it use it.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
I'd probably pass engine and take uncore = engine->uncore.
Reviewed-by: Chris Wilson
-Chris
Quoting Tvrtko Ursulin (2019-06-06 10:36:26)
> From: Tvrtko Ursulin
>
> Get to uncore from the engine for better logic organization and use
> already available i915 everywhere.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
Reviewed-by: Chris Wilson
-Chris
In fairly recent past, it was not possible to run desktop systems using
vm.overcommit_memory=2 if they used Intel graphics because without the
OOM killer, the shrinker would never run. Instead, regular memory
allocations would fail eventually.
In addition, the i915 Mesa driver assumed malloc
Quoting Tvrtko Ursulin (2019-06-06 10:36:24)
> From: Tvrtko Ursulin
>
> Remove a couple dev_priv locals as a consequence.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 27 ++---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++--
>
Quoting Chris Wilson (2019-06-06 10:50:17)
> Quoting Tvrtko Ursulin (2019-06-06 10:36:23)
> > -void i915_clear_error_registers(struct drm_i915_private *i915,
> > - intel_engine_mask_t engine_mask);
> > +void uncore_clear_error_registers(struct intel_uncore *uncore,
>
Quoting Tvrtko Ursulin (2019-06-06 10:36:23)
> From: Tvrtko Ursulin
>
> The function mostly uses uncore so make the argument reflect that.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/gt/intel_reset.c | 8
>
On 06/06/2019 10:44, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-06 10:36:19)
From: Tvrtko Ursulin
Pass down the engine mask to i915_clear_error_registers so only affected
engines can be reset on the Gen6/7 path.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
The only
Quoting Tvrtko Ursulin (2019-06-06 10:36:22)
> From: Tvrtko Ursulin
>
> Just tidying the flow a bit.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
-Chris
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Quoting Tvrtko Ursulin (2019-06-06 10:36:21)
> From: Tvrtko Ursulin
>
> Similar to earlier conversions, eliminate the implicit dev_priv by
> introducing some helpers which take the engine parameter (since the
> register itself is per engine).
>
> Signed-off-by: Tvrtko Ursulin
Only 2
Quoting Tvrtko Ursulin (2019-06-06 10:36:20)
> From: Tvrtko Ursulin
>
> We can use intel_engine_mask_t to align with the rest of the codebase.
>
> Signed-off-by: Tvrtko Ursulin
Ok,
Reviewed-by: Chris Wilson
-Chris
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Quoting Tvrtko Ursulin (2019-06-06 10:36:19)
> From: Tvrtko Ursulin
>
> Pass down the engine mask to i915_clear_error_registers so only affected
> engines can be reset on the Gen6/7 path.
>
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
The only downside is that it makes it look
From: Tvrtko Ursulin
More removal of implicit dev_priv from using old mmio accessors.
Furthermore these calls really operate on ggtt so it logically makes sense
if they take it as parameter.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
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