== Series Details ==
Series: drm/i915/selftests: Keep the engine awake while we keep for preemption
URL : https://patchwork.freedesktop.org/series/66601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6881_full -> Patchwork_14379_full
== Series Details ==
Series: drm/i915/dp: Support for DP HDR outputs (rev7)
URL : https://patchwork.freedesktop.org/series/65656/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6881_full -> Patchwork_14378_full
Summary
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Lucas De Marchi
> Sent: Friday, August 23, 2019 1:21 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vetter, Daniel ; Pandiyan, Dhinakaran
>
> Subject: [Intel-gfx] [PATCH v3 21/23]
== Series Details ==
Series: drm/i915/guc: Enable guc logging on guc log relay write (rev2)
URL : https://patchwork.freedesktop.org/series/66502/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14392
Creating and opening the GuC log relay file enables and starts
the relay potentially before the caller is ready to consume logs.
Change the behavior so that relay starts only on an explicit call
to the write function (with a value of '1'). Other values flush
the log relay as before.
v2: Style
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: Update HuC firmware naming
convention and load latest HuC
URL : https://patchwork.freedesktop.org/series/66626/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14391
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: Update HuC firmware naming
convention and load latest HuC
URL : https://patchwork.freedesktop.org/series/66626/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3a37f385bcf4 drm/i915/uc: Update HuC firmware
On Wed, 2019-09-11 at 12:21 -0700, Anusha Srivatsa wrote:
> We have a new version of DMC for ICL - v1.09.
>
> This version adds the Half Refresh Rate capability
> into DMC.
Reviewed-by: José Roberto de Souza
>
> Cc: José Roberto de Souza
> Signed-off-by: Anusha Srivatsa
> ---
>
On Thu, Sep 12, 2019 at 11:51:33PM +0300, Thomas Backlund wrote:
Den 03-09-2019 kl. 19:24, skrev Sasha Levin:
From: Chris Wilson
[ Upstream commit aa56a292ce623734ddd30f52d73f527d1f3529b5 ]
set_page_dirty says:
For pages with a mapping this should be done under the page lock
Make both GuC and HuC to use "." as the separator. Hardcode
the separator in MAKE_UC_FW_PATH. Remove the usage of "ver" from HuC.
The current convention being:
_uc_..patch.bin
Update the versions of HuC being loaded of the platforms.
SKL - v2.0.0
BXT - v2.0.0
KBL - v4.0.0
GLK - v4.0.0
CFL - KBL
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index d29ade3b7de6..f9fbb1f2fabf 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++
== Series Details ==
Series: drm/i915/tgl: Extend MI_SEMAPHORE_WAIT
URL : https://patchwork.freedesktop.org/series/66625/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14389
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake
ranges (rev3)
URL : https://patchwork.freedesktop.org/series/66608/
State : failure
== Summary ==
Applying: drm/i915/tgl: Introduce gen12 forcewake ranges
Applying: drm/i915/tgl: s/ss/eu fuse
== Series Details ==
Series: series starting with [1/2] drm/connector: Share with non-atomic drivers
the function to get the single encoder
URL : https://patchwork.freedesktop.org/series/66619/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14387
On 9/11/19 2:28 PM, Fosha, Robert M wrote:
On 9/10/19 5:48 PM, Daniele Ceraolo Spurio wrote:
On 9/10/19 3:46 PM, Robert M. Fosha wrote:
Creating and opening the GuC log relay file enables and starts
the relay potentially before the caller is ready to consume logs.
Change the behavior so
== Series Details ==
Series: series starting with [1/2] drm/i915: Show the logical context ring
state on dumping (rev3)
URL : https://patchwork.freedesktop.org/series/66422/
State : failure
== Summary ==
Applying: drm/i915: Show the logical context ring state on dumping
Applying:
== Series Details ==
Series: series starting with [1/2] drm/connector: Share with non-atomic drivers
the function to get the single encoder
URL : https://patchwork.freedesktop.org/series/66619/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit:
== Series Details ==
Series: series starting with [1/2] drm/connector: Share with non-atomic drivers
the function to get the single encoder
URL : https://patchwork.freedesktop.org/series/66619/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
87c2a5a45bc0 drm/connector: Share
== Series Details ==
Series: drm/i915: Don't mix srcu tag and negative error codes (rev2)
URL : https://patchwork.freedesktop.org/series/66524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14386
Summary
== Series Details ==
Series: Mdev: support mutiple kinds of devices
URL : https://patchwork.freedesktop.org/series/66588/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6877_full -> Patchwork_14376_full
Summary
---
On Tigerlake, MI_SEMAPHORE_WAIT grew an extra dword, so be sure to
update the length field and emit that extra parameter and any padding
noop as required.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
== Series Details ==
Series: drm/i915: Don't mix srcu tag and negative error codes (rev2)
URL : https://patchwork.freedesktop.org/series/66524/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Don't mix srcu tag and negative error codes
Op 12-09-2019 om 20:05 schreef Ville Syrjälä:
> On Thu, Sep 12, 2019 at 06:01:57PM +0200, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 12-09-2019 om 16:34 schreef Sasha Levin:
>>> Hi,
>>>
>>> [This is an automated email]
>>>
>>> This commit has been processed because it contains a "Fixes:" tag,
>>>
Currently we restrict the number of encoders that can be linked to
a connector to 3, increase it to match the maximum number of encoders
that can be initialized(32).
To more effiently do that lets switch from an array of encoder ids to
bitmask.
v2: Fixing missed return on
This 3 non-atomic drivers all have the same function getting the
only encoder available in the connector, also atomic drivers have
this fallback. So moving it a common place and sharing between atomic
and non-atomic drivers.
While at it I also removed the mention of
== Series Details ==
Series: drm/i915: introduce INTEL_DISPLAY_ENABLED()
URL : https://patchwork.freedesktop.org/series/66610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6883 -> Patchwork_14385
Summary
---
Quoting Daniele Ceraolo Spurio (2019-09-12 19:45:27)
>
>
> On 9/12/19 6:23 AM, Chris Wilson wrote:
> > We see failures where the context continues executing past a
> > preemption event, eventually leading to situations where a request has
> > executed before we have event submitted it to HW! It
== Series Details ==
Series: drm/i915: introduce INTEL_DISPLAY_ENABLED()
URL : https://patchwork.freedesktop.org/series/66610/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
427d67464aa8 drm/i915: introduce INTEL_DISPLAY_ENABLED()
-:135: WARNING:LONG_LINE: line over 100
== Series Details ==
Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake
ranges (rev2)
URL : https://patchwork.freedesktop.org/series/66608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6883 -> Patchwork_14384
== Series Details ==
Series: series starting with [1/4] drm/i915/tgl: Introduce gen12 forcewake
ranges (rev2)
URL : https://patchwork.freedesktop.org/series/66608/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/tgl: Introduce gen12 forcewake
On 9/12/19 6:23 AM, Chris Wilson wrote:
We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
AFAIK on TGL the CS can detect tail updates in
On Thu, Sep 12, 2019 at 09:42:11AM +0300, Jani Nikula wrote:
> On Wed, 11 Sep 2019, Manasi Navare wrote:
> > On Wed, Sep 11, 2019 at 12:08:00PM +0300, Jani Nikula wrote:
> >> On Tue, 10 Sep 2019, Manasi Navare wrote:
> >> > On Tue, Sep 10, 2019 at 11:07:30AM -0700, Manasi Navare wrote:
> >> >>
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Add a paranoid flush of
the CSB pointers upon reset
URL : https://patchwork.freedesktop.org/series/66586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6876_full -> Patchwork_14375_full
== Series Details ==
Series: drm/i915/tgl: Disable preemption while being debugged (rev2)
URL : https://patchwork.freedesktop.org/series/66607/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14383
Summary
== Series Details ==
Series: Revert "drm/i915/userptr: Acquire the page lock around set_page_dirty()"
URL : https://patchwork.freedesktop.org/series/66605/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14382
On Thu, Sep 12, 2019 at 06:01:57PM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 12-09-2019 om 16:34 schreef Sasha Levin:
> > Hi,
> >
> > [This is an automated email]
> >
> > This commit has been processed because it contains a "Fixes:" tag,
> > fixing commit: d9218c8f6cf4 drm/i915/dp: Add
On 9/12/19 6:38 AM, Mika Kuoppala wrote:
From: Michel Thierry
The media ranges extend beyond what gen11 gives so we can't piggypack
on gen11 ranges, even on read side.
Introduce a table for gen12 and accessors for it.
v2: correctly implement gen12_fwtable_write/read (Daniele)
v3: update
== Series Details ==
Series: Fix i915_interrupt_info debugfs with display off on VLV
URL : https://patchwork.freedesktop.org/series/66604/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14381
Summary
== Series Details ==
Series: drm/i915/pmu: Use GT parked for estimating RC6 while asleep (rev8)
URL : https://patchwork.freedesktop.org/series/56583/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6882 -> Patchwork_14380
mmits/Jos-Roberto-de-Souza/drm-connector-Share-with-non-atomic-drivers-the-function-to-get-the-single-encoder/20190912-213415
config: x86_64-randconfig-g003-201936 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
While srcu may use an integer tag, it does not exclude potential error
codes and so may overlap with our own use of -EINTR. Use a separate
outparam to store the tag, and report the error code separately. While
changing the function signature allow the caller to choose whether or not
the potential
Hey,
Op 12-09-2019 om 16:34 schreef Sasha Levin:
> Hi,
>
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag,
> fixing commit: d9218c8f6cf4 drm/i915/dp: Add helpers for Compressed BPP and
> Slice Count for DSC.
>
> The bot has tested the following
== Series Details ==
Series: series starting with [1/4] drm/i915: Fix cdclk bypass freq readout for
tgl/bxt/glk (rev2)
URL : https://patchwork.freedesktop.org/series/66537/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6875_full -> Patchwork_14374_full
On 2019-09-12 2:54 a.m., Ramalingam C wrote:
> On 2019-09-12 at 00:15:32 +, Harry Wentland wrote:
>> Adding a couple AMD guys.
>>
>> I know this is already merged but I have a few questions after some
>> internal discussions.
>>
>> On 2019-05-07 12:27 p.m., Ramalingam C wrote:
>>> On every
On 12/09/2019 16:35, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-09-12 16:18:08)
On 12/09/2019 14:38, Mika Kuoppala wrote:
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 469dc512cca3..30c542144016 100644
--- a/include/uapi/drm/i915_drm.h
+++
== Series Details ==
Series: drm/i915/selftests: Keep the engine awake while we keep for preemption
URL : https://patchwork.freedesktop.org/series/66601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14379
Quoting Tvrtko Ursulin (2019-09-12 16:18:08)
>
> On 12/09/2019 14:38, Mika Kuoppala wrote:
> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 469dc512cca3..30c542144016 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
> > @@
Prepare for making a distinction between not having display and having
disabled display. Add INTEL_DISPLAY_ENABLED() and use it where
HAS_DISPLAY() is used. This is initially duplication, as disabling
display still leads to ->pipe_mask = 0 and HAS_DISPLAY() being false.
Since
On Wed, 11 Sep 2019, Jani Nikula wrote:
> Replace device info number of pipes with a bit mask of available
> pipes. This will prove handy in the future. There's still a bunch of
> future work to do to actually allow a non-consecutive mask of pipes, but
> it's a start. No functional changes.
>
>
== Series Details ==
Series: drm/i915/dp: Support for DP HDR outputs (rev7)
URL : https://patchwork.freedesktop.org/series/65656/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14378
Summary
---
On 12/09/2019 14:38, Mika Kuoppala wrote:
From: Daniele Ceraolo Spurio
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have
some duplicated resources/paths. Although DSS behave similarly to 2
subslices, instead of splitting this and presenting userspace with bits
not
== Series Details ==
Series: drm/i915: convert device info num_pipes to pipe_mask (rev2)
URL : https://patchwork.freedesktop.org/series/66567/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6875_full -> Patchwork_14372_full
== Series Details ==
Series: series starting with [1/2] drm/i915: Show the logical context ring
state on dumping (rev2)
URL : https://patchwork.freedesktop.org/series/66422/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6881 -> Patchwork_14377
On 12/09/2019 13:56, Chris Wilson wrote:
The userptr put_pages can be called from inside try_to_unmap, and so
enters with the page lock held on one of the object's backing pages. We
cannot take the page lock ourselves for fear of recursion.
Reported-by: Lionel Landwerlin
Reported-by: Martin
== Series Details ==
Series: series starting with [1/2] drm/i915: Show the logical context ring
state on dumping (rev2)
URL : https://patchwork.freedesktop.org/series/66422/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4abf44a40a29 drm/i915: Show the logical context ring
Chris Wilson writes:
> We see failures where the context continues executing past a
> preemption event, eventually leading to situations where a request has
> executed before we have event submitted it to HW! It seems like tgl is
> ignoring our RING_TAIL updates, but more likely is that there is
On 9/12/2019 12:41 AM, Animesh Manna wrote:
Enabling DSB by setting 1 to has_dsb flag for gen12.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Shashank Sharma
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On 9/12/2019 7:09 PM, Jani Nikula wrote:
On Thu, 12 Sep 2019, "Sharma, Shashank" wrote:
On 9/12/2019 12:41 AM, Animesh Manna wrote:
Batch buffer will be created through dsb-reg-write function which can have
single/multiple request based on usecase and once the buffer is ready
commit function
From: Daniele Ceraolo Spurio
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have
some duplicated resources/paths. Although DSS behave similarly to 2
subslices, instead of splitting this and presenting userspace with bits
not directly representative of hardware resources,
On 12/09/2019 16:38, Mika Kuoppala wrote:
From: Daniele Ceraolo Spurio
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have
some duplicated resources/paths. Although DSS behave similarly to 2
subslices, instead of splitting this and presenting userspace with bits
not directly
On Thu, 12 Sep 2019, "Sharma, Shashank" wrote:
> On 9/12/2019 12:41 AM, Animesh Manna wrote:
>> Batch buffer will be created through dsb-reg-write function which can have
>> single/multiple request based on usecase and once the buffer is ready
>> commit function will trigger the execution of the
From: Michel Thierry
The media ranges extend beyond what gen11 gives so we can't piggypack
on gen11 ranges, even on read side.
Introduce a table for gen12 and accessors for it.
v2: correctly implement gen12_fwtable_write/read (Daniele)
v3: update with ranges from bspec.
v4: avoid
We think that we got rc6 problems sorted out. Flip the switch
and let CI expose our tendency to naive optimism.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
From: Daniele Ceraolo Spurio
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have
some duplicated resources/paths. Although DSS behave similarly to 2
subslices, instead of splitting this and presenting userspace with bits
not directly representative of hardware resources,
From: Chris Wilson
We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
ignoring our RING_TAIL updates, but more likely is that there is a
missing
On 9/12/2019 12:41 AM, Animesh Manna wrote:
Batch buffer will be created through dsb-reg-write function which can have
single/multiple request based on usecase and once the buffer is ready
commit function will trigger the execution of the batch buffer. All
the registers will be updated
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB will be used for performance improvement for some special scenario.
DSB engine will be enabled based on need and after completion of its work
will be disabled. Api added for enable/disable operation by using DSB_CTRL
register.
v1: Initial
== Series Details ==
Series: drm/i915/dp: Support for DP HDR outputs (rev6)
URL : https://patchwork.freedesktop.org/series/65656/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6874_full -> Patchwork_14371_full
Summary
Quoting Dave Airlie (2019-08-13 22:20:52)
> On Sat, 10 Aug 2019 at 08:26, Matthew Auld wrote:
> >
> > In preparation for upcoming devices with device local memory, introduce the
> > concept of different memory regions, and a simple buddy allocator to manage
> > them in i915.
> >
> > One of the
Adding a couple AMD guys.
I know this is already merged but I have a few questions after some
internal discussions.
On 2019-05-07 12:27 p.m., Ramalingam C wrote:
> On every hdcp revocation check request SRM is read from fw file
> /lib/firmware/display_hdcp_srm.bin
>
According to section 5 of
On 9/12/2019 6:37 PM, Jani Nikula wrote:
On Thu, 12 Sep 2019, Animesh Manna wrote:
Gamma lut programming can be programmed using DSB
where bulk register programming can be done using indexed
register write which takes number of data and the mmio offset
to be written.
Currently enabled for
We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
ignoring our RING_TAIL updates, but more likely is that there is a
missing update required for
On 9/12/2019 12:41 AM, Animesh Manna wrote:
As per bspec check for DSB status before programming any
of its register. Inline function added to check the dsb status.
Cc: Michel Thierry
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Shashank Sharma
Signed-off-by: Animesh Manna
---
On 9/12/2019 6:37 PM, Animesh Manna wrote:
On 9/12/2019 6:30 PM, Sharma, Shashank wrote:
On 9/12/2019 6:21 PM, Jani Nikula wrote:
On Thu, 12 Sep 2019, "Sharma, Shashank"
wrote:
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB support single register write through opcode 0x1. Generic
api
We see failures where the context continues executing past a
preemption event, eventually leading to situations where a request has
executed before we have event submitted it to HW! It seems like tgl is
ignoring our RING_TAIL updates, but more likely is that there is a
missing update required for
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB can program large set of data through indexed register write
(opcode 0x9) in one shot. DSB feature can be used for bulk register
programming e.g. gamma lut programming, HDR meta data programming.
v1: initial version.
v2: simplified code by using
On 9/12/2019 6:30 PM, Sharma, Shashank wrote:
On 9/12/2019 6:21 PM, Jani Nikula wrote:
On Thu, 12 Sep 2019, "Sharma, Shashank"
wrote:
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register
On Thu, 12 Sep 2019, Animesh Manna wrote:
> Gamma lut programming can be programmed using DSB
> where bulk register programming can be done using indexed
> register write which takes number of data and the mmio offset
> to be written.
>
> Currently enabled for 12-bit gamma LUT which is enabled by
Quoting Arkadiusz Hiler (2019-09-12 13:54:18)
> Without it we get:
> Unclaimed read from register 0x1e1110
> WARNING: CPU: 2 PID: 1029 at drivers/gpu/drm/i915/intel_uncore.c:1101
> __unclaimed_reg_debug+0x40/0x50 [i915]
> Call Trace:
> fwtable_read32+0x233/0x300 [i915]
>
On 9/12/2019 6:21 PM, Jani Nikula wrote:
On Thu, 12 Sep 2019, "Sharma, Shashank" wrote:
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register write in a batch
buffer and once DSB is
The userptr put_pages can be called from inside try_to_unmap, and so
enters with the page lock held on one of the object's backing pages. We
cannot take the page lock ourselves for fear of recursion.
Reported-by: Lionel Landwerlin
Reported-by: Martin Wilck
Reported-by: Leo Kraav
Fixes:
Without it we get:
Unclaimed read from register 0x1e1110
WARNING: CPU: 2 PID: 1029 at drivers/gpu/drm/i915/intel_uncore.c:1101
__unclaimed_reg_debug+0x40/0x50 [i915]
Call Trace:
fwtable_read32+0x233/0x300 [i915]
i915_interrupt_info+0xa73/0xd60 [i915]
seq_read+0xdb/0x3c0
Cover letter to use https://intel-gfx-ci.01.org/test-with.html
https://patchwork.freedesktop.org/patch/330337/?series=66602
Test-with: 20190912123320.13131-1-arkadiusz.hi...@intel.com
Arkadiusz Hiler (1):
drm/i915: Get the correct wakeref for reading HOTPLUG_EN et al.
On Thu, 12 Sep 2019, "Sharma, Shashank" wrote:
> On 9/12/2019 12:41 AM, Animesh Manna wrote:
>> DSB support single register write through opcode 0x1. Generic
>> api created which accumulate all single register write in a batch
>> buffer and once DSB is triggered, it will program all the registers
On 9/12/2019 12:41 AM, Animesh Manna wrote:
DSB support single register write through opcode 0x1. Generic
api created which accumulate all single register write in a batch
buffer and once DSB is triggered, it will program all the registers
at the same time.
v1: Initial version.
v2: Unused
As we track when we put the GT device to sleep upon idling, we can use
that callback to sample the current rc6 counters and record the
timestamp for estimating samples after that point while asleep.
v2: Stick to using ktime_t
v3: Track user_wakerefs that interfere with the new
Quoting Linus Torvalds (2019-09-12 12:59:25)
> On Thu, Sep 12, 2019 at 12:51 PM Martin Wilck wrote:
> >
> > Is there an alternative to reverting aa56a292ce62 ("drm/i915/userptr:
> > Acquire the page lock around set_page_dirty()")? And if we do, what
> > would be the consequences? Would other
On Thu, 12 Sep 2019, Animesh Manna wrote:
> This patch adds a function, which will internally get the gem buffer
> for DSB engine. The GEM buffer is from global GTT, and is mapped into
> CPU domain, contains the data + opcode to be feed to DSB engine.
>
> v1: Initial version.
>
> v2:
> - removed
== Series Details ==
Series: series starting with [1/4] drm/i915/tgl: Add missing ddi clock select
during DP init sequence
URL : https://patchwork.freedesktop.org/series/66556/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6874_full -> Patchwork_14370_full
Quoting Tvrtko Ursulin (2019-09-12 13:38:47)
>
> On 12/09/2019 12:32, Chris Wilson wrote:
> > + if (val)
> > + /*
> > + * If we are coming back from being runtime suspended we must
> > + * be careful not to report a larger value than returned
> > +
On 12/09/2019 12:32, Chris Wilson wrote:
As we track when we put the GT device to sleep upon idling, we can use
that callback to sample the current rc6 counters and record the
timestamp for estimating samples after that point while asleep.
v2: Stick to using ktime_t
v3: Track user_wakerefs
On 11/09/2019 17:50, Patchwork wrote:
== Series Details ==
Series: drm/i915/pmu: Skip busyness sampling when and where not needed
URL : https://patchwork.freedesktop.org/series/66541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6872 -> Patchwork_14363
On 9/12/2019 12:41 AM, Animesh Manna wrote:
This patch adds a function, which will internally get the gem buffer
for DSB engine. The GEM buffer is from global GTT, and is mapped into
CPU domain, contains the data + opcode to be feed to DSB engine.
v1: Initial version.
v2:
- removed some
Hi Chris,
On Tue, 2019-09-10 at 17:20 +0300, Leho Kraav wrote:
> On Fri, Aug 09, 2019 at 01:53:43PM +0100, Chris Wilson wrote:
> > Quoting Martin Wilck (2019-08-09 13:41:42)
> > > This happened to me today, running kernel 5.3.0-rc3-1.g571863b-
> > > default
> > > (5.3-rc3 with just a few patches
Keep the engine awake to ensure that we don't inject any pm-idle
requests.
References: https://bugs.freedesktop.org/show_bug.cgi?id=08
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
On 9/12/2019 12:41 AM, Animesh Manna wrote:
Display State Buffer(DSB) is a new hardware capability, introduced
in GEN12 display. DSB allows a driver to batch-program display HW
registers.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Shashank Sharma
Signed-off-by: Animesh Manna
---
== Series Details ==
Series: Mdev: support mutiple kinds of devices
URL : https://patchwork.freedesktop.org/series/66588/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6877 -> Patchwork_14376
Summary
---
**SUCCESS**
On Thu, Sep 12, 2019 at 12:51 PM Martin Wilck wrote:
>
> Is there an alternative to reverting aa56a292ce62 ("drm/i915/userptr:
> Acquire the page lock around set_page_dirty()")? And if we do, what
> would be the consequences? Would other patches need to be reverted,
> too?
Looking at that
Quoting Mika Kuoppala (2019-09-12 12:53:01)
> Chris Wilson writes:
>
> > After we manipulate the context to allow replay after a GPU reset, force
> > that context to be reloaded. This should be a layer of paranoia, for if
> > the GPU was reset, the context will no longer be resident!
> >
> >
On Thu, Sep 12, 2019 at 11:23:09AM +, Martin Wilck wrote:
>
> There's a considerable risk that many users will start seeing this
> regression when 5.3 is released. I am not aware of a workaround.
>
> Is there an alternative to reverting aa56a292ce62 ("drm/i915/userptr:
> Acquire the page
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