[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add feature flag for platforms with DRAM info

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915: Add feature flag for platforms with DRAM info URL : https://patchwork.freedesktop.org/series/67801/ State : success == Summary == CI Bug Log - changes from CI_DRM_7045_full -> Patchwork_14732_full

Re: [Intel-gfx] [PATCH V2 6/8] mdev: introduce virtio device and its device ops

2019-10-09 Thread Jason Wang
On 2019/10/1 上午5:36, Alex Williamson wrote: On Fri, 27 Sep 2019 16:25:13 + Parav Pandit wrote: Hi Alex, -Original Message- From: Alex Williamson Sent: Tuesday, September 24, 2019 6:07 PM To: Jason Wang Cc: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev4)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev4) URL : https://patchwork.freedesktop.org/series/67782/ State : success == Summary == CI Bug Log - changes from CI_DRM_7044_full -> Patchwork_14731_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/vbt: Handle generic DTD block

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/vbt: Handle generic DTD block URL : https://patchwork.freedesktop.org/series/67811/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14741 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vbt: Handle generic DTD block

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/vbt: Handle generic DTD block URL : https://patchwork.freedesktop.org/series/67811/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4081e8320e9c drm/i915/vbt: Handle generic DTD block -:46: WARNING:UNNECESSARY_ELSE: else is not generally

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Add microcontrollers documentation section

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add microcontrollers documentation section URL : https://patchwork.freedesktop.org/series/67810/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14740

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/tgl: the BCS engine supports relative MMIO

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/tgl: the BCS engine supports relative MMIO URL : https://patchwork.freedesktop.org/series/67809/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14739

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp-mst: Drop connection_mutex check

2019-10-09 Thread Patchwork
== Series Details == Series: drm/dp-mst: Drop connection_mutex check URL : https://patchwork.freedesktop.org/series/67807/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14738 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp-mst: Drop connection_mutex check

2019-10-09 Thread Patchwork
== Series Details == Series: drm/dp-mst: Drop connection_mutex check URL : https://patchwork.freedesktop.org/series/67807/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/dp-mst: Drop connection_mutex check - + ^~~

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp-mst: Drop connection_mutex check

2019-10-09 Thread Patchwork
== Series Details == Series: drm/dp-mst: Drop connection_mutex check URL : https://patchwork.freedesktop.org/series/67807/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1d7c57f40bb1 drm/dp-mst: Drop connection_mutex check -:8: ERROR:GIT_COMMIT_ID: Please use git commit

[Intel-gfx] [PATCH] drm/i915/vbt: Handle generic DTD block

2019-10-09 Thread Matt Roper
VBT revision 229 adds a new "Generic DTD" block 58 and deprecates the old LFP panel mode data in block 42. Let's start parsing this block to fill in the panel fixed mode on devices with a >=229 VBT. Bspec: 54751 Bspec: 20148 Signed-off-by: Matt Roper --- I don't think we've encountered any

[Intel-gfx] [PATCH v2 1/3] drm/i915: Add microcontrollers documentation section

2019-10-09 Thread Daniele Ceraolo Spurio
To better organize the information, add a microcontrollers section and move/link the GuC, HuC and DMC documentation under it. Also add a small intro. Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Acked-by: Anna Karas Reviewed-by: Martin Peres --- Documentation/gpu/i915.rst | 18

[Intel-gfx] [PATCH v2 2/3] drm/i915/guc: improve documentation

2019-10-09 Thread Daniele Ceraolo Spurio
Add a short description of what we expect from GuC and some minor improvements to existing documentation. Also remove a comment about a difference between GuC and HuC that is not true anymore. v2: add that the GuC is not mandatory (Martin) Signed-off-by: Daniele Ceraolo Spurio Cc: Michal

[Intel-gfx] [PATCH v2 3/3] drm/i915/huc: improve documentation

2019-10-09 Thread Daniele Ceraolo Spurio
Better explain the usage of the microcontroller and what i915 is responsible of. While at it, fix the documentation for the auth function, which doesn't do any pinning anymore. v2: add a comment on HuC being optional and descrive how HuC accesses memory (Martin) Signed-off-by: Daniele

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v7,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [v7,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync URL : https://patchwork.freedesktop.org/series/67806/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14737

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915/perf: store the associated engine of a stream

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/perf: store the associated engine of a stream URL : https://patchwork.freedesktop.org/series/67804/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14736

[Intel-gfx] linux-next: build failure after merge of the drm tree

2019-10-09 Thread Stephen Rothwell
Hi all, After merging the drm tree, today's linux-next build (x86_64 allmodconfig) failed like this: In file included from drivers/gpu/drm/i915/i915_vma.h:35, from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17, from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/perf: store the associated engine of a stream

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/perf: store the associated engine of a stream URL : https://patchwork.freedesktop.org/series/67804/ State : warning == Summary == $ dim checkpatch origin/drm-tip bf2b0e099619 drm/i915/perf: store the associated engine of a

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/11] drm/i915/perf: Disable rc6 only while OA is enabled (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [01/11] drm/i915/perf: Disable rc6 only while OA is enabled (rev2) URL : https://patchwork.freedesktop.org/series/67802/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14735

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/print: cleanup and new drm_device based logging

2019-10-09 Thread Patchwork
== Series Details == Series: drm/print: cleanup and new drm_device based logging URL : https://patchwork.freedesktop.org/series/67795/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7043_full -> Patchwork_14728_full Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/perf: Disable rc6 only while OA is enabled (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [01/11] drm/i915/perf: Disable rc6 only while OA is enabled (rev2) URL : https://patchwork.freedesktop.org/series/67802/ State : warning == Summary == $ dim checkpatch origin/drm-tip abb0ff1fe0d5 drm/i915/perf: Disable rc6 only while OA is

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Leave tell-tales as to why pending[] is bad (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad (rev2) URL : https://patchwork.freedesktop.org/series/67786/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14734

Re: [Intel-gfx] [PATCH 3/3] drm/i915/huc: improve documentation

2019-10-09 Thread Daniele Ceraolo Spurio
On 10/9/19 2:44 PM, Daniele Ceraolo Spurio wrote: On 10/9/19 7:41 AM, Martin Peres wrote: On 28/09/2019 00:42, Daniele Ceraolo Spurio wrote: Better explain the usage of the microcontroller and what i915 is responsible of. While at it, fix the documentation for the auth function, which

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv (rev2) URL : https://patchwork.freedesktop.org/series/67799/ State : success == Summary == CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14733

[Intel-gfx] [PATCH 1/2] drm/i915/tgl: the BCS engine supports relative MMIO

2019-10-09 Thread Daniele Ceraolo Spurio
The specs don't mention any specific HW limitation on the blitter and manual inspection shows that the HW does set the relative MMIO bit in the LRI of the blitter context image, so we can remove our limitations. Signed-off-by: Daniele Ceraolo Spurio Cc: Chris Wilson Cc: John Harrison Cc: Mika

[Intel-gfx] [PATCH 2/2] drm/i915/tgl: simplify the lrc register list for !RCS

2019-10-09 Thread Daniele Ceraolo Spurio
There are small differences between the blitter and the video engines in the xcs context image (e.g. registers 0x200 and 0x204 only exist on the blitter). Since we never explicitly set a value for those register and given that we don't need to update the offsets in the lrc image when we change

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Leave tell-tales as to why pending[] is bad

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad URL : https://patchwork.freedesktop.org/series/67786/ State : success == Summary == CI Bug Log - changes from CI_DRM_7043_full -> Patchwork_14726_full

Re: [Intel-gfx] [PATCH] drm/dp-mst: Drop connection_mutex check

2019-10-09 Thread Lyude Paul
oh, completely forgot about this one Reviewed-by: Lyude Paul On Thu, 2019-10-10 at 00:41 +0200, Daniel Vetter wrote: > Private atomic objects have grown their own locking with > > commit b962a12050a387e4bbf3a48745afe1d29d396b0d > Author: Rob Clark > Date: Mon Oct 22 14:31:22 2018 +0200 > >

[Intel-gfx] [PATCH] drm/dp-mst: Drop connection_mutex check

2019-10-09 Thread Daniel Vetter
Private atomic objects have grown their own locking with commit b962a12050a387e4bbf3a48745afe1d29d396b0d Author: Rob Clark Date: Mon Oct 22 14:31:22 2018 +0200 drm/atomic: integrate modeset lock with private objects which means we're no longer relying on connection_mutex for mst state

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv (rev2) URL : https://patchwork.freedesktop.org/series/67799/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7da5381e3ab8 drm/i915: Move SAGV block time to dev_priv -:63:

[Intel-gfx] [PATCH v7 4/6] drm/i915/display/icl: Enable master-slaves in trans port sync

2019-10-09 Thread Manasi Navare
As per the display enable sequence, we need to follow the enable sequence for slaves first with DP_TP_CTL set to Idle and configure the transcoder port sync register to select the corersponding master, then follow the enable sequence for master leaving DP_TP_CTL to idle. At this point the

[Intel-gfx] [PATCH v7 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-10-09 Thread Manasi Navare
After the state is committed, we readout the HW registers and compare the HW state with the SW state that we just committed. For Transcdoer port sync, we add master_transcoder and the salves bitmask to the crtc_state, hence we need to read those during the HW state readout to avoid pipe state

[Intel-gfx] [PATCH v7 6/6] drm/i915/display/icl: In port sync mode disable slaves first then master

2019-10-09 Thread Manasi Navare
In the transcoder port sync mode, the slave transcoders mask their vblanks until master transcoder's vblank so while disabling them, make sure slaves are disabled first and then the masters. v5: * Dont pass dev priv to get_slave_crtc (Ville) v4: * Obtain slave state from master (Maarten) v3: *

[Intel-gfx] [PATCH v7 5/6] drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence

2019-10-09 Thread Manasi Navare
This clears the transcoder port sync bits of the TRANS_DDI_FUNC_CTL2 register during crtc_disable(). v2: * Directly write the trans_port_sync reg value (Maarten) Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Cc: Jani Nikula Signed-off-by: Manasi Navare Reviewed-by: Maarten

[Intel-gfx] [PATCH v7 1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-09 Thread Manasi Navare
In case of tiled displays when the two tiles are sent across two CRTCs over two separate DP SST connectors, we need a mechanism to synchronize the two CRTCs and their corresponding transcoders. So use the master-slave mode where there is one master corresponding to last horizontal and vertical

[Intel-gfx] [PATCH v7 2/6] drm/i915/display/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports

2019-10-09 Thread Manasi Navare
In case of tiled displays where different tiles are displayed across different ports, we need to synchronize the transcoders involved. This patch implements the transcoder port sync feature for synchronizing one master transcoder with one or more slave transcoders. This is only enbaled in slave

Re: [Intel-gfx] [PATCH 3/3] drm/i915/huc: improve documentation

2019-10-09 Thread Daniele Ceraolo Spurio
On 10/9/19 7:41 AM, Martin Peres wrote: On 28/09/2019 00:42, Daniele Ceraolo Spurio wrote: Better explain the usage of the microcontroller and what i915 is responsible of. While at it, fix the documentation for the auth function, which doesn't do any pinning anymore. Signed-off-by: Daniele

Re: [Intel-gfx] [PATCH v7 0/3] CRTC background color

2019-10-09 Thread Matt Roper
On Wed, Oct 09, 2019 at 05:01:20PM -0400, Daniele Castagna wrote: > On Wed, Oct 9, 2019 at 1:34 PM Matt Roper wrote: > > > > The previous version of this series was posted in February here: > > > > https://lists.freedesktop.org/archives/dri-devel/2019-February/208068.html > > > > Right

[Intel-gfx] [PATCH 7/9] drm/i915/perf: Allow dynamic reconfiguration of the OA stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Introduce a new perf_ioctl command to change the OA configuration of the active stream. This allows the OA stream to be reconfigured between batch buffers, giving greater flexibility in sampling. We inject a request into the OA context to reconfigure the stream

[Intel-gfx] [PATCH 8/9] drm/i915/perf: allow holding preemption on filtered ctx

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We would like to make use of perf in Vulkan. The Vulkan API is much lower level than OpenGL, with applications directly exposed to the concept of command buffers (pretty much equivalent to our batch buffers). In Vulkan, queries are always limited in scope to a command

[Intel-gfx] [PATCH 3/9] drm/i915/perf: allow for CS OA configs to be created lazily

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these OA configuration buffers right before executing a set of userspace

[Intel-gfx] [PATCH 9/9] drm/i915/execlists: Prevent merging requests with conflicting flags

2019-10-09 Thread Chris Wilson
We set out-of-bound parameters inside the i915_requests.flags field, such as disabling preemption or marking the end-of-context. We should not coalesce consecutive requests if they have differing instructions as we only inspect the last active request in a context. Thus if we allow a later request

[Intel-gfx] [PATCH 5/9] drm/i915/perf: implement active wait for noa configurations

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin NOA configuration take some amount of time to apply. That amount of time depends on the size of the GT. There is no documented time for this. For example, past experimentations with powergating configuration changes seem to indicate a 60~70us delay. We go with 500us as

[Intel-gfx] [PATCH 6/9] drm/i915/perf: execute OA configuration from command stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We haven't run into issues with programming the global OA/NOA registers configuration from CPU so far, but HW engineers actually recommend doing this from the command streamer. On TGL in particular one of the clock domain in which some of that programming goes might not

[Intel-gfx] [PATCH 4/9] drm/i915: add support for perf configuration queries

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content

[Intel-gfx] [PATCH 2/9] drm/i915/perf: introduce a versioning of the i915-perf uapi

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Reporting this version will help application figure out what level of the support the running kernel provides. v2: Add i915_perf_ioctl_version() (Chris) Signed-off-by: Lionel Landwerlin Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_getparam.c | 4

[Intel-gfx] [PATCH 1/9] drm/i915/perf: store the associated engine of a stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We'll use this information later to verify that a client trying to reconfigure the stream does so on the right engine. For now, we want to pull the knowledge of which engine we use into a central property. Signed-off-by: Lionel Landwerlin ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites (rev2) URL : https://patchwork.freedesktop.org/series/67741/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7042_full -> Patchwork_14725_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add feature flag for platforms with DRAM info

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915: Add feature flag for platforms with DRAM info URL : https://patchwork.freedesktop.org/series/67801/ State : success == Summary == CI Bug Log - changes from CI_DRM_7045 -> Patchwork_14732 Summary

Re: [Intel-gfx] [PATCH 01/11] drm/i915/perf: Disable rc6 only while OA is enabled

2019-10-09 Thread Lionel Landwerlin
On 09/10/2019 23:52, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-10-09 21:46:56) Hmm... nope, sorry. We'll loose NOA configuration if you do that. And you'll have to rerun the oa config BO prior to enabling. Is that not worth it? Move the enable_metric_set/disable_metric_set to

Re: [Intel-gfx] [PATCH v7 0/3] CRTC background color

2019-10-09 Thread Daniele Castagna
On Wed, Oct 9, 2019 at 1:34 PM Matt Roper wrote: > > The previous version of this series was posted in February here: > > https://lists.freedesktop.org/archives/dri-devel/2019-February/208068.html > > Right before we merged this in February Maarten noticed that we should > be setting up

Re: [Intel-gfx] [PATCH 01/11] drm/i915/perf: Disable rc6 only while OA is enabled

2019-10-09 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-10-09 21:46:56) > Hmm... nope, sorry. > > We'll loose NOA configuration if you do that. > And you'll have to rerun the oa config BO prior to enabling. Is that not worth it? Move the enable_metric_set/disable_metric_set to i915_perf_enable_locked as well? -Chris

[Intel-gfx] [PATCH] drm/i915/perf: implement active wait for noa configurations

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin NOA configuration take some amount of time to apply. That amount of time depends on the size of the GT. There is no documented time for this. For example, past experimentations with powergating configuration changes seem to indicate a 60~70us delay. We go with 500us as

Re: [Intel-gfx] [PATCH 01/11] drm/i915/perf: Disable rc6 only while OA is enabled

2019-10-09 Thread Lionel Landwerlin
Hmm... nope, sorry. We'll loose NOA configuration if you do that. And you'll have to rerun the oa config BO prior to enabling. -Lionel On 09/10/2019 23:36, Chris Wilson wrote: Move rpm_get and forcewake_get into the perf enable (and corresponding the puts into the disable) so that we only

[Intel-gfx] [PATCH] drm/i915/execlists: Leave tell-tales as to why pending[] is bad

2019-10-09 Thread Chris Wilson
Before we BUG out with bad pending state, leave a telltale as to which test failed. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_lrc.c | 30 - drivers/gpu/drm/i915/i915_gem.h | 8 2 files changed,

[Intel-gfx] [PATCH 06/11] drm/i915: add support for perf configuration queries

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content

[Intel-gfx] [PATCH 05/11] drm/i915/perf: allow for CS OA configs to be created lazily

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these OA configuration buffers right before executing a set of userspace

[Intel-gfx] [PATCH 10/11] drm/i915/perf: allow holding preemption on filtered ctx

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We would like to make use of perf in Vulkan. The Vulkan API is much lower level than OpenGL, with applications directly exposed to the concept of command buffers (pretty much equivalent to our batch buffers). In Vulkan, queries are always limited in scope to a command

[Intel-gfx] [PATCH 09/11] drm/i915/perf: Allow dynamic reconfiguration of the OA stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Introduce a new perf_ioctl command to change the OA configuration of the active stream. This allows the OA stream to be reconfigured between batch buffers, giving greater flexibility in sampling. We inject a request into the OA context to reconfigure the stream

[Intel-gfx] [PATCH 03/11] drm/i915/perf: store the associated engine of a stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We'll use this information later to verify that a client trying to reconfigure the stream does so on the right engine. For now, we want to pull the knowledge of which engine we use into a central property. Signed-off-by: Lionel Landwerlin ---

[Intel-gfx] [PATCH 02/11] drm/i915/perf: Tidy up unpinning the oa_context

2019-10-09 Thread Chris Wilson
Rename the function for consistency, and remove the redundant test. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_perf.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index

[Intel-gfx] [PATCH 11/11] drm/i915/execlists: Prevent merging requests with conflicting flags

2019-10-09 Thread Chris Wilson
We set out-of-bound parameters inside the i915_requests.flags field, such as disabling preemption or marking the end-of-context. We should not coalesce consecutive requests if they have differing instructions as we only inspect the last active request in a context. Thus if we allow a later request

[Intel-gfx] [PATCH 01/11] drm/i915/perf: Disable rc6 only while OA is enabled

2019-10-09 Thread Chris Wilson
Move rpm_get and forcewake_get into the perf enable (and corresponding the puts into the disable) so that we only prevent powermaangement while we OA is engaged. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_perf.c | 49 --

[Intel-gfx] [PATCH 07/11] drm/i915/perf: implement active wait for noa configurations

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin NOA configuration take some amount of time to apply. That amount of time depends on the size of the GT. There is no documented time for this. For example, past experimentations with powergating configuration changes seem to indicate a 60~70us delay. We go with 500us as

[Intel-gfx] [PATCH 08/11] drm/i915/perf: execute OA configuration from command stream

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin We haven't run into issues with programming the global OA/NOA registers configuration from CPU so far, but HW engineers actually recommend doing this from the command streamer. On TGL in particular one of the clock domain in which some of that programming goes might not

[Intel-gfx] [PATCH 04/11] drm/i915/perf: introduce a versioning of the i915-perf uapi

2019-10-09 Thread Chris Wilson
From: Lionel Landwerlin Reporting this version will help application figure out what level of the support the running kernel provides. v2: Add i915_perf_ioctl_version() (Chris) Signed-off-by: Lionel Landwerlin Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_getparam.c | 4

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev4)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev4) URL : https://patchwork.freedesktop.org/series/67782/ State : success == Summary == CI Bug Log - changes from CI_DRM_7044 -> Patchwork_14731

Re: [Intel-gfx] [PATCH] drm/i915/cml: Add second PCH ID for CMP

2019-10-09 Thread James Ausmus
On Wed, Oct 09, 2019 at 01:00:07PM -0700, Rodrigo Vivi wrote: > On Wed, Oct 09, 2019 at 10:29:43AM -0700, Matt Roper wrote: > > On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote: > > > On 17.9.2019 2.32, Matt Roper wrote: > > > > The CMP PCH ID we have in the driver is correct for the

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv

2019-10-09 Thread James Ausmus
On Wed, Oct 09, 2019 at 06:15:26PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to > dev_priv > URL : https://patchwork.freedesktop.org/series/67799/ > State : failure > > == Summary == > > CI Bug Log - changes from

Re: [Intel-gfx] [PATCH] drm/i915/cml: Add second PCH ID for CMP

2019-10-09 Thread Rodrigo Vivi
On Wed, Oct 09, 2019 at 10:29:43AM -0700, Matt Roper wrote: > On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote: > > On 17.9.2019 2.32, Matt Roper wrote: > > > The CMP PCH ID we have in the driver is correct for the CML-U machines we > > > have > > > in our CI system, but the CML-S

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: remove redundant variable err

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915: remove redundant variable err URL : https://patchwork.freedesktop.org/series/6/ State : success == Summary == CI Bug Log - changes from CI_DRM_7041_full -> Patchwork_14722_full Summary ---

Re: [Intel-gfx] [PATCH v2 1/9] drm/i915/perf: store the associated engine of a stream

2019-10-09 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-10-09 15:15:55) > On 09/10/2019 17:10, Chris Wilson wrote: > > Are you happy with associating the i915_perf_stream with the > > specific_ctx and controlling all the parameters via perf-ioctl? > > > > Yeah sounds like it should work, I would like to test the whole

Re: [Intel-gfx] [PATCH] drm/i915: Kill the undead i915_gem_batch_pool.c

2019-10-09 Thread Sean Paul
On Wed, Oct 09, 2019 at 07:57:33PM +0100, Chris Wilson wrote: > Quoting Sean Paul (2019-10-09 19:53:31) > > On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson > > wrote: > > > > > > Quoting Joonas Lahtinen (2019-08-22 12:12:03) > > > > Quoting Chris Wilson (2019-08-22 09:59:17) > > > > > You have to

Re: [Intel-gfx] [PATCH v2 25/27] drm/dp_mst: Add basic topology reprobing when resuming

2019-10-09 Thread Lyude Paul
On Fri, 2019-09-27 at 09:52 -0400, Sean Paul wrote: > On Tue, Sep 03, 2019 at 04:46:03PM -0400, Lyude Paul wrote: > > Finally! For a very long time, our MST helpers have had one very > > annoying issue: They don't know how to reprobe the topology state when > > coming out of suspend. This means

[Intel-gfx] [PATCH] drm/i915: Add feature flag for platforms with DRAM info

2019-10-09 Thread Stuart Summers
Platforms prior to gen9 to not supply this info to software. Instead of checking the platform directly, add a new feature flag, HAS_DRAM_INFO, to allow us to quickly tell if the platform supports this feature. v2: Fix commit message and change feature flag name to HAS_DRAM_INFO Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915: Kill the undead i915_gem_batch_pool.c

2019-10-09 Thread Chris Wilson
Quoting Sean Paul (2019-10-09 19:53:31) > On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson wrote: > > > > Quoting Joonas Lahtinen (2019-08-22 12:12:03) > > > Quoting Chris Wilson (2019-08-22 09:59:17) > > > > You have to cut it off at the neck, otherwise it just reappears in the > > > > next merge,

Re: [Intel-gfx] [PATCH] drm/i915: Kill the undead i915_gem_batch_pool.c

2019-10-09 Thread Sean Paul
On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson wrote: > > Quoting Joonas Lahtinen (2019-08-22 12:12:03) > > Quoting Chris Wilson (2019-08-22 09:59:17) > > > You have to cut it off at the neck, otherwise it just reappears in the > > > next merge, like commit 3f866026f0ce ("Merge drm/drm-next > > >

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Prevent merging requests with conflicting flags

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Prevent merging requests with conflicting flags URL : https://patchwork.freedesktop.org/series/67776/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7041_full -> Patchwork_14721_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv URL : https://patchwork.freedesktop.org/series/67799/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14730

Re: [Intel-gfx] [PATCH 8/8] drm/print: introduce new struct drm_device based logging macros

2019-10-09 Thread Ruhl, Michael J
>-Original Message- >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of >Jani Nikula >Sent: Wednesday, October 9, 2019 11:38 AM >To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org >Cc: Nikula, Jani ; Sam Ravnborg >Subject: [Intel-gfx] [PATCH

Re: [Intel-gfx] [PATCH v3 1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-09 Thread Ville Syrjälä
On Sun, Oct 06, 2019 at 08:43:31PM -0700, Manasi Navare wrote: > On Mon, Sep 30, 2019 at 05:14:15PM +0300, Ville Syrjälä wrote: > > On Sun, Sep 22, 2019 at 10:08:02AM -0700, Manasi Navare wrote: > > > In case of tiled displays when the two tiles are sent across two CRTCs > > > over two separate DP

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv URL : https://patchwork.freedesktop.org/series/67799/ State : warning == Summary == $ dim checkpatch origin/drm-tip e6a4842921d1 drm/i915: Move SAGV block time to dev_priv -:63:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev3)

2019-10-09 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/execlists: Protect peeking at execlists->active (rev3) URL : https://patchwork.freedesktop.org/series/67782/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14729

Re: [Intel-gfx] [PATCH] drm/i915/cml: Add second PCH ID for CMP

2019-10-09 Thread Matt Roper
On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote: > On 17.9.2019 2.32, Matt Roper wrote: > > The CMP PCH ID we have in the driver is correct for the CML-U machines we > > have > > in our CI system, but the CML-S and CML-H CI machines appear to use a > > different PCH ID, leading our

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Leave tell-tales as to why pending[] is bad

2019-10-09 Thread kbuild test robot
Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [cannot apply to v5.4-rc2 next-20191009] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option

[Intel-gfx] [CI 2/2] drm/i915/tgl: Read SAGV block time from PCODE

2019-10-09 Thread Lucas De Marchi
From: James Ausmus Starting from TGL, we now need to read the SAGV block time via a PCODE mailbox, rather than having a static value. BSpec: 49326 v2: Fix up pcode val data type (Ville), tighten variable scope (Ville) Cc: Ville Syrjälä Cc: Stanislav Lisovskiy Cc: Lucas De Marchi

[Intel-gfx] [CI 1/2] drm/i915: Move SAGV block time to dev_priv

2019-10-09 Thread Lucas De Marchi
From: James Ausmus In prep for newer platforms having more complicated ways to determine the SAGV block time, move the variable to dev_priv, and extract the setting to an initial setup function. While we're at it, update the if ladder to follow the new gen -> old gen order preference, and warn

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/print: cleanup and new drm_device based logging

2019-10-09 Thread Patchwork
== Series Details == Series: drm/print: cleanup and new drm_device based logging URL : https://patchwork.freedesktop.org/series/67795/ State : success == Summary == CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14728 Summary ---

Re: [Intel-gfx] [PATCH] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-10-09 17:37:42) > > On 09/10/2019 16:59, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-10-09 16:53:53) > >> > >> On 09/10/2019 11:26, Chris Wilson wrote: > >>> +static inline void > >>> +execlists_active_lock(struct intel_engine_execlists *execlists) > >>> +{ >

Re: [Intel-gfx] [PATCH v2] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Tvrtko Ursulin
On 09/10/2019 17:32, Chris Wilson wrote: Quoting Chris Wilson (2019-10-09 17:09:06) The active/pending execlists is no longer protected by the engine->active.lock, but is serialised by the tasklet instead. Update the locking around the debug and stats to follow suit. v2: local_bh_disable() to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/print: cleanup and new drm_device based logging

2019-10-09 Thread Patchwork
== Series Details == Series: drm/print: cleanup and new drm_device based logging URL : https://patchwork.freedesktop.org/series/67795/ State : warning == Summary == $ dim checkpatch origin/drm-tip 89aa720fbb9a drm/i915: use drm_debug_enabled() to check for debug categories ad0afd4a8ac2

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/execlists: Leave tell-tales as to why pending[] is bad

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad URL : https://patchwork.freedesktop.org/series/67786/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK include/generated/compile.h

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Leave tell-tales as to why pending[] is bad

2019-10-09 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad URL : https://patchwork.freedesktop.org/series/67786/ State : success == Summary == CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14726

[Intel-gfx] ✗ Fi.CI.BUILD: failure for treewide: remove unused argument in lock_release() (rev2)

2019-10-09 Thread Patchwork
== Series Details == Series: treewide: remove unused argument in lock_release() (rev2) URL : https://patchwork.freedesktop.org/series/67007/ State : failure == Summary == Applying: locking/lockdep: Remove unused @nested argument from lock_release() error: sha1 information is lacking or

Re: [Intel-gfx] [PATCH] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Tvrtko Ursulin
On 09/10/2019 16:59, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-10-09 16:53:53) On 09/10/2019 11:26, Chris Wilson wrote: +static inline void +execlists_active_lock(struct intel_engine_execlists *execlists) +{ + tasklet_lock(>tasklet); +} + +static inline void

Re: [Intel-gfx] [PATCH v2] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Chris Wilson
Quoting Chris Wilson (2019-10-09 17:09:06) > The active/pending execlists is no longer protected by the > engine->active.lock, but is serialised by the tasklet instead. Update > the locking around the debug and stats to follow suit. > > v2: local_bh_disable() to prevent recursing into the tasklet

Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree

2019-10-09 Thread Alex Deucher
Applied. thanks! Alex On Tue, Oct 8, 2019 at 8:36 PM Stephen Rothwell wrote: > > Hi all, > > After merging the drm-misc tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > > In file included from drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_module.c:25: >

[Intel-gfx] [PATCH v2] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Chris Wilson
The active/pending execlists is no longer protected by the engine->active.lock, but is serialised by the tasklet instead. Update the locking around the debug and stats to follow suit. v2: local_bh_disable() to prevent recursing into the tasklet in case we trigger a softirq (Tvrtko) Fixes:

Re: [Intel-gfx] [PATCH] drm/i915/gt: execlists->active is serialised by the tasklet

2019-10-09 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-10-09 16:53:53) > > On 09/10/2019 11:26, Chris Wilson wrote: > > +static inline void > > +execlists_active_lock(struct intel_engine_execlists *execlists) > > +{ > > + tasklet_lock(>tasklet); > > +} > > + > > +static inline void > > +execlists_active_unlock(struct

Re: [Intel-gfx] [PATCH 5/5] drm/mm: Use clear_bit_unlock() for releasing the drm_mm_node()

2019-10-09 Thread Daniel Vetter
On Fri, Oct 04, 2019 at 01:01:36PM +0100, Tvrtko Ursulin wrote: > > On 04/10/2019 12:17, Chris Wilson wrote: > > Quoting Chris Wilson (2019-10-04 12:07:10) > > > Quoting Tvrtko Ursulin (2019-10-04 10:15:20) > > > > > > > > On 03/10/2019 22:01, Chris Wilson wrote: > > > > > A few callers need to

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