== Series Details ==
Series: drm/i915/selftests: Flush any i915_active callback work as well
URL : https://patchwork.freedesktop.org/series/68487/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14958_full
On 2019/10/25 上午4:44, Alex Williamson wrote:
On Thu, 24 Oct 2019 11:51:35 +0800
Jason Wang wrote:
On 2019/10/24 上午5:57, Alex Williamson wrote:
On Wed, 23 Oct 2019 21:07:50 +0800
Jason Wang wrote:
This patch implements basic support for mdev driver that supports
virtio transport for
On 2019/10/25 上午3:54, Alex Williamson wrote:
On Thu, 24 Oct 2019 11:31:04 +0800
Jason Wang wrote:
On 2019/10/24 上午5:42, Alex Williamson wrote:
On Wed, 23 Oct 2019 21:07:48 +0800
Jason Wang wrote:
Add support to parse mdev class id table.
Reviewed-by: Parav Pandit
Signed-off-by: Jason
== Series Details ==
Series: drm/i915/selftests: Flush interrupts before disabling tasklets
URL : https://patchwork.freedesktop.org/series/68486/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14957_full
On 2019/10/25 上午4:13, Alex Williamson wrote:
On Thu, 24 Oct 2019 13:46:36 -0600
Alex Williamson wrote:
On Thu, 24 Oct 2019 11:27:36 +0800
Jason Wang wrote:
On 2019/10/24 上午5:42, Alex Williamson wrote:
On Wed, 23 Oct 2019 21:07:47 +0800
Jason Wang wrote:
Mdev bus only supports vfio
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Extract GT render power state
management
URL : https://patchwork.freedesktop.org/series/68541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7178 -> Patchwork_14975
On Fri, 2019-10-25 at 00:50 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/display/psr: Print in debugfs if PSR is not enabled
> because of sink
> URL : https://patchwork.freedesktop.org/series/68482/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Extract GT render power state
management
URL : https://patchwork.freedesktop.org/series/68541/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
eaacb0193172 drm/i915: Extract GT render power state management
== Series Details ==
Series: drm/i915/display/psr: Print in debugfs if PSR is not enabled because of
sink
URL : https://patchwork.freedesktop.org/series/68482/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14955_full
On Thu, Oct 24, 2019 at 02:17:34PM -0700, Souza, Jose wrote:
> On Tue, 2019-10-08 at 14:17 -0700, Matt Roper wrote:
> > Gen11+ has more hardware planes than gen9 so we need to test
> > additional
> > pipe interrupt register bits to recognize any GTT faults that happen
> > on
> > these extra
== Series Details ==
Series: drm/i915: Fix PCH reference clock for FDI on HSW/BDW (rev2)
URL : https://patchwork.freedesktop.org/series/68411/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14953_full
On Thu, Oct 24, 2019 at 12:40:19PM +0100, Chris Wilson wrote:
> We would like some freedom to break the user API/ABI for future HW but
> yet still expose the driver for upstream development on that HW.
> Currently, we have the i915.force_probe module parameter to avoid binding
> to HW while the
Acked-by: Dave Airlie
On Thu, Oct 24, 2019 at 9:40 PM Chris Wilson wrote:
>
> We would like some freedom to break the user API/ABI for future HW but
> yet still expose the driver for upstream development on that HW.
> Currently, we have the i915.force_probe module parameter to avoid binding
>
On Thu, Oct 24, 2019 at 03:08:59PM -0700, Lucas De Marchi wrote:
> On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
> > From: José Roberto de Souza
> >
> > This will be helpful to diferentiate a set of GPUs
> > with the same GEN version.
> >
> > Signed-off-by: José Roberto de
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7176 -> Patchwork_14974
On Thu, Oct 24, 2019 at 12:01 AM Jani Nikula
wrote:
>
> On Thu, 24 Oct 2019, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm: Add support for integrated privacy screens
> > URL : https://patchwork.freedesktop.org/series/68472/
> > State : failure
> >
> > == Summary ==
> >
> >
On 2019-10-23 8:00 p.m., Manasi Navare wrote:
> Adaptive Sync is a VESA feature so add a DRM core helper to parse
> the EDID's detailed descritors to obtain the adaptive sync monitor range.
> Store this info as part fo drm_display_info so it can be used
> across all drivers.
> This part of the
On Wed, Oct 23, 2019 at 12:08:03PM +0300, Stanislav Lisovskiy wrote:
> Currently intel_can_enable_sagv function contains
> a mix of workarounds for different platforms
> some of them are not valid for gens >= 11 already,
> so lets split it into separate functions.
>
> v2:
> - Rework watermark
== Series Details ==
Series: Update VSC SDP / HDR Metadata SDP states on pipe updates.
URL : https://patchwork.freedesktop.org/series/68531/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7176 -> Patchwork_14973
Summary
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a706b75f5303 drm/i915: Add is_dgfx to device info
5822be50ff35 drm/i915: add new
Quoting Lionel Landwerlin (2019-10-24 16:23:01)
> On 24/10/2019 14:37, Chris Wilson wrote:
> > Quoting Mika Kuoppala (2019-10-24 12:03:31)
> >> On testing the whitelists, using any of the nonpriv
> >> flags when trying to access the register offset will lead
> >> to failure.
> >>
> >> Define
On Thu, 2019-10-24 at 15:21 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add CHICKEN_TRANS definition for transcoder D.
>
Reviewed-by: José Roberto de Souza
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 +++-
> 1 file changed, 3 insertions(+), 1
On Thu, 2019-10-24 at 15:21 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make CHICKEN_TRANS() a bit less special looking by using _PICK().
>
Reviewed-by: José Roberto de Souza
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 14 +++---
>
== Series Details ==
Series: series starting with [1/2] drm/property: Enforce more lifetime rules
URL : https://patchwork.freedesktop.org/series/68467/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14952_full
On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
From: José Roberto de Souza
This will be helpful to diferentiate a set of GPUs
with the same GEN version.
Signed-off-by: José Roberto de Souza
Signed-off-by: Lucas De Marchi
Reviewed-by: Lucas De Marchi
Lucas De Marchi
== Series Details ==
Series: Update VSC SDP / HDR Metadata SDP states on pipe updates.
URL : https://patchwork.freedesktop.org/series/68531/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d3e19ea1104d drm/i915: Add whether or not to enable an each of Video DIP
-:71:
== Series Details ==
Series: drm/i915/tgl: Handle AUX interrupts for TC ports (rev2)
URL : https://patchwork.freedesktop.org/series/68528/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7176 -> Patchwork_14972
Summary
== Series Details ==
Series: drm/i915: register vga switcheroo later, unregister earlier (rev2)
URL : https://patchwork.freedesktop.org/series/67644/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14951_full
On Tue, 2019-10-08 at 14:17 -0700, Matt Roper wrote:
> Gen11+ has more hardware planes than gen9 so we need to test
> additional
> pipe interrupt register bits to recognize any GTT faults that happen
> on
> these extra planes.
Reviewed-by: José Roberto de Souza
>
> Bspec: 50335
>
From: Andi Shyti
Pull the GuC interrupt handlers out of i915_irq.c. They now use the GT
interrupt facilities rather than the central dispatch.
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 89
On Thu, 2019-10-24 at 10:30 -0700, Matt Roper wrote:
> We're currently only processing AUX interrupts on the combo ports;
> make
> sure we handle the TC ports as well.
>
> v2: Drop stale comment
Reviewed-by: José Roberto de Souza
>
> Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT
On Thu, 24 Oct 2019 11:51:35 +0800
Jason Wang wrote:
> On 2019/10/24 上午5:57, Alex Williamson wrote:
> > On Wed, 23 Oct 2019 21:07:50 +0800
> > Jason Wang wrote:
> >
> >> This patch implements basic support for mdev driver that supports
> >> virtio transport for kernel virtio driver.
> >>
> >>
== Series Details ==
Series: drm/i914/guc: Fix resume on platforms w/o GuC submission but enabled
URL : https://patchwork.freedesktop.org/series/68526/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7175 -> Patchwork_14971
== Series Details ==
Series: mdev based hardware virtio offloading support (rev6)
URL : https://patchwork.freedesktop.org/series/66989/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7167_full -> Patchwork_14949_full
On Thu, 2019-10-24 at 12:51 -0700, Lucas De Marchi wrote:
> From: Stuart Summers
>
> Add a new macro for GEN12 platforms to be grouped under dgfx feature
> set.
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: Stuart Summers
> Signed-off-by: Lucas De Marchi
> ---
>
On Thu, 2019-10-24 at 00:35 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Making loglevel of PSR2/SU logs same.
> URL : https://patchwork.freedesktop.org/series/68439/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7155_full ->
On Thu, 24 Oct 2019 13:46:36 -0600
Alex Williamson wrote:
> On Thu, 24 Oct 2019 11:27:36 +0800
> Jason Wang wrote:
>
> > On 2019/10/24 上午5:42, Alex Williamson wrote:
> > > On Wed, 23 Oct 2019 21:07:47 +0800
> > > Jason Wang wrote:
> > >
> > >> Mdev bus only supports vfio driver right
== Series Details ==
Series: drm/i915/selftests: Mock the engine sorting for easy validation
URL : https://patchwork.freedesktop.org/series/68521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7175 -> Patchwork_14970
> On Thu, 2019-10-24 at 09:29 -0700, don.hi...@intel.com wrote:
> > From: Don Hiatt
> >
> > Check to see if GuC submission is enabled before requesting the
> > EXIT_S_STATE action.
> >
> > On some platforms (e.g. KBL) that do not support GuC submission, but
> > the user enabled the GuC
== Series Details ==
Series: series starting with [RFC,1/5] drm/i915: Drop GEM context as a direct
link from i915_request
URL : https://patchwork.freedesktop.org/series/68520/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7175 -> Patchwork_14969
On Thu, Oct 24, 2019 at 12:51:22PM -0700, Lucas De Marchi wrote:
Split gen11_irq_handler() to receive as parameter the function
pointers. This allows to share the interrupt handler even if the enable/disable
functions are different.
Make sure it's always inlined to avoid the extra indirect call
On Thu, Oct 24, 2019 at 12:51:20PM -0700, Lucas De Marchi wrote:
From: Stuart Summers
Add a new macro for GEN12 platforms to be grouped under dgfx feature
set.
Signed-off-by: Stuart Summers
Signed-off-by: Lucas De Marchi
this should actually be
Signed-off-by: Lucas De Marchi
Lucas De
On Thu, 24 Oct 2019 11:31:04 +0800
Jason Wang wrote:
> On 2019/10/24 上午5:42, Alex Williamson wrote:
> > On Wed, 23 Oct 2019 21:07:48 +0800
> > Jason Wang wrote:
> >
> >> Add support to parse mdev class id table.
> >>
> >> Reviewed-by: Parav Pandit
> >> Signed-off-by: Jason Wang
> >> ---
>
From: José Roberto de Souza
This will be helpful to diferentiate a set of GPUs
with the same GEN version.
Signed-off-by: José Roberto de Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 2
From: Stuart Summers
Add a new macro for GEN12 platforms to be grouped under dgfx feature
set.
Signed-off-by: Stuart Summers
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_pci.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c
Split gen11_irq_handler() to receive as parameter the function
pointers. This allows to share the interrupt handler even if the enable/disable
functions are different.
Make sure it's always inlined to avoid the extra indirect call on the
hot path. Checking with gcc 9 this produce the exact same
On dgfx there's no LLC and eDRAM control table. Since now this
also means the device has global MOCS, just return early on the
initialization function.
L3 settings still apply and still need to be tweaked.
Bspec: 45101
Cc: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
---
== Series Details ==
Series: drm/i915/selftests: Mock the engine sorting for easy validation
URL : https://patchwork.freedesktop.org/series/68521/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
96ce4ba1e342 drm/i915/selftests: Mock the engine sorting for easy validation
-:27:
On Thu, 24 Oct 2019 11:27:36 +0800
Jason Wang wrote:
> On 2019/10/24 上午5:42, Alex Williamson wrote:
> > On Wed, 23 Oct 2019 21:07:47 +0800
> > Jason Wang wrote:
> >
> >> Mdev bus only supports vfio driver right now, so it doesn't implement
> >> match method. But in the future, we may add
Hi Rajat,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.4-rc4 next-20191024]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option
== Series Details ==
Series: series starting with [RFC,1/5] drm/i915: Drop GEM context as a direct
link from i915_request
URL : https://patchwork.freedesktop.org/series/68520/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
51d5bce1245c drm/i915: Drop GEM context as a direct
== Series Details ==
Series: series starting with [01/14] drm/i915: Rework watermark readout to use
plane api
URL : https://patchwork.freedesktop.org/series/68519/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7174 -> Patchwork_14968
Hi Rajat,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.4-rc4 next-20191024]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option
On Thu, 2019-10-24 at 09:29 -0700, don.hi...@intel.com wrote:
> From: Don Hiatt
>
> Check to see if GuC submission is enabled before requesting the
> EXIT_S_STATE action.
>
> On some platforms (e.g. KBL) that do not support GuC submission, but
> the user enabled the GuC communication (e.g for
== Series Details ==
Series: series starting with [01/14] drm/i915: Rework watermark readout to use
plane api
URL : https://patchwork.freedesktop.org/series/68519/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
22333473c76c drm/i915: Rework watermark readout to use plane api
Because DP ports don't use set_infoframes() / intel_write_infoframe()
machanisms, DP ports requires a handling of enabling/disabling of each
Video DIP when a changing usage of video DIP for SDP transmission such as
whether or not to use HDR.
For now it only adds enable_infoframe() callback for hsw
Because DP ports don't use intel_hdmi_infoframes_enabled() machanism,
DP ports requires a way to check a specific infoframe (aka. Video DIP )
is enabled or not.
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 21 +
It calls intel_dp_vsc_enable() and intel_dp_hdr_metadata_enable() on pipe
updates to make sure that we enable sending of VSC SDP and HDR Metadata
Infoframe SDP packet (when applicable) on fastsets.
In order to set an enabled state of VSC SDP and HDR Metadata Infoframe SDP,
It adds
It prevents sending VSC SDP Packet to a receiver when VSC SDP is not
needed. Because VSC SDP is used for PSR, YCbCr 420, HDR BT.2020 and etc,
it checks PSR is enabled or not.
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +-
1 file changed, 9
Call intel_dp_vsc_enable() and intel_dp_hdr_metadata_enable() on pipe
updates to make sure that we enable sending of VSC SDP and HDR Metadata
Infoframe SDP packet (when applicable) on fastsets.
These functions check pipe state and when the features does not need,
they disable the features.
It prevents sending HDR Metadata Infoframe SDP packet to a receiver when
HDR Metadata Infoframe SDP is not needed.
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git
== Series Details ==
Series: series starting with [1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
URL : https://patchwork.freedesktop.org/series/68517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7174 -> Patchwork_14967
On Sun, 20 Oct 2019 21:17:17 +0800
Changbin Du wrote:
> The 'functions' directive is not only for functions, but also works for
> structs/unions. So the name is misleading. This patch renames it to
> 'identifiers', which specific the functions/types to be included in
> documentation. We keep the
== Series Details ==
Series: drm/i915/gem: Make context persistence optional
URL : https://patchwork.freedesktop.org/series/68515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7174 -> Patchwork_14966
Summary
---
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
v2: Drop stale comment
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
---
On Thu, Oct 24, 2019 at 05:20:32PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 24, 2019 at 03:54:41PM +0200, Thierry Reding wrote:
> > On Thu, Oct 24, 2019 at 02:34:00PM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 24, 2019 at 12:31:06PM +0200, Thierry Reding wrote:
> > > > On Wed, Oct 23, 2019 at
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_irq.c | 9
On Thu, Oct 24, 2019 at 12:31:06PM +0200, Thierry Reding wrote:
> On Wed, Oct 23, 2019 at 05:00:41PM -0700, Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info
On Thu, Oct 24, 2019 at 10:51:20AM +0300, Jani Nikula wrote:
> On Wed, 23 Oct 2019, Manasi Navare wrote:
> > On Tue, Oct 22, 2019 at 05:03:00PM +0300, Jani Nikula wrote:
> >> Add definition for block 56, the compression parameters.
> >>
> >
> > Would this be used on DP connectors for DSC as well?
On Thu, Oct 24, 2019 at 08:13:29AM +0100, Chris Wilson wrote:
> Quoting Kumar Valsan, Prathap (2019-10-23 22:03:40)
> > On Tue, Oct 22, 2019 at 12:57:05PM +0100, Chris Wilson wrote:
> > > Probe the mocs registers for new contexts and across GPU resets. Similar
> > > to intel_workarounds, we have
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/gt: Try to more gracefully
quiesce the system before resets
URL : https://patchwork.freedesktop.org/series/68457/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7165_full -> Patchwork_14948_full
From: Don Hiatt
Check to see if GuC submission is enabled before requesting the
EXIT_S_STATE action.
On some platforms (e.g. KBL) that do not support GuC submission, but
the user enabled the GuC communication (e.g for HuC authentication)
calling the GuC EXIT_S_STATE action results in lose of
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm
(rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173 -> Patchwork_14965
Hi Dave & Daniel,
Here's the pull for last week and this week. As you know we had some trouble
with the OMAP_BO* additions last week, those have since been reverted.
Speaking of UAPI, we have a new DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED flag from
AMD to get the last signaled timeline value from
igt_allow_hang() checks that the GPU can be reset before allowing the
test to cause a GPU hang (which would need the reset to recover).
However, our checking for allowing a hang depends on i915.reset which we
later restore. Do that restoration before the check so that this test is
not affected by
== Series Details ==
Series: drm/i915: Allow gen11 to use over 32k long strides (rev2)
URL : https://patchwork.freedesktop.org/series/67077/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173 -> Patchwork_14964
Summary
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm
(rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
56ea118779e3 drm/i915: Remove nonpriv flags when srm/lrm
b34090d8a268
On 24/10/2019 14:37, Chris Wilson wrote:
Quoting Mika Kuoppala (2019-10-24 12:03:31)
On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.
Define address mask to get the mmio offset in order
to guard against any current and
On 22/10/2019 13:09, Anna Karas wrote:
Update header files containing i915_perf_stream, i915_perf_stream_ops
and i915_oa_ops definitions since they have been moved from i915_drv.h
to i915_perf_types.h.
Cc: Robert Bragg
Cc: Lionel Landwerlin
Signed-off-by: Anna Karas
Reviewed-by: Lionel
On Thu, Oct 24, 2019 at 02:47:59PM +0200, Maarten Lankhorst wrote:
> Now that we separated everything into uapi and hw, it's
> time to make the split definitive. Remove the union and
> make a copy of the hw state on modeset and fastset.
>
> Color blobs are copied in crtc atomic_check(), right
>
Op 24-10-2019 om 16:33 schreef Ville Syrjälä:
> On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
>> Instead of unconditionally verifying the cursor plane, handle it in the
>> same way as any other plane, and use our existing api to verify.
>>
>> While at it, ensure that on gen9+
On Tue 2019-10-22 17:12:06, Rajat Jain wrote:
> Certain laptops now come with panels that have integrated privacy
> screens on them. This patch adds support for such panels by adding
> a privacy-screen property to the drm_connector for the panel, that
> the userspace can then use to control and
== Series Details ==
Series: drm/i915: Allow gen11 to use over 32k long strides (rev2)
URL : https://patchwork.freedesktop.org/series/67077/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0e6c1e47c757 drm/i915: Allow gen11 to use over 32k long strides
-:33: CHECK:SPACING:
On Thu, Oct 24, 2019 at 05:20:32PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 24, 2019 at 03:54:41PM +0200, Thierry Reding wrote:
> > On Thu, Oct 24, 2019 at 02:34:00PM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 24, 2019 at 12:31:06PM +0200, Thierry Reding wrote:
> > > > On Wed, Oct 23, 2019 at
On Thu, Oct 24, 2019 at 02:47:52PM +0200, Maarten Lankhorst wrote:
> Instead of unconditionally verifying the cursor plane, handle it in the
> same way as any other plane, and use our existing api to verify.
>
> While at it, ensure that on gen9+ we verify active_planes mask as well.
> This should
On Thu, Oct 24, 2019 at 03:54:41PM +0200, Thierry Reding wrote:
> On Thu, Oct 24, 2019 at 02:34:00PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 24, 2019 at 12:31:06PM +0200, Thierry Reding wrote:
> > > On Wed, Oct 23, 2019 at 05:00:41PM -0700, Manasi Navare wrote:
> > > > Adaptive Sync is a VESA
Quoting Lionel Landwerlin (2019-10-22 11:21:43)
> On 22/10/2019 13:13, Anna Karas wrote:
> > Add missing descriptions of i915_perf_stream structure members
> > to documentation.
> >
> > Cc: Umesh Nerlige Ramappa
> > Cc: Lionel Landwerlin
> > Cc: Robert Bragg
> > Signed-off-by: Anna Karas
>
>
On Thu, Oct 24, 2019 at 02:34:00PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 24, 2019 at 12:31:06PM +0200, Thierry Reding wrote:
> > On Wed, Oct 23, 2019 at 05:00:41PM -0700, Manasi Navare wrote:
> > > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > > the EDID's detailed
To make exploration of different sorting orders and presentation of the
engines via the uabi easier, wrap the basic engine registration into a
mock (aka standalone) selftest.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 4 +
On Wed, Oct 16, 2019 at 06:22:36PM +0530, Vandita Kulkarni wrote:
> This patch add dsi_state which provides
> dsi operation mode and the link mode.
> These are needed in order to check if they
> were differently configured by GOP.
>
> In present case the GOP enables dsi in
> periodic update mode,
Having weaned GT from requiring ce->gem_context, we can stop referencing
it entirely. This also means we no longer have to create random and
unnecessary GEM contexts for internal use. GEM contexts are now entirely
for tracking GEM clients, and intel_context the execution environment on
the GPU.
Allocate only an internal intel_context for the kernel_context, forgoing
a global GEM context for internal use as we only require a separate
address space (for our own protection).
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 35 +--
Instead of rummaging through the intel_context to peek at the GEM
context in the middle of request submission to decide whether to use
semaphores, store that information on the intel_context itself.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 52
Ostensibly, as far recorded at least, we take a reference to our GEM
context parent to keep the ppgtt alive as long as we are pinned. Now
that the context holds a reference to the ppgtt itself, we should no
longer need the back reference.
Signed-off-by: Chris Wilson
---
Keep the intel_context as being the primary state for i915_request, with
the GEM context a backpointer from the low level state for the rarer
cases we need client information. Our goal is to remove such references
to clients from the backend, and leave the HW submission agnostic to
client
Split up plane_state->base to uapi. This is done using the following patch,
ran after the previous commit that splits out any hw references:
@@
struct intel_plane_state *T;
identifier x;
@@
-T->base.x
+T->uapi.x
@@
struct intel_plane_state *T;
@@
-T->base
+T->uapi
Signed-off-by: Maarten
Split up crtc_state->base to hw where appropriate. This is done using the
following patch:
@@
struct intel_crtc_state *T;
identifier x =~
"^(active|enable|degamma_lut|gamma_lut|ctm|mode|adjusted_mode)$";
@@
-T->base.x
+T->hw.x
@@
struct drm_crtc_state *T;
identifier x =~
We are still looking at drm_crtc_state in a few places, convert those
to use intel_crtc_state instead.
Changes since v1:
- Move to before uapi/hw split.
- Add hunks for intel_pm.c as well.
Changes since v2:
- Incorporate Ville's feedback.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
intel_get_load_detect_pipe() needs to set uapi active,
uapi enable is set by the call to drm_atomic_set_mode_for_crtc(),
so we can remove it.
intel_pipe_config_compare() needs to look at hw state, but I didn't
change spatch to look at it. It's easy enough to do manually.
intel_atomic_check()
Now that we split plane_state which I didn't want to do yet, we can
program the slave plane without requiring the master plane.
This is useful for programming bigjoiner slave planes as well. We
will no longer need the master's plane_state.
Changes since v1:
- set src/dst rectangles after
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