== Series Details ==
Series: DP AUX updates (rev2)
URL : https://patchwork.freedesktop.org/series/68590/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14997
Summary
---
**FAILURE**
Serious
== Series Details ==
Series: drm/i914/guc: Fix resume on platforms w/o GuC submission but enabled
URL : https://patchwork.freedesktop.org/series/68526/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7175_full -> Patchwork_14971_full
== Series Details ==
Series: DP AUX updates (rev2)
URL : https://patchwork.freedesktop.org/series/68590/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1fb885c67a37 drm/i915/tgl: Handle AUX interrupts for TC ports
81a9ba208d76 drm/i915: Drop unused AUX register offsets
-:48:
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be used by the driver code.
v2: Apparently GVT was directly
== Series Details ==
Series: drm/i915/selftests: Mock the engine sorting for easy validation
URL : https://patchwork.freedesktop.org/series/68521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7175_full -> Patchwork_14970_full
On Fri, Oct 25, 2019 at 02:59:42PM +0100, Chris Wilson wrote:
> Avoid angering clang and smatch by using a constant value in a '&&' test,
> by forcing that constant value into a boolean.
>
> E.g.,
> drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c:159:13: warning: use of
> logical '&&' with
== Series Details ==
Series: series starting with [1/3] drm/i915: Use _PICK() for CHICKEN_TRANS()
URL : https://patchwork.freedesktop.org/series/68517/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7174_full -> Patchwork_14967_full
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: define GuC and HuC binaries for
TGL
URL : https://patchwork.freedesktop.org/series/68595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14996
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: define GuC and HuC binaries for
TGL
URL : https://patchwork.freedesktop.org/series/68595/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9463715f8da8 drm/i915/uc: define GuC and HuC binaries for TGL
== Series Details ==
Series: series starting with [1/5] drm/i915: Add two spaces before the SKL_DFSM
registers
URL : https://patchwork.freedesktop.org/series/68594/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14995
== Series Details ==
Series: drm/i915/gem: Make context persistence optional
URL : https://patchwork.freedesktop.org/series/68515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7174_full -> Patchwork_14966_full
Summary
== Series Details ==
Series: drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image
URL : https://patchwork.freedesktop.org/series/68591/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14994
== Series Details ==
Series: drm/i915/gem: Limit the blitter sizes to ensure low preemption latency
URL : https://patchwork.freedesktop.org/series/68584/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14992
== Series Details ==
Series: DP AUX updates
URL : https://patchwork.freedesktop.org/series/68590/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M]
From: Anusha Srivatsa
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 56058978bb27..99d5ed597495 100644
---
GuC 35.2.0 and HuC 7.0.3 are the first production releases for TGL.
GuC 35.2 for gen12 is interface-compatible with 33.0 on older gens,
because the differences are related to additional blocks/commands in
the interface to support new Gen12 features. These parts of the
interface will be added when
DSC could be fused off, so not all GEN10+ platforms will support it.
Cc: Manasi Navare
Cc: Martin Peres
Reviewed-by: Ramalingam C
Reviewed-by: Manasi Navare
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
drivers/gpu/drm/i915/i915_pci.c |
Check if DMC is fused off and handle it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
2 files changed, 4 insertions(+)
diff --git
The next patches are going to touch this registers so here already
fixing it for older registers and make it consistent with most of
the other registers in this file.
Cc: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 18 +-
1 file
HDCP could be fused off, so not all GEN9+ platforms will support it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Reviewed-by: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c |
Check if FBC is fused off and handle it.
Cc: Ville Syrjälä
Cc: Martin Peres
Reviewed-by: Ramalingam C
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
2 files changed, 4 insertions(+)
diff --git
The following changes since commit 340e06eb4b57da0cbceb25faf7b526263b3e3dfa:
linux-firmware: Add firmware file for Intel Bluetooth AX201 (2019-10-25
08:26:16 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware ehl_tgl_uc
for you to fetch changes
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7191 -> Patchwork_14991
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/perf:
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/perf: Add helper macros for
comparing with whitelisted registers
URL : https://patchwork.freedesktop.org/series/68582/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d9a93528ebbd drm/i915/perf: Add helper
== Series Details ==
Series: drm/i915/selftests/blt: add some kthreads into the mix (rev2)
URL : https://patchwork.freedesktop.org/series/68563/
State : failure
== Summary ==
Applying: drm/i915/selftests/blt: add some kthreads into the mix
Using index info to reconstruct a base tree...
M
On Fri, Oct 25, 2019 at 04:25:47PM -0700, Matt Roper wrote:
On Fri, Oct 25, 2019 at 04:19:33PM -0700, Lucas De Marchi wrote:
On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
> We're seeing some failures where an aux transaction still shows as
> 'busy' well after the timeout limit
The location of RING_MI_MODE (used to stop the ring across resets) moved
for Tigerlake. Fixup the new location and include a selftest to verify
the location in the default context image.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 18 +--
On Fri, Oct 25, 2019 at 04:06:23PM -0700, Matt Roper wrote:
Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce. From the logs it appears that
it's a good idea to
On Fri, Oct 25, 2019 at 04:19:33PM -0700, Lucas De Marchi wrote:
> On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
> > We're seeing some failures where an aux transaction still shows as
> > 'busy' well after the timeout limit that the hardware is supposed to
> > enforce. Improve the
On Fri, Oct 25, 2019 at 04:06:22PM -0700, Matt Roper wrote:
We're seeing some failures where an aux transaction still shows as
'busy' well after the timeout limit that the hardware is supposed to
enforce. Improve the error message so that we can see exactly which aux
channel this error happened
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm
(rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173_full -> Patchwork_14965_full
On Fri, Oct 25, 2019 at 04:06:21PM -0700, Matt Roper wrote:
TGL's extra ports also bring extra AUX channels.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bios.c | 6
drivers/gpu/drm/i915/display/intel_display.c | 36 +--
On Fri, Oct 25, 2019 at 04:06:19PM -0700, Matt Roper wrote:
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
v2: Drop stale comment
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas
On Fri, Oct 25, 2019 at 04:06:20PM -0700, Matt Roper wrote:
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be
We're seeing some failures where an aux transaction still shows as
'busy' well after the timeout limit that the hardware is supposed to
enforce. Improve the error message so that we can see exactly which aux
channel this error happened on and what the status bits were during this
case that isn't
TGL's extra ports also bring extra AUX channels.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bios.c | 6
drivers/gpu/drm/i915/display/intel_display.c | 36 +--
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
We reference DP AUX registers via the DP_AUX_CH_CTL() and
DP_AUX_CH_DATA() macros that calculate all the register offsets for us
automatically; there's no need to explicitly define every offset in
i915_reg.h if they're never going to be used by the driver code.
Signed-off-by: Matt Roper
---
The first patch here has already been submitted and reviewed, but is
still waiting on CI results to be merged. The hope is that the final
patch in this series will solve the TGL forever-busy AUX transactions
described in https://bugs.freedesktop.org/show_bug.cgi?id=105128.
Cc: José Roberto de
Our TGL CI platforms are running into cases where aux transactions have
failed to complete or declare a timeout well after the timeout limit
that the hardware is supposed to enforce. From the logs it appears that
these failures arise when aux transactions happen after we've entered
DC6. On TGL
We're currently only processing AUX interrupts on the combo ports; make
sure we handle the TC ports as well.
v2: Drop stale comment
Fixes: f663769a5eef ("drm/i915/tgl: initialize TC and TBT ports")
Cc: José Roberto de Souza
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Reviewed-by: José
On Tue, 2019-10-22 at 08:46 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage
> swing
> URL : https://patchwork.freedesktop.org/series/68349/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from
On Mon, Oct 21, 2019 at 03:34:08PM -0700, Jose Souza wrote:
This sequence was recently added to fix internal HW sequences to
reset TC ports.
HSDES: 1507287614
HSDES: 14010071447
BSpec: 49292
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
Reviewed-by: Lucas De Marchi
Lucas De
== Series Details ==
Series: drm/i915: Allow gen11 to use over 32k long strides (rev2)
URL : https://patchwork.freedesktop.org/series/67077/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7173_full -> Patchwork_14964_full
On Thu, Oct 24, 2019 at 03:06:37PM +, Harry Wentland wrote:
> On 2019-10-23 8:00 p.m., Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info as part fo
From: Lionel Landwerlin
The design of the OA unit has been split into several units. We now
have a global unit (OAG) and a render specific unit (OAR). This leads
to some changes on how we program things. Some details :
OAR:
- has its own set of counter registers, they are per-context
On Fri, Oct 25, 2019 at 09:23:47PM +0200, Hans de Goede wrote:
> Hi,
>
> On 21-10-2019 16:39, Ville Syrjälä wrote:
> > On Sun, Oct 20, 2019 at 08:19:33PM +0200, Hans de Goede wrote:
> >> Since commit 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after
> >> vblank waits"), I am seeing an
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14988
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: support creating LMEM objects
Okay!
Quoting Jason Ekstrand (2019-10-25 19:22:04)
> On Thu, Oct 24, 2019 at 6:40 AM Chris Wilson wrote:
>
> Our existing behaviour is to allow contexts and their GPU requests to
> persist past the point of closure until the requests are complete. This
> allows clients to operate in a
^ 2 typos on the subject...
On Sat, Oct 26, 2019 at 04:25:54AM +0800, Lee Shawn C wrote:
> U series device need different DDI buffer setup for eDP
> and DP. If driver did not recognize ULT id proerply.
> The setting for H and S series would be used.
>
> v2 : add missing comma in
Add helper macros for range and equality comparisons and use them to
check with whitelisted registers in oa configurations.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 54 +---
1 file changed, 28
== Series Details ==
Series: drm/i915/pmu: Initialise the spinlock before registering
URL : https://patchwork.freedesktop.org/series/68576/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7188 -> Patchwork_14989
Summary
Check the actual frequency, and not just the current requested, before
delaying the system stable.
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
tests/i915/i915_pm_rps.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/i915/i915_pm_rps.c
Currently we insert a arbitration point every 128MiB during a blitter
copy. At 8GiB/s, this is around 30ms. This is a little on the large side
if we need to inject a high priority work, so reduced it down to 8MiB or
roughly 1ms.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
Ok, I need to do
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f5c5fa5a5f44 drm/i915: support creating LMEM objects
-:36:
== Series Details ==
Series: Per client engine busyness (all aboard the sysfs train!)
URL : https://patchwork.freedesktop.org/series/68570/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14987
Summary
== Series Details ==
Series: Per client engine busyness (all aboard the sysfs train!)
URL : https://patchwork.freedesktop.org/series/68570/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c5f5abc9d897 drm/i915: Track per-context engine busyness
2c3edc69e7b6 drm/i915: Expose list
Hi,
On 21-10-2019 16:39, Ville Syrjälä wrote:
On Sun, Oct 20, 2019 at 08:19:33PM +0200, Hans de Goede wrote:
Since commit 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after
vblank waits"), I am seeing an ugly colored flash of the first few display
lines on 2 Cherry Trail devices
== Series Details ==
Series: series starting with [1/2] drm/i915: Encapsulate kconfig constant
values inside boolean predicates
URL : https://patchwork.freedesktop.org/series/68569/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14986
On Mon, Oct 21, 2019 at 06:28:18AM +, Lin, Wayne wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Monday, October 14, 2019 10:42 PM
> > To: Lin, Wayne
> > Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH 4/4] drm/edid:
Chris Wilson writes:
> Exercise the first level of suspend, S0. This is basically the same as
> our runtime-suspend, we need to put the device to sleep but otherwise
> it is left powered up.
>
> Ideally, we would measure the energy consumption in this state.
This and the others.
Reviewed-by:
On Fri, Oct 25, 2019 at 1:36 PM Thierry Reding wrote:
>
> On Thu, Oct 24, 2019 at 01:45:16PM -0700, Rajat Jain wrote:
> > Hi,
> >
> > Thanks for your review and comments. Please see inline below.
> >
> > On Thu, Oct 24, 2019 at 4:20 AM Thierry Reding
> > wrote:
> > >
> > > On Tue, Oct 22, 2019
On Fri, Oct 25, 2019 at 12:53:52PM +0300, Stanislav Lisovskiy wrote:
> According to BSpec 53998, we should try to
> restrict qgv points, which can't provide
> enough bandwidth for desired display configuration.
>
> Currently we are just comparing against all of
> those and take minimum(worst
== Series Details ==
Series: series starting with [1/2] drm/i915: Encapsulate kconfig constant
values inside boolean predicates
URL : https://patchwork.freedesktop.org/series/68569/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
96cf8a97600c drm/i915: Encapsulate kconfig
== Series Details ==
Series: CI: Test revert some of the documentation fixes
URL : https://patchwork.freedesktop.org/series/68567/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7187 -> Patchwork_14985
Summary
---
On Thu, Oct 24, 2019 at 6:40 AM Chris Wilson
wrote:
> Our existing behaviour is to allow contexts and their GPU requests to
> persist past the point of closure until the requests are complete. This
> allows clients to operate in a 'fire-and-forget' manner where they can
> setup a rendering
== Series Details ==
Series: CI: Test revert some of the documentation fixes
URL : https://patchwork.freedesktop.org/series/68567/
State : warning
== Summary ==
$ make htmldocs 2>&1 | grep i915 | grep -v "reading sources" | grep -v "writing
output"
== Series Details ==
Series: CI: Test revert some of the documentation fixes
URL : https://patchwork.freedesktop.org/series/68567/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
919d7fcfb94e CI: Test revert some of the documentation fixes
-:24: ERROR:MISSING_SIGN_OFF: Missing
== Series Details ==
Series: Update VSC SDP / HDR Metadata SDP states on pipe updates. (rev2)
URL : https://patchwork.freedesktop.org/series/68531/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7186 -> Patchwork_14984
On Fri, 25 Oct 2019 at 17:55, Chris Wilson wrote:
>
> As the GT may be running in parallel with the module initialisation
> code, we may enter i915_pmu_gt_parked() as we are executing
> i915_pmu_register(). We have to init the spinlock before we mark
> pmu.event_init so that it is available for
Quoting Lionel Landwerlin (2019-10-25 13:29:46)
> On 25/10/2019 15:22, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2019-10-25 13:17:18)
> >> TGL introduced a feature in which we map the main surface to the
> >> auxilliary surface. If we screw up the page tables, the HW has a
> >> register
We can be more aggressive in our testing by launching a number of
kthreads, where each is submitting its own copy or fill batches on a set
of random sized objects. Also since the underlying fill and copy batches
can be pre-empted mid-batch(for particularly large objects), throw in a
random mixture
On Wed, Oct 23, 2019 at 03:44:50PM +0300, Imre Deak wrote:
> On Tue, Oct 22, 2019 at 09:56:43PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > The change to skip the PCH reference initialization during fastboot
> > did end up breaking FDI. To fix that let's try to do the PCH
== Series Details ==
Series: drm/i915: capture aux page table error register
URL : https://patchwork.freedesktop.org/series/68565/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7186 -> Patchwork_14982
Summary
---
== Series Details ==
Series: series starting with [v4] drm/i915/cml: Remove unsupport PCI ID (rev5)
URL : https://patchwork.freedesktop.org/series/68547/
State : failure
== Summary ==
Applying: drm/i915/cml: Remove unsupport PCI ID
Applying: drm/i915/cml: Separate U sereis pci id from
On Fri, Oct 25, 2019 at 09:57:48AM +0300, Jani Nikula wrote:
> On Thu, 24 Oct 2019, Jonathan Corbet wrote:
> > On Sun, 20 Oct 2019 21:17:17 +0800
> > Changbin Du wrote:
> >
> >> The 'functions' directive is not only for functions, but also works for
> >> structs/unions. So the name is
On Sat, Oct 26, 2019 at 04:32:25AM +0800, Lee Shawn C wrote:
> commit 'a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS)'
> introduced new PCI ID that CML support. But some sku
> is not support yet so remove them.
A better description would be that some PCI IDs were removed from the
CML IDs in BSpec.
== Series Details ==
Series: drm/i915: capture aux page table error register
URL : https://patchwork.freedesktop.org/series/68565/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
71955d0b2b64 drm/i915: capture aux page table error register
-:7: WARNING:TYPO_SPELLING:
On 10/24/19 12:51 PM, Lucas De Marchi wrote:
On dgfx there's no LLC and eDRAM control table. Since now this
also means the device has global MOCS, just return early on the
initialization function.
L3 settings still apply and still need to be tweaked.
Bspec: 45101
Cc: Daniele Ceraolo Spurio
As the GT may be running in parallel with the module initialisation
code, we may enter i915_pmu_gt_parked() as we are executing
i915_pmu_register(). We have to init the spinlock before we mark
pmu.event_init so that it is available for use by i915_pmu_gt_parked()
(which may run as soon as
== Series Details ==
Series: drm/i915/selftests/blt: add some kthreads into the mix
URL : https://patchwork.freedesktop.org/series/68563/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7186 -> Patchwork_14981
Summary
Provide the iterator name as an explicit macro parameter so that it is
known to the caller, and allows for them to properly nest loops over all
engines.
Fixes:
../tests/i915/gem_exec_schedule.c: In function ‘semaphore_noskip’:
../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a
== Series Details ==
Series: drm/i915/selftests/blt: add some kthreads into the mix
URL : https://patchwork.freedesktop.org/series/68563/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f43a0146b3fc drm/i915/selftests/blt: add some kthreads into the mix
-:159: CHECK:BRACES:
On 25/10/2019 16:13, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-10-25 15:24:10)
From: Tvrtko Ursulin
Adds support for per-client engine busyness stats i915 exports in sysfs
and produces output like the below:
==
From: Matthew Auld
Simple test writing to dwords across an object, using various engines in
a randomized order, checking that our writes land from the cpu.
Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
---
.../drm/i915/selftests/intel_memory_region.c | 166 ++
1 file
From: Matthew Auld
Ditch the dubious static list of sizes to enumerate, in favour of
choosing a random size within the limits of each backing store. With
repeated CI runs this should give us a wider range of object sizes, and
in turn more page-size combinations, while using less machine time.
From: Abdiel Janulgue
Create an io-mapping to describe the CPU aperture for lmem.
Signed-off-by: Abdiel Janulgue
Cc: Matthew Auld
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_region_lmem.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff
From: Abdiel Janulgue
We can create LMEM objects, but we also need to support mapping them
into kernel space for internal use.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Signed-off-by: Steve Hampson
Cc: Joonas Lahtinen
Reviewed-by: Chris Wilson
---
From: Matthew Auld
Add LMEM objects to list of backends we test for huge-GTT-pages.
Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 123 +-
1 file changed, 122 insertions(+), 1 deletion(-)
diff --git
From: Matthew Auld
Now that for all the relevant backends we do randomised testing, we need
to make sure we still sanity check the obvious cases that might blow up,
such that introducing a temporary regression is less likely. Also
rather than do this for every backend, just limit to our two
From: Matthew Auld
We currently define LMEM, or local memory, as just another memory
region, like system memory or stolen, which we can expose to userspace
and can be mapped to the CPU via some BAR.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Reviewed-by: Chris Wilson
Provide the iterator name as an explicit macro parameter so that it is
known to the caller, and allows for them to properly nest loops over all
engines.
Fixes:
../tests/i915/gem_exec_schedule.c: In function ‘semaphore_noskip’:
../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a
On 10/17/2019 9:28 PM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
It sounds like the hardware only needs the DSB object to be in global GTT
and not in the mappable region.
Currently tested and working without any regression, waiting for
confirmation from h/w team, will update soon.
Quoting Tvrtko Ursulin (2019-10-25 15:24:10)
> From: Tvrtko Ursulin
>
> Adds support for per-client engine busyness stats i915 exports in sysfs
> and produces output like the below:
>
> ==
> intel-gpu-top - 935/ 935 MHz;
Quoting Tvrtko Ursulin (2019-10-25 15:21:31)
> + ret = i915_mutex_lock_interruptible(>drm);
> + if (ret)
> + return ret;
> +
> + if (val && !i915->clients.stats.enabled)
> + enable = true;
> + else if (!val && i915->clients.stats.enabled)
> +
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
(rev2)
URL : https://patchwork.freedesktop.org/series/68502/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7186 -> Patchwork_14980
Quoting Tvrtko Ursulin (2019-10-25 15:21:30)
> +static int busy_add(int id, void *p, void *data)
> +{
> + struct busy_ctx *bc = data;
> + struct i915_gem_context *ctx = p;
> + unsigned int engine_class = bc->engine_class;
> + struct i915_gem_engines_iter it;
> +
Quoting Tvrtko Ursulin (2019-10-25 15:21:29)
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 55f1f93c0925..c7f6684eb366 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
Quoting Tvrtko Ursulin (2019-10-25 15:21:28)
> int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> {
> + int ret = -ENOMEM;
> struct drm_i915_file_private *file_priv;
> - int ret;
>
> DRM_DEBUG("\n");
>
> file_priv =
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