On Thu, 14 Nov 2019, Matt Roper wrote:
> VBT revision 229 adds a new "Generic DTD" block 58 and deprecates the
> old LFP panel mode data in block 42. Let's start parsing this block to
> fill in the panel fixed mode on devices with a >=229 VBT.
>
> v2:
> * Update according to the recent updates:
On Thu, 14 Nov 2019, Jesse Barnes wrote:
> LGTM.
>
> Reviewed-by: Jesse Barnes
Yay!
LGTM too.
>
> On Thu, Nov 14, 2019 at 9:07 AM Matt Roper wrote:
>>
>> Newer VBT versions will add an alternate way to read panel DTD
>> information, so let's split parsing of the general panel information
>>
HI,
> -Original Message-
> From: Intel-gfx On Behalf Of Jesse
> Barnes
> Sent: perjantai 15. marraskuuta 2019 2.05
> To: Roper, Matthew D
> Cc: Nikula, Jani ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/vbt: Parse panel options
> separately from
== Series Details ==
Series: drm/i915/selftests: Exercise rc6 handling (rev4)
URL : https://patchwork.freedesktop.org/series/69454/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7342_full -> Patchwork_15259_full
Summary
== Series Details ==
Series: drm/i915/selftests: Be explicit in ERR_PTR handling
URL : https://patchwork.freedesktop.org/series/69457/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7342_full -> Patchwork_15258_full
Summary
== Series Details ==
Series: Improve error handling on DSB (rev2)
URL : https://patchwork.freedesktop.org/series/69319/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7348 -> Patchwork_15272
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Add GuC method to determine if
submission is active.
URL : https://patchwork.freedesktop.org/series/69499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7348 -> Patchwork_15271
On 2019-11-14 3:44 p.m., Chris Wilson wrote:
> An old display with no audio may not have an EDID with a CEA block, or
> it may simply be too old to support audio. This is not a driver error,
> so don't flag it as such.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112140
>
== Series Details ==
Series: drm/fbdev: Fallback to non tiled mode if all tiles not present (rev3)
URL : https://patchwork.freedesktop.org/series/68838/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7340_full -> Patchwork_15254_full
From: Don Hiatt
On some platforms (e.g. KBL) that do not support GuC submission, but
the user enabled the GuC communication (e.g for HuC authentication)
calling the GuC EXIT_S_STATE action results in lose of ability to
enter RC6. We can remove the GuC suspend/resume entirely as we do
not need to
From: Don Hiatt
Add intel_guc_submission_is_enabled() function to determine if
GuC submission is active.
v2: No need to look at engine to determine if submission is enabled.
Signed-off-by: Don Hiatt
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++
1 file changed, 6 insertions(+)
diff --git
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Wait for new requests in
intel_gt_retire_requests()
URL : https://patchwork.freedesktop.org/series/69497/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7347 -> Patchwork_15270
On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
We now only use 1 client without any plan to add more. The client is
also only holding information about the WQ and the process desc, so we
can just move those in the intel_guc structure and always use stage_id
0.
Signed-off-by: Daniele Ceraolo
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Wait for new requests in
intel_gt_retire_requests()
URL : https://patchwork.freedesktop.org/series/69497/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5de2752aebd8 drm/i915/gt: Wait for new requests in
LGTM.
Reviewed-by: Jesse Barnes
On Thu, Nov 14, 2019 at 9:07 AM Matt Roper wrote:
>
> Newer VBT versions will add an alternate way to read panel DTD
> information, so let's split parsing of the general panel information
> from the timing data in preparation.
>
> Cc: Jani Nikula
>
On 11/6/2019 14:25, Daniele Ceraolo Spurio wrote:
Instead of relying on the workqueue, the upcoming reworked GuC
submission flow will offer the host driver indipendent control over
independent
the execution status of each context submitted to GuC. As part of this,
the doorbell usage model has
On Thu, Nov 14, 2019 at 09:09:08PM +0200, Abdiel Janulgue wrote:
This is really just an alias of mmap_gtt. The 'mmap offset' nomenclature
comes from the value returned by this ioctl which is the offset into the
device fd which userpace uses with mmap(2).
mmap_gtt was our initial mmap_offset
Verify that we can execute a long chain of dependent requests from
userspace, each one slightly more important than the last.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 196 +
1 file changed, 196 insertions(+)
diff --git
Our callers fall into two categories, those passing timeout=0 who just
want to flush request retirements and those passing a timeout that need
to wait for submission completion (e.g. intel_gt_wait_for_idle()).
Currently, we only wait for a snapshot of timelines at the start of the
wait (but there
When setting up a full GGTT, we expect the next insert to fail with
-ENOSPC. Simplify the use of ERR_PTR to not confuse either the reader or
smatch.
Reported-by: Dan Carpenter
References: f40a7b7558ef ("drm/i915: Initial selftests for exercising eviction")
Signed-off-by: Chris Wilson
---
Reading from CTX_INFO upsets rc6, requiring us to detect and prevent
possible rc6 context corruption. Poke at the bear!
Signed-off-by: Chris Wilson
Cc: Imre Deak
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 4 +
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 13 ++
Inside the constructor, while cloning, we need to replace the
dst->engines. Having forgotten that dst->engines is marked as RCU
protected, we need to add the appropriate annotations to make sparse
happy.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
On 11/5/2019 14:53, Daniele Ceraolo Spurio wrote:
With the new interrupt re-partitioning in Gen11, GuC controls by itself
the interrupts it receives, so steering bits and registers have been
defeatured. Being this the case, when the GuC is in control of
submissions we won't know what to do with
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/tgl: Wa_1606679103 (rev3)
URL : https://patchwork.freedesktop.org/series/69420/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7346 -> Patchwork_15269
== Series Details ==
Series: drm/amdgpu/dm: Do not throw an error for a display with no audio
URL : https://patchwork.freedesktop.org/series/69492/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7346 -> Patchwork_15268
Disable VS Unit Clockgating.
v2: Fix VSUNIT instead of VFUNIT(Ville)
BSpec: 52857
Cc: Ville Syrjälä
Cc: Mika Kuoppala
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 5 insertions(+)
diff --git
On Thu, Nov 14, 2019 at 4:23 PM Harry Wentland wrote:
>
> On 2019-11-14 3:44 p.m., Chris Wilson wrote:
> > An old display with no audio may not have an EDID with a CEA block, or
> > it may simply be too old to support audio. This is not a driver error,
> > so don't flag it as such.
> >
> >
== Series Details ==
Series: drm/amdgpu/dm: Do not throw an error for a display with no audio
URL : https://patchwork.freedesktop.org/series/69492/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
13712c65b800 drm/amdgpu/dm: Do not throw an error for a display with no audio
-:12:
== Series Details ==
Series: series starting with [1/2] drm/i915/perf: Allow non-privileged access
when OA buffer is not sampled
URL : https://patchwork.freedesktop.org/series/69491/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7346 -> Patchwork_15267
== Series Details ==
Series: series starting with [1/2] drm/i915/perf: Allow non-privileged access
when OA buffer is not sampled
URL : https://patchwork.freedesktop.org/series/69491/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
61f9bbf85888 drm/i915/perf: Allow
== Series Details ==
Series: series starting with [1/4] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/69489/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7346 -> Patchwork_15266
An old display with no audio may not have an EDID with a CEA block, or
it may simply be too old to support audio. This is not a driver error,
so don't flag it as such.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112140
References: ae2a3495973e ("drm/amd: be quiet when no SAD block is
== Series Details ==
Series: series starting with [1/4] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/69489/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
== Series Details ==
Series: series starting with [1/4] drm/i915: Allow i915 to manage the vma
offset nodes instead of drm core
URL : https://patchwork.freedesktop.org/series/69489/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ab9390314373 drm/i915: Allow i915 to manage the
== Series Details ==
Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the
rbtree (rev3)
URL : https://patchwork.freedesktop.org/series/69399/
State : failure
== Summary ==
Applying: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the
rbtree
Using index
On Thu, Nov 14, 2019 at 11:21:14AM -0800, Umesh Nerlige Ramappa wrote:
Gen12 supports saving/restoring render counters per context. Apply OAR
configuration only for the context that is passed in to perf.
v2:
- Fix OACTXCONTROL value to only stop/resume counters.
- Remove
== Series Details ==
Series: VBT "generic DTD" block
URL : https://patchwork.freedesktop.org/series/69481/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7345 -> Patchwork_15264
Summary
---
**SUCCESS**
No
SAMPLE_OA_REPORT enables sampling of OA reports from the OA buffer.
Since reports from OA buffer had system wide visibility, collecting
samples from the OA buffer was a privileged operation on previous
platforms. Prior to TGL, it was also necessary to sample the OA buffer
to normalize reports from
Gen12 supports saving/restoring render counters per context. Apply OAR
configuration only for the context that is passed in to perf.
v2:
- Fix OACTXCONTROL value to only stop/resume counters.
- Remove gen12_update_reg_state_unlocked as power state is already
applied by the caller.
Although a virtual engine itself has no hang detection; that is on the
underlying physical engines, it does provide a unique means for clients
to try and break the system. Try and break it before they do.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/i915/gem_exec_balancer.c | 105
Fault handler to handle missing pages for shmem-backed objects.
v2: bail out of inserting PTEs when failing to insert the
fault address
v3: has struct page check
v4: Add self-test for validating CPU fault handler to ensure PTEs
are revoked when an object is unbound.
Signed-off-by: Abdiel
Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall-
back to GTT mmaps when hw doesn't support PAT
Signed-off-by: Abdiel Janulgue
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 13 +
drivers/gpu/drm/i915/i915_drv.c | 1 +
Have i915 replace the core drm_gem_mmap implementation to overcome its
limitation in having only a single mmap offset node per gem object.
This change allows us to have multiple mmap offsets per object and
enables a mmapping instance to use unique fault-handlers per user vma.
This allows i915 to
This is really just an alias of mmap_gtt. The 'mmap offset' nomenclature
comes from the value returned by this ioctl which is the offset into the
device fd which userpace uses with mmap(2).
mmap_gtt was our initial mmap_offset implementation, this extends
our CPU mmap support to allow additional
== Series Details ==
Series: VBT "generic DTD" block
URL : https://patchwork.freedesktop.org/series/69481/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e8777a419776 drm/i915/vbt: Parse panel options separately from timing data
74d6904f889c drm/i915/vbt: Handle generic DTD
Chris Wilson writes:
> We repeatedly (and more so in future) use the same looping construct
> over the mocs definition table to setup the register state. Refactor the
> loop construct into a reusable macro.
>
> add/remove: 2/1 grow/shrink: 1/2 up/down: 113/-330 (-217)
> Function
Chris Wilson writes:
> As we always run new platforms through CI, we only need the debug code
> compiled in during CI runs.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 30 ++--
> 1 file changed, 11
Chris Wilson writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
>
> Signed-off-by: Chris Wilson
On Thu, Nov 14, 2019 at 02:43:17PM +0200, Jani Nikula wrote:
On Tue, 12 Nov 2019, Lucas De Marchi wrote:
Tiger Lake supports HDMI on port A. For other platforms we ignore what the VBT
says regarding HDMI to workaround broken VBTs, see commit
2ba7d7e04371 ("drm/i915/bios: ignore HDMI on port
From: Mika Kuoppala
For testing blitter engine command parser on gen9.
v2: bad jump offset
v3: rebase
v4: improve bb start and subcase it
v5: fix presumed offsets (Jon)
v6: name, remove spurious gem_syncs (Chris)
v7: jump further backwards (Daniel), ctx_param_engines (Chris)
v8: dont mess up
On Thu, Nov 14, 2019 at 02:46:48PM +0200, Jani Nikula wrote:
On Fri, 08 Nov 2019, Lucas De Marchi wrote:
The warning should be just a warning. Where it is currently is wrong
since we already registered the connector on drm, meaning it dies later
on a NULL pointer deref if the VBT-overriding we
As we want to be able to run inside atomic context for retiring the
i915_active, and we are no longer allowed to abuse mutex_trylock, split
the tree management portion of i915_active.mutex into an irq-safe
spinlock.
References: a0855d24fc22d ("locking/mutex: Complain upon mutex API misuse in
IRQ
== Series Details ==
Series: series starting with [01/11] HAX to make DSC work on the icelake test
system
URL : https://patchwork.freedesktop.org/series/69478/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7344 -> Patchwork_15263
From: Mika Kuoppala
For testing blitter engine command parser on gen9.
v2: bad jump offset
v3: rebase
v4: improve bb start and subcase it
v5: fix presumed offsets (Jon)
v6: name, remove spurious gem_syncs (Chris)
v7: jump further backwards (Daniel), ctx_param_engines (Chris)
Cc: Chris Wilson
VBT revision 229 adds a new "Generic DTD" block 58 and deprecates the
old LFP panel mode data in block 42. Let's start parsing this block to
fill in the panel fixed mode on devices with a >=229 VBT.
v2:
* Update according to the recent updates:
- DTD size is now 16 bits instead of 24
-
VBT revision 229 introduces a new "Generic DTD" block to define monitor
timing information and deprecates the old LFP panel mode data we've been
using until now.
v4: Rebase & resend; patchwork got a bit confused by the threading when
v3 was sent and it fell through the cracks.
Matt Roper
Newer VBT versions will add an alternate way to read panel DTD
information, so let's split parsing of the general panel information
from the timing data in preparation.
Cc: Jani Nikula
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_bios.c | 27 +++
1 file
== Series Details ==
Series: series starting with [01/11] HAX to make DSC work on the icelake test
system
URL : https://patchwork.freedesktop.org/series/69478/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: HAX to make DSC work on the icelake test
== Series Details ==
Series: drm/i915: Restore GT coarse power gating workaround
URL : https://patchwork.freedesktop.org/series/69477/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7344 -> Patchwork_15262
Summary
---
== Series Details ==
Series: series starting with [01/11] HAX to make DSC work on the icelake test
system
URL : https://patchwork.freedesktop.org/series/69478/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e129b15e0bb7 HAX to make DSC work on the icelake test system
On 13/11/2019 18:53, Chris Wilson wrote:
As we want to be able to run inside atomic context for retiring the
i915_active, and we are no longer allowed to abuse mutex_trylock, split
the tree management portion of i915_active.mutex into an irq-safe
spinlock.
References: a0855d24fc22d
== Series Details ==
Series: drm/i915: Restore GT coarse power gating workaround
URL : https://patchwork.freedesktop.org/series/69477/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e171f47fbdb3 drm/i915: Restore GT coarse power gating workaround
-:29: CHECK:CAMELCASE: Avoid
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough to bring up CRTC's in a
Unfortunately I have no way to test this, but it should be correct
if the bios sets up bigjoiner in a sane way.
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the bigjoiner slave to userspace,
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 47 +-
.../drm/i915/display/intel_display_types.h| 11 ++-
drivers/gpu/drm/i915/intel_pm.c | 94 +--
3 files changed, 81 insertions(+), 71 deletions(-)
diff --git
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
Signed-off-by: Maarten Lankhorst
---
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied from the master's
crtc_state, so
DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_dp_helper.c | 4 ++--
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git
The members in hw.mode can be used from adjusted_mode as well,
use that when available.
Some places that use hw.mode can be converted to use adjusted_mode
as well.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 49 ++-
Enabling is done in a special sequence and so should plane updates
be. Ideally the end user never notices the second pipe is used,
so use the vblank evasion to cover both pipes.
This way ideally everything will be tear free, and updates are
really atomic as userspace expects it.
Signed-off-by:
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
Changes since v1:
- Disallow bigjoiner on eDP.
Changes since
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats, we may end up adding a lot of
It's useful to know what the actual clipped state is, rather than
the unclipped crtc properties.
This is useful when a plane is spread across 2 crtc's, where the
slave crtc has no own plane properties but derives its clipped
values from the master crtc.
Changes since v1:
- Report planar slaves
On Thu, Nov 14, 2019 at 03:43:07PM +, Chris Wilson wrote:
> Quoting Imre Deak (2019-11-14 15:26:21)
> > The workaround to disable coarse power gating is still needed on SKL
> > GT3/GT4 machines and since the RC6 context corruption was discovered by
> > the hardware team also on all GEN9
Quoting Imre Deak (2019-11-14 15:26:21)
> The workaround to disable coarse power gating is still needed on SKL
> GT3/GT4 machines and since the RC6 context corruption was discovered by
> the hardware team also on all GEN9 machines. Restore applying the
> workaround.
>
> Fixes: c113236718e8
== Series Details ==
Series: drm/i915/perf: Add preemption check while waiting for OA
URL : https://patchwork.freedesktop.org/series/69472/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7344 -> Patchwork_15261
Summary
The workaround to disable coarse power gating is still needed on SKL
GT3/GT4 machines and since the RC6 context corruption was discovered by
the hardware team also on all GEN9 machines. Restore applying the
workaround.
Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
tree: git://anongit.freedesktop.org/drm-intel for-linux-next
head: 789c4aea3f08026360d026c0ea69b33797ac88c2
commit: a70a9e998e8e64417c1213572c1dda617e355653 [5/19] drm/i915: Defer rc6
shutdown to suspend_late
config: x86_64-randconfig-d003-20191114 (attached as .config)
compiler: gcc-7
Quoting Lionel Landwerlin (2019-11-14 14:02:24)
> While we're waiting for the OA configuration to apply, let's give a
> chance to other contexts that might need to run other workloads.
>
> Signed-off-by: Lionel Landwerlin
> Suggested-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_perf.c |
On Mon, 11 Nov 2019, Jani Nikula wrote:
> Hi Sean, Maarten and Maxime -
>
> Here's the topic branch about DSI changes as I wrote in [1]. Once you've
> pulled this in drm-misc, I'll follow suit in i915.
Ping.
FWIW Daniel acked the approach on IRC.
BR,
Jani.
>
>
> Thanks,
> Jani.
>
> [1]
>-Original Message-
>From: Intel-gfx On Behalf Of Ville
>Syrjala
>Sent: Thursday, June 20, 2019 7:57 PM
>To: dri-de...@lists.freedesktop.org
>Cc: intel-gfx@lists.freedesktop.org; Ilia Mirkin
>Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Drop redundant aspec ratio prop
>value
> -Original Message-
> From: Daniel Vetter
> Sent: Thursday, November 14, 2019 12:13 AM
> To: Dave Airlie
> Cc: Jani Nikula ; Bloomfield, Jon
> ; Joonas Lahtinen
> ; Chris Wilson ;
> Stephen Rothwell ; dri-devel de...@lists.freedesktop.org>; Intel Graphics Development
>-Original Message-
>From: dri-devel On Behalf Of Ville
>Syrjala
>Sent: Thursday, June 20, 2019 7:57 PM
>To: dri-de...@lists.freedesktop.org
>Cc: intel-gfx@lists.freedesktop.org
>Subject: [PATCH 4/5] drm/i915: Do not override mode's aspect ratio with the
>prop
>value NONE
>
>From:
== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev4)
URL : https://patchwork.freedesktop.org/series/69124/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7344 -> Patchwork_15260
Summary
From: Mika Kuoppala
For testing blitter engine command parser on gen9.
v2: bad jump offset
v3: rebase
v4: improve bb start and subcase it
v5: fix presumed offsets (Jon)
v6: name, remove spurious gem_syncs (Chris)
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
tests/Makefile.sources
While we're waiting for the OA configuration to apply, let's give a
chance to other contexts that might need to run other workloads.
Signed-off-by: Lionel Landwerlin
Suggested-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev4)
URL : https://patchwork.freedesktop.org/series/69124/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Enable second dbuf slice for ICL and TGL
== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev4)
URL : https://patchwork.freedesktop.org/series/69124/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
dc5cb9d402db drm/i915: Enable second dbuf slice for ICL and TGL
-:48:
On Fri, 08 Nov 2019, Lucas De Marchi wrote:
> The warning should be just a warning. Where it is currently is wrong
> since we already registered the connector on drm, meaning it dies later
> on a NULL pointer deref if the VBT-overriding we have is removed. Move
> the warning up.
>
>
On Tue, 12 Nov 2019, Lucas De Marchi wrote:
> Tiger Lake supports HDMI on port A. For other platforms we ignore what the VBT
> says regarding HDMI to workaround broken VBTs, see commit
> 2ba7d7e04371 ("drm/i915/bios: ignore HDMI on port A"). Make this apply
> gen12+ so they inherit the TGL
I broke fb_mmap() proving that we need a test in CI!
References: https://bugs.freedesktop.org/show_bug.cgi?id=112256
Signed-off-by: Chris Wilson
Reviewed-by: Ville Syrjälä
---
tests/Makefile.sources| 1 +
tests/fbdev.c | 81 +++
On Tue, 12 Nov 2019, Sean Paul wrote:
> On Mon, Oct 28, 2019 at 12:38:14PM +0200, Jani Nikula wrote:
>> Resend of [1]; I may have rebased but I'm not sure anymore...
>>
>> For starters some fairly benign cleanup, and a proposal for new struct
>> drm_device based drm logging macros analoguous to
Also implemented algorithm for choosing DBuf slice configuration
based on active pipes, pipe ratio as stated in BSpec 12716.
Now pipe allocation still stays proportional to pipe width as before,
however within allowed DBuf slice for this particular configuration.
v2: Remove unneeded check from
Quoting Ville Syrjälä (2019-11-14 12:18:01)
> On Wed, Nov 13, 2019 at 07:28:54PM +, Chris Wilson wrote:
> > I broke fb_mmap() proving that we need a test in CI!
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=112256
> > Signed-off-by: Chris Wilson
> > ---
> >
On Wed, Nov 13, 2019 at 07:28:54PM +, Chris Wilson wrote:
> I broke fb_mmap() proving that we need a test in CI!
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=112256
> Signed-off-by: Chris Wilson
> ---
> tests/Makefile.sources| 1 +
> tests/fbdev.c
On Wed, Nov 13, 2019 at 06:06:33PM +, Chris Wilson wrote:
> fbdev uses the physical address of our framebuffer for its fb_mmap()
> routine. While we need to adapt this address for the new io BAR, we have
> to fix v5.4 first! The simplest fix is to restore the smem back to v5.4
> and we will
On 11/11/2019 15:42, Daniel Vetter wrote:
> On Mon, Nov 11, 2019 at 2:11 PM Steven Price wrote:
>>
>> On 04/11/2019 17:37, Daniel Vetter wrote:
>>> Full audit of everyone:
>>>
>>> - i915, radeon, amdgpu should be clean per their maintainers.
>>>
>>> - vram helpers should be fine, they don't do
Quoting Ville Syrjälä (2019-11-14 10:53:11)
> On Wed, Nov 13, 2019 at 05:19:44PM +, Chris Wilson wrote:
> > Do not leak our internal kernel address for random userspace to abuse.
> > Daniel added the support to fbdev to filter out the physical addresses
> > being exposed by fbdev, put that to
On Wed, Nov 13, 2019 at 05:19:44PM +, Chris Wilson wrote:
> Do not leak our internal kernel address for random userspace to abuse.
> Daniel added the support to fbdev to filter out the physical addresses
> being exposed by fbdev, put that to use to protect ourselves.
>
> Bugzilla:
On Skylake+, the use of the mask for the compare address is predicated
by an instruction flag. On Broadwell, it seems that some engines use the
mask and some do not.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112270
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
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