[Intel-gfx] [PULL] drm-intel-fixes

2020-01-16 Thread Joonas Lahtinen
Hi Dave & Daniel, Two new fixes still, the VMA activity fixes are overflow from last week as I couldn't get CI results then. One important uAPI fix for PMU names to comply with tools/perf, thanks for our media team for noticing. A compile fix and two VMA activity tracking fixes for error capture

[Intel-gfx] [PATCH 1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-01-16 Thread Mika Kuoppala
This patch adds framework to submit an arbitrary batchbuffer on each context switch to clear residual state for render engine on Gen7/7.5 devices. The idea of always emitting the context and vm setup around each request is primary to make reset recovery easy, and not require rewriting the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Align engine->uabi_class/instance with i915_drm.h (rev2)

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915: Align engine->uabi_class/instance with i915_drm.h (rev2) URL : https://patchwork.freedesktop.org/series/72078/ State : success == Summary == CI Bug Log - changes from CI_DRM_7754 -> Patchwork_16130

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Align engine->uabi_class/instance with i915_drm.h (rev2)

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915: Align engine->uabi_class/instance with i915_drm.h (rev2) URL : https://patchwork.freedesktop.org/series/72078/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK include/generated/compile.h

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Drop rogue space in the middle of GT_TRACE

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Drop rogue space in the middle of GT_TRACE URL : https://patchwork.freedesktop.org/series/72108/ State : success == Summary == CI Bug Log - changes from CI_DRM_7754 -> Patchwork_16129 Summary

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/gt: Drop rogue space in the middle of GT_TRACE

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Drop rogue space in the middle of GT_TRACE URL : https://patchwork.freedesktop.org/series/72108/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK include/generated/compile.h Kernel:

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread David Laight
From: David Laight > Sent: 16 January 2020 14:41 > > I'll do some measurements later this afternoon. > > This is an Ivy bridge cpu, so clflush (not clflushopt). > With a cond_resched for every page I get: > (Note these calls are every 10 seconds) For comparison some times booted with the

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread David Laight
> I'll do some measurements later this afternoon. This is an Ivy bridge cpu, so clflush (not clflushopt). With a cond_resched for every page I get: (Note these calls are every 10 seconds) # tracer: function_graph # # CPU DURATION FUNCTION CALLS # | | |

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/pmu: Correct the rc6 offset upon enabling

2020-01-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/pmu: Correct the rc6 offset upon enabling URL : https://patchwork.freedesktop.org/series/72001/ State : success == Summary == CI Bug Log - changes from CI_DRM_7737_full -> Patchwork_16090_full

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread Chris Wilson
Quoting David Laight (2020-01-16 13:58:44) > From: Chris Wilson > > Sent: 16 January 2020 12:29 > > > > Quoting David Laight (2020-01-16 12:26:45) > > > However there is a call from __i915_gem_objet_set_pages() that > > > is preceded by a lockdep_assert_held() check - so mustn't sleep. > > > >

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread David Laight
From: Chris Wilson > Sent: 16 January 2020 12:29 > > Quoting David Laight (2020-01-16 12:26:45) > > However there is a call from __i915_gem_objet_set_pages() that > > is preceded by a lockdep_assert_held() check - so mustn't sleep. > > That is a mutex; it's allowed to sleep. The might_sleep()

[Intel-gfx] [PATCH 1/4] drm/i915/display: conversion to new logging macros part 1

2020-01-16 Thread Wambui Karuga
This is the first patch that starts the conversion of the printk based logging macros in drm/i915/display/intel_display.c to the new struct drm_device based logging macros. This conversion was done using the following coccinelle script that matches based on the existence of a struct

[Intel-gfx] [PATCH 3/4] drm/i915/display: conversion to new logging macros part 3

2020-01-16 Thread Wambui Karuga
This patch continues the conversion of printk based logging macros to the new struct drm_based logging macros in drm/i915/display/intel_display.c. This conversion was done using the following coccinelle script that matches the existence of a straightforward struct drm_i915_private in the

[Intel-gfx] [PATCH 2/4] drm/i915/display: conversion to new logging macros part 2

2020-01-16 Thread Wambui Karuga
This patch continues the conversion of printk based logging macros to the new struct drm_based logging macros in drm/i915/display/intel_display.c. This conversion was done using the following coccinelle script that matches the existence of a straightforward struct drm_i915_private in the

[Intel-gfx] [PATCH 0/4] drm/i915/display: conversion to new logging macros.

2020-01-16 Thread Wambui Karuga
This series converts the printk based logging macros in drm/i915/display/intel_display.c to the new struct drm_device based logging macros. This change was split into four for manageability and due to the size of drm/i915/display/intel_display.c. Wambui Karuga (4): drm/i915/display: conversion

[Intel-gfx] [PATCH 4/4] drm/i915/display: convert to new logging macros part 4.

2020-01-16 Thread Wambui Karuga
This patch provides the final conversion of most of the printk based logging macros instances in drm/i915/display/intel_display.c to the struct drm_device based logging macros. The struct drm_i915_private device is extracted from various intel types and used in the new logging macros.

[Intel-gfx] [PATCH v2] drm/i915: Align engine->uabi_class/instance with i915_drm.h

2020-01-16 Thread Tvrtko Ursulin
From: Tvrtko Ursulin In our ABI we have defined I915_ENGINE_CLASS_INVALID_NONE and I915_ENGINE_CLASS_INVALID_VIRTUAL as negative values which creates implicit coupling with type widths used in, also ABI, struct i915_engine_class_instance. One place where we export engine->uabi_class

Re: [Intel-gfx] [PATCH] drm/i915/gt: Drop rogue space in the middle of GT_TRACE

2020-01-16 Thread Mika Kuoppala
Chris Wilson writes: > Remove the double space that crept into the fmt stringification. Looking at the converted GEM_TRACEs, this seems to be the case. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gt/intel_gt.h | 2 +- > 1 file changed, 1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Set num_qgv_points to zero if we can't query the actual points

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915: Set num_qgv_points to zero if we can't query the actual points URL : https://patchwork.freedesktop.org/series/72107/ State : success == Summary == CI Bug Log - changes from CI_DRM_7753 -> Patchwork_16128

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: Set num_qgv_points to zero if we can't query the actual points

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915: Set num_qgv_points to zero if we can't query the actual points URL : https://patchwork.freedesktop.org/series/72107/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK

[Intel-gfx] [PATCH] drm/i915/gt: Drop rogue space in the middle of GT_TRACE

2020-01-16 Thread Chris Wilson
Remove the double space that crept into the fmt stringification. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h index

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Leave resetting ring to intel_ring

2020-01-16 Thread Mika Kuoppala
Chris Wilson writes: > We need to allow concurrent intel_context_unpin, which means avoiding > doing destructive operations like intel_ring_reset(). This was already > fixed for intel_ring_unpin() in commit 0725d9a31869 ("drm/i915/gt: Make > intel_ring_unpin() safe for concurrent pint"), but I

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread David Laight
From: Chris Wilson > Sent: 16 January 2020 07:40 > Quoting Daniel Vetter (2020-01-16 06:52:42) > > On Wed, Jan 15, 2020 at 08:52:45PM +, Chris Wilson wrote: > > > Since we may try and flush the cachelines associated with large buffers > > > (an 8K framebuffer is about 128MiB, even before we

Re: [Intel-gfx] [PATCH] drm: Inject a cond_resched() into long drm_clflush_sg()

2020-01-16 Thread Chris Wilson
Quoting David Laight (2020-01-16 12:26:45) > However there is a call from __i915_gem_objet_set_pages() that > is preceded by a lockdep_assert_held() check - so mustn't sleep. That is a mutex; it's allowed to sleep. The might_sleep() here should help assuage your fears. -Chris

Re: [Intel-gfx] [PATCH i-g-t 2/2] tests/prime_vgem: Examine blitter access path

2020-01-16 Thread Janusz Krzysztofik
Hi, Answering to myself, sorry. On Wednesday, January 15, 2020 12:04:51 PM CET Janusz Krzysztofik wrote: > Hi Chris, > > Thanks for your review. > > On Thursday, January 9, 2020 4:03:30 PM CET Chris Wilson wrote: > > Quoting Janusz Krzysztofik (2020-01-09 14:01:25) > > > On future hardware

[Intel-gfx] ✗ Fi.CI.BUILD: warning for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

2020-01-16 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2) URL : https://patchwork.freedesktop.org/series/71775/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

2020-01-16 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2) URL : https://patchwork.freedesktop.org/series/71775/ State : success == Summary == CI Bug Log - changes from CI_DRM_7753 -> Patchwork_16127

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/13] drm/i915: Flush idle barriers when waiting

2020-01-16 Thread Patchwork
== Series Details == Series: series starting with [01/13] drm/i915: Flush idle barriers when waiting URL : https://patchwork.freedesktop.org/series/71998/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7737_full -> Patchwork_16089_full

[Intel-gfx] [PATCH] drm/i915: Set num_qgv_points to zero if we can't query the actual points

2020-01-16 Thread Ville Syrjala
From: Ville Syrjälä If the pcode fails to give us the goods on any of the QGV points just declare that we have none so that we'll properly ignore the bw limits. Cc: Clinton A Taylor Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_bw.c | 4 +++- 1 file changed, 3

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

2020-01-16 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2) URL : https://patchwork.freedesktop.org/series/71775/ State : warning == Summary == $ dim checkpatch origin/drm-tip d629200d3735 drm/i915/sdvo: Reduce the size of the on

Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Force DPCD backlight mode on X1 Extreme 2nd Gen 4K AMOLED panel

2020-01-16 Thread Jani Nikula
On Wed, 15 Jan 2020, Lyude Paul wrote: > sigh… so I just went through the correspondence with the vendor I mentioned > and unfortunately the answer is still unclear. It looks like that for some of > these panels there might actually be some bits in the EDID (!?!?) that are > supposed to

Re: [Intel-gfx] [PATCH v2 03/21] drm: Add get_vblank_timestamp() to struct drm_crtc_funcs

2020-01-16 Thread Ville Syrjälä
On Thu, Jan 16, 2020 at 09:44:55AM +0100, Thomas Zimmermann wrote: > Hi > > Am 15.01.20 um 15:49 schrieb Ville Syrjälä: > > On Wed, Jan 15, 2020 at 01:16:34PM +0100, Thomas Zimmermann wrote: > >> @@ -2020,3 +2042,193 @@ int drm_crtc_queue_sequence_ioctl(struct > >> drm_device *dev, void *data,

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync

2020-01-16 Thread Ville Syrjälä
On Thu, Jan 16, 2020 at 12:05:43AM +, Souza, Jose wrote: > On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > The post-fastset "does anyone still need a full modeset?" for > > port sync looks busted. The outer loop bails out of a full modeset > > is still

[Intel-gfx] ✗ Fi.CI.BUILD: warning for Enable second DBuf slice for ICL and TGL (rev16)

2020-01-16 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev16) URL : https://patchwork.freedesktop.org/series/70059/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK include/generated/compile.h Kernel:

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev16)

2020-01-16 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev16) URL : https://patchwork.freedesktop.org/series/70059/ State : success == Summary == CI Bug Log - changes from CI_DRM_7753 -> Patchwork_16126 Summary ---

Re: [Intel-gfx] [RESEND PATCH i-g-t] tests/prime_vgem: Give meaningful messages on SKIP

2020-01-16 Thread Petri Latvala
On Thu, Jan 16, 2020 at 11:13:26AM +0100, Janusz Krzysztofik wrote: > Messages displayed on SKIPs introduced by commit 92caadb4e551 > ("tests/prime_vgem: Skip basic-read/write subtests if not supported") > don't inform clearly enough that those SKIPs are expected behavior. > Fix it. > >

[Intel-gfx] [RESEND PATCH i-g-t] tests/prime_vgem: Give meaningful messages on SKIP

2020-01-16 Thread Janusz Krzysztofik
Messages displayed on SKIPs introduced by commit 92caadb4e551 ("tests/prime_vgem: Skip basic-read/write subtests if not supported") don't inform clearly enough that those SKIPs are expected behavior. Fix it. Signed-off-by: Janusz Krzysztofik Reviewed-by: Ewelina Musial --- Assuming the R-b:

[Intel-gfx] [PATCH v12 2/5] drm/i915: Move dbuf slice update to proper place

2020-01-16 Thread Stanislav Lisovskiy
Current DBuf slices update wasn't done in proper place, especially its "post" part, which should disable those only once vblank had passed and all other changes are committed. v2: Fix to use dev_priv and intel_atomic_state instead of skl_ddb_values (to be nuked in Villes patch) v3:

[Intel-gfx] [PATCH v12 4/5] drm/i915: Introduce parameterized DBUF_CTL

2020-01-16 Thread Stanislav Lisovskiy
Now start using parameterized DBUF_CTL instead of hardcoded, this would allow shorter access functions when reading or storing entire state. Tried to implement it in a MMIO_PIPE manner, however DBUF_CTL1 address is higher than DBUF_CTL2, which implies that we have to now subtract from base rather

[Intel-gfx] [PATCH v12 0/5] Enable second DBuf slice for ICL and TGL

2020-01-16 Thread Stanislav Lisovskiy
Those patch series, do some initial preparation DBuf manipulating code cleanups, i.e remove redundant structures/code, switch to mask based DBuf manupulation, get into use DBuf assignment according to BSpec rules. Stanislav Lisovskiy (5): drm/i915: Remove skl_ddl_allocation struct drm/i915:

[Intel-gfx] [PATCH v12 3/5] drm/i915: Manipulate DBuf slices properly

2020-01-16 Thread Stanislav Lisovskiy
Start manipulating DBuf slices as a mask, but not as a total number, as current approach doesn't give us full control on all combinations of slices, which we might need(like enabling S2 only can't enabled by setting enabled_slices=1). Removed wrong code from intel_get_ddb_size as it doesn't match

[Intel-gfx] [PATCH v12 5/5] drm/i915: Correctly map DBUF slices to pipes

2020-01-16 Thread Stanislav Lisovskiy
Added proper DBuf slice mapping to correspondent pipes, depending on pipe configuration as stated in BSpec. v2: - Remove unneeded braces - Stop using macro for DBuf assignments as it seems to reduce readability. v3: Start using enabled slices mask in dev_priv v4: Renamed

[Intel-gfx] [PATCH v12 1/5] drm/i915: Remove skl_ddl_allocation struct

2020-01-16 Thread Stanislav Lisovskiy
Current consensus that it is redundant as we already have skl_ddb_values struct out there, also this struct contains only single member which makes it unnecessary. v2: As dirty_pipes soon going to be nuked away from skl_ddb_values, evacuating enabled_slices to safer in dev_priv. v3:

Re: [Intel-gfx] [PATCH v2 03/21] drm: Add get_vblank_timestamp() to struct drm_crtc_funcs

2020-01-16 Thread Thomas Zimmermann
Hi Am 15.01.20 um 15:49 schrieb Ville Syrjälä: > On Wed, Jan 15, 2020 at 01:16:34PM +0100, Thomas Zimmermann wrote: >> The callback get_vblank_timestamp() is currently located in struct >> drm_driver, but really belongs into struct drm_crtc_funcs. Add an >> equivalent there. Driver will be

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl. Add Wa_1409085225

2020-01-16 Thread Patchwork
== Series Details == Series: drm/i915/tgl. Add Wa_1409085225 URL : https://patchwork.freedesktop.org/series/71986/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7737_full -> Patchwork_16088_full Summary ---

Re: [Intel-gfx] [PATCH v2 02/21] drm: Evaluate struct drm_device.vblank_disable_immediate on each use

2020-01-16 Thread Thomas Zimmermann
Hi Am 15.01.20 um 15:37 schrieb Ville Syrjälä: > On Wed, Jan 15, 2020 at 01:16:33PM +0100, Thomas Zimmermann wrote: >> VBLANK interrupts can be disabled immediately or with a delay, where the >> latter is the default. The former option can be selected by setting >> get_vblank_timestamp, and

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