On Mon, Mar 09, 2020 at 10:45:47PM +, Chris Wilson wrote:
Quoting Umesh Nerlige Ramappa (2020-03-09 21:10:57)
On running several back to back perf capture sessions involving closing
and opening the perf stream, invalid OA reports are seen in the
beginning of the OA buffer in some sessions.
== Series Details ==
Series: Gen11 workarounds
URL : https://patchwork.freedesktop.org/series/74475/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a627f7908723 drm/i915: Handle all MCR ranges
0d45ae1b23d2 drm/i915: Add Wa_1207131216:icl,ehl
ac72d609fb43 drm/i915: Add
On gen11 the XY_FAST_COPY_BLT command has some size restrictions on its
usage. Although this instruction is mainly used by userspace, i915 also
uses it to copy object contents during some selftests, so let's ensure
the restrictions are followed.
Bspec: 6544
Signed-off-by: Matt Roper
---
The bspec documents multiple MCR ranges; make sure they're all captured
by the driver.
Bspec: 13991, 52079
Fixes: 592a7c5e082e ("drm/i915: Extend non readable mcr range")
Cc: Mika Kuoppala
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 25 ++---
1
Note that we used to have this implemented on ICL under a different
number (Wa_1604302699), but it was removed because it vanished from the
bspec and the register update didn't seem to be sticking. However the
initial implementation of the workaround appears to have been in the
wrong place (not
The register this workaround updates is a render engine register in the
MCR range, so we should initialize this in rcs_engine_wa_init() rather
than gt_wa_init().
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1222
Fixes: 36204d80bacb ("drm/i915/icl: Wa_1406680159")
Cc: Mika Kuoppala
This workaround appears under two different numbers (and with somewhat
confused stepping applicability on ICL). Ultimately it appears we
should just implement this for all stepping of ICL and EHL.
Note that this is identical to Wa_1407928979:tgl that already exists in
our driver too...yet
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index
The bspec description for this workaround tells us to program
0x_ into both FBC_RT_BASE_ADDR_REGISTER_* registers, but we've
previously found that this leads to failures in CI. Our suspicion is
that the failures are caused by this valid turning on the "address valid
bit" even though we're
The first patch here technically impacts all gen8+ platforms, but the
rest of these are specifically for ICL and EHL.
Matt Roper (7):
drm/i915: Handle all MCR ranges
drm/i915: Add Wa_1207131216:icl,ehl
drm/i915: Add Wa_1604278689:icl,ehl
drm/i915: Add Wa_1406306137:icl,ehl
drm/i915:
Hi Jani,
I have 1 question / need 1 help about this patch:
On Mon, Mar 9, 2020 at 5:06 PM Rajat Jain wrote:
>
> Add support for an ACPI based integrated privacy screen that is
> available on some systems.
>
> Signed-off-by: Rajat Jain
> ---
> v7: * Move the privacy-screen property back into
Quoting Tvrtko Ursulin (2020-03-09 23:26:34)
>
> On 09/03/2020 21:34, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-03-09 18:31:18)
> >> +struct i915_drm_client *
> >> +i915_drm_client_add(struct i915_drm_clients *clients, struct task_struct
> >> *task)
> >> +{
> >> + struct
== Series Details ==
Series: drm: Add support for integrated privacy screen
URL : https://patchwork.freedesktop.org/series/74473/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4d85b0afcb69 intel_acpi: Rename drm_dev local variable to dev
8f19bae8d1da drm/connector: Add support
Add support for an ACPI based integrated privacy screen that is
available on some systems.
Signed-off-by: Rajat Jain
---
v7: * Move the privacy-screen property back into drm core.
* Do the actual HW EPS toggling at commit time.
* Provide a sample ACPI node for reference in comments.
v6:
Em sex, 2020-03-06 às 17:09 +0530, Karthik B S escreveu:
> Without async flip support in the kernel, fullscreen apps where game
> resolution is equal to the screen resolution, must perform an extra blit
> per frame prior to flipping.
>
> Asynchronous page flips will also boost the FPS of Mesa
On 09/03/2020 22:02, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-03-09 18:31:17)
From: Tvrtko Ursulin
Another re-spin of the per-client engine busyness series. Highlights from this
version:
* Different way of tracking runtime of exited/unreachable context. This time
round I
On 09/03/2020 21:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-03-09 18:31:18)
+struct i915_drm_client *
+i915_drm_client_add(struct i915_drm_clients *clients, struct task_struct *task)
+{
+ struct i915_drm_client *client;
+ int ret;
+
+ client =
Em sex, 2020-03-06 às 17:09 +0530, Karthik B S escreveu:
> Send the flip done event in the handler and disable the interrupt.
>
> Signed-off-by: Karthik B S
> ---
> drivers/gpu/drm/i915/i915_irq.c | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git
Em sex, 2020-03-06 às 17:09 +0530, Karthik B S escreveu:
> Support added only for async flips on primary plane.
> If flip is requested on any other plane, reject it.
>
> Signed-off-by: Karthik B S
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 29
> 1 file changed,
Em sex, 2020-03-06 às 17:09 +0530, Karthik B S escreveu:
> Enable support for async flips in I915.
> Set the Async Address Update Enable bit in plane ctl
> when async flip is requested.
>
> Signed-off-by: Karthik B S
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4
>
Em sex, 2020-03-06 às 17:09 +0530, Karthik B S escreveu:
> Add enable/disable flip done functions and enable
> the flip done interrupt in IER.
>
> Flip done interrupt is used to send the page flip event as soon as the
> surface address is written as per the requirement of async flips.
>
>
On 3/9/20 3:38 PM, Andi Shyti wrote:
Hi Daniele,
Quoting Andi Shyti (2020-03-06 23:03:44)
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
-
== Series Details ==
Series: drm/i915/execlists: Mark up the racy access to switch_priority_hint
URL : https://patchwork.freedesktop.org/series/74457/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16883_full
Hi Daniele,
> > > > > Quoting Andi Shyti (2020-03-06 23:03:44)
> > > > > > -void debugfs_gt_register_files(struct intel_gt *gt,
> > > > > > - struct dentry *root,
> > > > > > - const struct debugfs_gt_file *files,
> > > > > > -
Quoting Umesh Nerlige Ramappa (2020-03-09 21:10:57)
> On running several back to back perf capture sessions involving closing
> and opening the perf stream, invalid OA reports are seen in the
> beginning of the OA buffer in some sessions. Fix this by invalidating OA
> TLB when the perf stream is
== Series Details ==
Series: drm/i915: Mark racy read of intel_engine_cs.saturated
URL : https://patchwork.freedesktop.org/series/74455/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16882_full
On 3/7/20 2:19 PM, Andi Shyti wrote:
Hi Chris,
Quoting Andi Shyti (2020-03-06 23:03:44)
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
-
Quoting Tvrtko Ursulin (2020-03-09 18:31:17)
> From: Tvrtko Ursulin
>
> Another re-spin of the per-client engine busyness series. Highlights from this
> version:
>
> * Different way of tracking runtime of exited/unreachable context. This time
>round I accumulate those per context/client
This patch adds defines for the detailed monitor
range flags as per the EDID specification.
v2:
* Rename the flags with DRM_EDID_ (Jani N)
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Cc: Harry Wentland
Cc: Clinton A Taylor
Cc: Kazlauskas Nicholas
Cc: Jani Nikula
Signed-off-by: Manasi
Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
Quoting Tvrtko Ursulin (2020-03-09 18:31:18)
> +struct i915_drm_client *
> +i915_drm_client_add(struct i915_drm_clients *clients, struct task_struct
> *task)
> +{
> + struct i915_drm_client *client;
> + int ret;
> +
> + client = kzalloc(sizeof(*client), GFP_KERNEL);
> + if
== Series Details ==
Series: drm/mm: Allow drm_mm_initialized() to be used outside of the locks
URL : https://patchwork.freedesktop.org/series/74451/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16881_full
On Wed, Mar 04, 2020 at 09:56:28PM -0800, Dixit, Ashutosh wrote:
On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote:
On 04/03/2020 07:48, Dixit, Ashutosh wrote:
> On Tue, 03 Mar 2020 14:19:05 -0800, Umesh Nerlige Ramappa wrote:
>> From: Lionel Landwerlin
>>
>> With the currently
On running several back to back perf capture sessions involving closing
and opening the perf stream, invalid OA reports are seen in the
beginning of the OA buffer in some sessions. Fix this by invalidating OA
TLB when the perf stream is closed or disabled on gen12.
Signed-off-by: Umesh Nerlige
On Mon, Mar 9, 2020 at 4:27 PM Lyude Paul wrote:
>
> On Sat, 2020-03-07 at 14:00 +0530, Pankaj Bharadiya wrote:
> > drm_dp_mst_topology_mgr_cbs.register_connector callbacks are identical
> > amongst every driver and don't do anything other than calling
> > drm_connector_register().
> >
On Mon, Mar 09, 2020 at 10:35:52AM +0200, Jani Nikula wrote:
> On Fri, 06 Mar 2020, Manasi Navare wrote:
> > On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> >> On Thu, 05 Mar 2020, Manasi Navare wrote:
> >> > This patch adds defines for the detailed monitor
> >> > range flags as
== Series Details ==
Series: drm: Mark up racy check of drm_gem_object.handle_count
URL : https://patchwork.freedesktop.org/series/74450/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16880_full
On Sat, 2020-03-07 at 14:00 +0530, Pankaj Bharadiya wrote:
> drm_dp_mst_topology_mgr_cbs.register_connector callbacks are identical
> amongst every driver and don't do anything other than calling
> drm_connector_register().
> drm_dp_mst_topology_mgr_cbs.destroy_connector callbacks are identical
>
On Fri, Mar 06, 2020 at 09:10:56PM +0530, Sharma, Swati2 wrote:
>
>
> On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Remainder of my earlier gamma cleanups, rebased due to
> > hw vs. uapi split and intel_de_{read,write}().
>
> I didn't get patch#8. Everything
On Wed, Mar 04, 2020 at 09:56:28PM -0800, Dixit, Ashutosh wrote:
On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote:
On 04/03/2020 07:48, Dixit, Ashutosh wrote:
> On Tue, 03 Mar 2020 14:19:05 -0800, Umesh Nerlige Ramappa wrote:
>> From: Lionel Landwerlin
>>
>> With the currently
== Series Details ==
Series: drm/i915: Gamma cleanups (rev4)
URL : https://patchwork.freedesktop.org/series/69136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8087_full -> Patchwork_16866_full
Summary
---
== Series Details ==
Series: drm/i915/gt: Mark up intel_rps.active for racy reads
URL : https://patchwork.freedesktop.org/series/74448/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16879_full
== Series Details ==
Series: drm/i915/gt: Defend against concurrent updates to execlists->active
URL : https://patchwork.freedesktop.org/series/74447/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16878_full
== Series Details ==
Series: drm/i915: Gamma cleanups (rev4)
URL : https://patchwork.freedesktop.org/series/69136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8087_full -> Patchwork_16866_full
Summary
---
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Expose list of clients in sysfs
Okay!
Commit: drm/i915: Update client name
== Series Details ==
Series: Per client engine busyness (rev5)
URL : https://patchwork.freedesktop.org/series/70977/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a60fd0a6e3d1 drm/i915: Expose list of clients in sysfs
-:68: WARNING:FILE_PATH_CHANGES: added, moved or deleted
From: Tvrtko Ursulin
Adds support for per-client engine busyness stats i915 exports in sysfs
and produces output like the below:
==
intel-gpu-top - 935/ 935 MHz;0% RC6; 14.73 Watts; 1097 irqs/s
IMC reads:
From: Tvrtko Ursulin
Just a demo to follow the the i915 feature.
Tvrtko Ursulin (1):
intel-gpu-top: Support for client stats
tools/intel_gpu_top.c | 539 +-
1 file changed, 528 insertions(+), 11 deletions(-)
--
2.20.1
From: Tvrtko Ursulin
As contexts are abandoned we want to remember how much GPU time they used
(per class) so later we can used it for smarter purposes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 13 -
From: Tvrtko Ursulin
Another re-spin of the per-client engine busyness series. Highlights from this
version:
* Different way of tracking runtime of exited/unreachable context. This time
round I accumulate those per context/client and engine class, but active
contexts are kept in a list
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index
From: Tvrtko Ursulin
Expose per-client and per-engine busyness under the previously added sysfs
client root.
The new files are one per-engine instance and located under the 'busy'
directory. Each contains a monotonically increasing nano-second resolution
times each client's jobs were executing
From: Tvrtko Ursulin
When available prefer context tracked context busyness because it provides
visibility into currently executing contexts as well.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drm_client.c | 83 +-
From: Tvrtko Ursulin
Accumulate software tracked runtime from abandoned engines and destroyed
contexts (same as we previously did for pphwsp runtimes).
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 11 ++-
From: Tvrtko Ursulin
As GEM contexts are closed we want to have the DRM client remember how
much GPU time they used (per class) so later we can used it for smarter
purposes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 12 +++-
From: Tvrtko Ursulin
If we make GEM contexts keep a reference to i915_drm_client for the whole
of their lifetime, we can consolidate the current task pid and name usage
by getting it from the client.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 23
From: Tvrtko Ursulin
Some clients have the DRM fd passed to them over a socket by the X server.
Grab the real client and pid when they create their first context and
update the exposed data for more useful enumeration.
To enable lockless access to client name and pid data from the following
From: Tvrtko Ursulin
We soon want to start answering questions like how much GPU time is the
context belonging to a client which exited still using.
To enable this we start tracking all context belonging to a client on a
separate list.
Signed-off-by: Tvrtko Ursulin
---
From: Tvrtko Ursulin
I need to keep the GEM context around a bit longer so adding an explicit
flag for syncing execbuf with closed/abandonded contexts.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c| 3 ++-
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4
From: Tvrtko Ursulin
Expose a list of clients with open file handles in sysfs.
This will be a basis for a top-like utility showing per-client and per-
engine GPU load.
Currently we only expose each client's pid and name under opaque numbered
directories in /sys/class/drm/card0/clients/.
For
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
v2: Fix
On Wed, Mar 4, 2020 at 4:36 PM Daniele Ceraolo Spurio
wrote:
>
> Hi,
>
> Kindly add the below i915 changes to linux-firmware.git
>
> The following changes since commit 0148cfefcbf98898ca65bb26d9d7d638b30e211d:
>
> Merge https://github.com/rjliao-qca/qca-btfw (2020-03-02 08:08:15 -0500)
>
> are
Chris Wilson writes:
> [ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930 [i915]
> [ 206.875654]
> [ 206.875666] race at unknown origin, with read to 0x8881f7644480 of 8
> bytes by task 703 on cpu 3:
> [ 206.875901] __i915_schedule+0x7fc/0x930 [i915]
> [ 206.876130]
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in
fastsets when disabled by parameter (rev2)
URL : https://patchwork.freedesktop.org/series/74401/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
80e3e1bd274b drm/i915/display: Deactive
[ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930 [i915]
[ 206.875654]
[ 206.875666] race at unknown origin, with read to 0x8881f7644480 of 8
bytes by task 703 on cpu 3:
[ 206.875901] __i915_schedule+0x7fc/0x930 [i915]
[ 206.876130] __bump_priority+0x63/0x80 [i915]
[
Chris Wilson writes:
> [ 120.176548] BUG: KCSAN: data-race in __i915_schedule [i915] /
> effective_prio [i915]
> [ 120.176566]
> [ 120.176577] write to 0x8881e35e6540 of 4 bytes by task 730 on cpu 3:
> [ 120.176792] __i915_schedule+0x63e/0x920 [i915]
> [ 120.177007]
Chris Wilson writes:
> [ 7534.150687] BUG: KCSAN: data-race in __execlists_submission_tasklet [i915]
> / process_csb [i915]
> [ 7534.150706]
> [ 7534.150717] write to 0x8881f1bc24b4 of 4 bytes by task 24404 on cpu 3:
> [ 7534.150925] __execlists_submission_tasklet+0x1158/0x2780 [i915]
> [
>>But he asked whether it's possible for Media and OpenCL drivers to also
>>disable mid-thread preemption through the INTERFACE_DESCRIPTOR_DATA, instead
>>of from the >>kernel side, so we could try to experiment with it in the
>>future.
Interface Descriptor setting only switches the preemption
Quoting Mika Kuoppala (2020-03-09 16:38:49)
> Chris Wilson writes:
>
> > Quoting Mika Kuoppala (2020-03-09 15:34:40)
> >> Chris Wilson writes:
> >>
> >> > [ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930
> >> > [i915]
> >> > [ 206.875654]
> >> > [ 206.875666] race at
Chris Wilson writes:
> [ 145.927961] BUG: KCSAN: data-race in can_merge_rq [i915] / signal_irq_work
> [i915]
> [ 145.927980]
> [ 145.927992] write (marked) to 0x8881e513fab0 of 8 bytes by interrupt
> on cpu 2:
> [ 145.928250] signal_irq_work+0x134/0x640 [i915]
> [ 145.928268]
== Series Details ==
Series: Refactor Gen11+ SAGV support
URL : https://patchwork.freedesktop.org/series/74461/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e5a587535617 drm/i915: Start passing latency as parameter
33f087f7ad33 drm/i915: Introduce skl_plane_wm_level accessor.
Chris Wilson writes:
> Quoting Mika Kuoppala (2020-03-09 15:34:40)
>> Chris Wilson writes:
>>
>> > [ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930 [i915]
>> > [ 206.875654]
>> > [ 206.875666] race at unknown origin, with read to 0x8881f7644480 of
>> > 8 bytes by task
== Series Details ==
Series: series starting with [01/17] drm/i915: Add an implementation for
i915_gem_ww_ctx locking, v2. (rev2)
URL : https://patchwork.freedesktop.org/series/74387/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8097 -> Patchwork_16884
On Sun, Mar 08, 2020 at 03:32:32AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Don't treat unslice registers as masked (rev3)
> URL : https://patchwork.freedesktop.org/series/74351/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_8090_full
Quoting Mika Kuoppala (2020-03-09 15:34:40)
> Chris Wilson writes:
>
> > [ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930 [i915]
> > [ 206.875654]
> > [ 206.875666] race at unknown origin, with read to 0x8881f7644480 of 8
> > bytes by task 703 on cpu 3:
> > [
Flip the switch and enable SAGV support
for Gen12 also.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4ec4dbba022f..a8a01a980b8f 100644
---
That is a preparation patch before next one where we
introduce old_bw_state and a bunch of other changes
as well.
In a review comment it was suggested to split out
at least that renaming into a separate patch, what
is done here.
Signed-off-by: Stanislav Lisovskiy
---
We need a new PCode request commands and reply codes
to be added as a prepartion patch for QGV points
restricting for new SAGV support.
v2: - Extracted those changes into separate patch
(Ville Syrjälä)
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/i915_reg.h | 4
For future Gen12 SAGV implementation we need to
seemlessly alter wm levels calculated, depending
on whether we are allowed to enable SAGV or not.
So this accessor will give additional flexibility
to do that.
Currently this accessor is still simply working
as "pass-through" function. This will be
According to BSpec 53998, we should try to
restrict qgv points, which can't provide
enough bandwidth for desired display configuration.
Currently we are just comparing against all of
those and take minimum(worst case).
v2: Fixed wrong PCode reply mask, removed hardcoded
values.
v3: Forbid
For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.
Also had to refactor
Currently intel_can_enable_sagv function contains
a mix of workarounds for different platforms
some of them are not valid for gens >= 11 already,
so lets split it into separate functions.
v2:
- Rework watermark calculation algorithm to
attempt to calculate Level 0 watermark
with
Add correspondent helpers to be able to get old/new bandwidth
global state object.
v2: - Fixed typo in function call
v3: - Changed new functions naming to use convention proposed
by Jani Nikula, i.e intel_bw_* in intel_bw.c file.
Signed-off-by: Stanislav Lisovskiy
---
We need to start passing memory latency as a
parameter when calculating plane wm levels,
as latency can get changed in different
circumstances(for example with or without SAGV).
So we need to be more flexible on that matter.
Reviewed-by: Ville Syrjälä
Signed-off-by: Stanislav Lisovskiy
---
Chris Wilson writes:
> [ 25.025543] BUG: KCSAN: data-race in __i915_request_create [i915] /
> process_csb [i915]
> [ 25.025561]
> [ 25.025573] write (marked) to 0x8881e85c1620 of 8 bytes by task 696 on
> cpu 1:
> [ 25.025789] __i915_request_create+0x54b/0x5d0 [i915]
> [
== Series Details ==
Series: series starting with [01/17] drm/i915: Add an implementation for
i915_gem_ww_ctx locking, v2. (rev2)
URL : https://patchwork.freedesktop.org/series/74387/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a07375e972da drm/i915: Add an implementation
Quoting Mika Kuoppala (2020-03-09 15:21:31)
> Chris Wilson writes:
>
> > Quoting Mika Kuoppala (2020-03-09 14:03:01)
> >> Chris Wilson writes:
> >>
> >> > During i915_request_retire() we decouple the i915_request.hwsp_seqno
> >> > from the intel_timeline so that it may be freed before the
== Series Details ==
Series: drm/i915/execlists: Mark up the racy access to switch_priority_hint
URL : https://patchwork.freedesktop.org/series/74457/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097 -> Patchwork_16883
== Series Details ==
Series: series starting with [1/5] drm/i915: Mark up unlocked update of
i915_request.hwsp_seqno
URL : https://patchwork.freedesktop.org/series/74445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16877_full
Quoting Mika Kuoppala (2020-03-09 15:05:45)
> Chris Wilson writes:
>
> > [ 3783.276728] BUG: KCSAN: data-race in __i915_request_submit [i915] /
> > i915_request_await_dma_fence [i915]
> > [ 3783.276766]
> > [ 3783.276787] write to 0x8881f1bc60a0 of 1 bytes by interrupt on cpu 2:
> > [
Chris Wilson writes:
> [ 206.875637] BUG: KCSAN: data-race in __i915_schedule+0x7fc/0x930 [i915]
> [ 206.875654]
> [ 206.875666] race at unknown origin, with read to 0x8881f7644480 of 8
> bytes by task 703 on cpu 3:
> [ 206.875901] __i915_schedule+0x7fc/0x930 [i915]
> [ 206.876130]
Signed-off-by: Maarten Lankhorst
---
.../i915/gem/selftests/i915_gem_coherency.c | 26 ++-
drivers/gpu/drm/i915/selftests/i915_request.c | 18 -
2 files changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
Chris Wilson writes:
> Quoting Mika Kuoppala (2020-03-09 14:03:01)
>> Chris Wilson writes:
>>
>> > During i915_request_retire() we decouple the i915_request.hwsp_seqno
>> > from the intel_timeline so that it may be freed before the request is
>> > released. However, we need to warn the
Please ignore this, I seem to have some smtp trouble which fails some of
tha patches. This will be incomplete.
Wambui, I'll resend this later.
BR,
Jani.
On Mon, 09 Mar 2020, Jani Nikula wrote:
> Rebase of Wambui's series [1] to drm-tip, with a couple of manual
> conversions included.
>
> BR,
Rebase of Wambui's series [1] to drm-tip, with a couple of manual
conversions included.
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/72760/
Wambui Karuga (10):
drm/i915/dsb: convert to drm_device based logging macros.
drm/i915/fbc: convert to drm_device based logging macros.
From: Wambui Karuga
This converts uses of the printk based drm logging macros to the struct
drm_device logging macros in i915/display/intel_dsb.c. This was done
using the following coccinelle script:
@@
identifier fn, T;
@@
fn(...,struct drm_i915_private *T,...) {
<+...
(
-DRM_INFO(
Chris Wilson writes:
> [ 3783.276728] BUG: KCSAN: data-race in __i915_request_submit [i915] /
> i915_request_await_dma_fence [i915]
> [ 3783.276766]
> [ 3783.276787] write to 0x8881f1bc60a0 of 1 bytes by interrupt on cpu 2:
> [ 3783.277187] __i915_request_submit+0x47e/0x4a0 [i915]
> [
== Series Details ==
Series: drm/i915: Mark up unlocked update of i915_request.hwsp_seqno
URL : https://patchwork.freedesktop.org/series/74442/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097_full -> Patchwork_16876_full
== Series Details ==
Series: drm/i915: Mark racy read of intel_engine_cs.saturated
URL : https://patchwork.freedesktop.org/series/74455/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8097 -> Patchwork_16882
Summary
---
[ 7534.150687] BUG: KCSAN: data-race in __execlists_submission_tasklet [i915] /
process_csb [i915]
[ 7534.150706]
[ 7534.150717] write to 0x8881f1bc24b4 of 4 bytes by task 24404 on cpu 3:
[ 7534.150925] __execlists_submission_tasklet+0x1158/0x2780 [i915]
[ 7534.151133]
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