Hi Daniel, Dave,
Here's a few fixes for the next merge window
Thanks!
Maxime
drm-misc-next-fixes-2020-10-02:
Three fixes for vc4 that addresses dual-display breakages
The following changes since commit 089d83418914abd4d908db117d9a3eca7f51a68c:
drm/vc4: hvs: Pull the state of all the CRTCs pri
== Series Details ==
Series: Memory leak fix
URL : https://patchwork.freedesktop.org/series/82319/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9091_full -> Patchwork_18609_full
Summary
---
**FAILURE**
Serious un
tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued
head: f542d671ffcec772a561cd41c7e2394392d9dafb
commit: f542d671ffcec772a561cd41c7e2394392d9dafb [14/14] drm/i915: Init lspcon
after HPD in intel_dp_detect()
config: x86_64-randconfig-a003-20201001 (attached as .config
== Series Details ==
Series: Memory leak fix
URL : https://patchwork.freedesktop.org/series/82319/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9091 -> Patchwork_18609
Summary
---
**SUCCESS**
No regressions found
Static analysis detected a memory leak if the second kmalloc fails
and the first allocation is not freed.
Signed-off-by: Steve Hampson
---
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.
tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued
head: f542d671ffcec772a561cd41c7e2394392d9dafb
commit: f542d671ffcec772a561cd41c7e2394392d9dafb [14/14] drm/i915: Init lspcon
after HPD in intel_dp_detect()
config: x86_64-rhel (attached as .config)
compiler: gcc-9 (Debian 9.3
== Series Details ==
Series: drm/i915/jsl: Update JSL Voltage swing table
URL : https://patchwork.freedesktop.org/series/82313/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9091 -> Patchwork_18608
Summary
---
**FAIL
== Series Details ==
Series: drm/i915/jsl: Update JSL Voltage swing table
URL : https://patchwork.freedesktop.org/series/82313/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i9
== Series Details ==
Series: drm/i915/jsl: Update JSL Voltage swing table
URL : https://patchwork.freedesktop.org/series/82313/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7c3e877540c1 drm/i915/jsl: Split EHL/JSL platform info and PCI ids
-:156: CHECK:UNNECESSARY_PARENTHESES:
JSL has update in vswing table for eDP.
BSpec: 21257
Changes since V2 :
- Added IS_EHL_JSL to replace IS_ELKHARTLAKE
- EHL/JSL PCI ids split added
- Changes rebased as per new drm top commit
Changes since V1 :
- IS_ELKHARTLAKE and IS_JASPERLAKE is replaced wit
Split the basic platform definition, macros, and PCI IDs to
differentiate between EHL and JSL platforms.
Changes since V2 :
- Added IS_EHL_JSL to replace IS_ELKHARTLAKE
- EHL/JSL PCI ids split added
Changes since V1 :
- IS_ELKHARTLAKE and IS_JASPERLAKE is replaced with
Patch series covers following thigns:
1. Split and differentiate between EHL and JSL platfrom
2. Update voltage swing table for eDP on JSL platform
Changes since V2 :
- Added IS_EHL_JSL to replace IS_ELKHARTLAKE
- EHL/JSL PCI ids split added
- Rebased to drm master commit
Hi Lu,
On 2020-09-27 12:34 a.m., Lu Baolu wrote:
> Hi,
>
> The previous post of this series could be found here.
>
> https://lore.kernel.org/linux-iommu/20200912032200.11489-1-baolu...@linux.intel.com/
>
> This version introduce a new patch [4/7] to fix an issue reported here.
>
> https://lore
On Thu, Oct 01, 2020 at 07:44:29PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 29, 2020 at 03:29:27AM +0300, Imre Deak wrote:
> > When selecting the WRPLL dividers for a given port clock/PLL freq, the
> > hard-coded PLL freq in a table entry can be calculated using the rest of
> > parameters in the s
== Series Details ==
Series: series starting with [v2,1/6] drm/i915: Shut down displays gracefully
on reboot
URL : https://patchwork.freedesktop.org/series/82308/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9089_full -> Patchwork_18607_full
=
On Thu, 2020-10-01 at 12:24 +0100, Mun, Gwan-gyeong wrote:
> On Thu, 2020-09-24 at 10:42 -0700, José Roberto de Souza wrote:
> > Another step towards PSR2 selective fetch, here programming plane
> > selective fetch registers and MAN_TRK_CTL enabling selective fetch
> > but
> > for now it is fetchin
On Thu, Oct 01, 2020 at 07:44:29PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 29, 2020 at 03:29:27AM +0300, Imre Deak wrote:
> > When selecting the WRPLL dividers for a given port clock/PLL freq, the
> > hard-coded PLL freq in a table entry can be calculated using the rest of
> > parameters in the s
On Thu, Oct 01, 2020 at 07:41:48PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 29, 2020 at 03:29:25AM +0300, Imre Deak wrote:
> > The BIOS of at least one ASUS-Z170M system with an SKL I have programs
> > the 101b WRPLL PDIV divider value, which is the encoding for PDIV=7 with
> > bit#0 incorrectly s
On Tue, Sep 29, 2020 at 03:29:28AM +0300, Imre Deak wrote:
> Apply Display WA #22010492432 for combo PHY PLLs too. This should fix a
> problem where the PLL output frequency is slightly off with the current
> PLL fractional divider value.
>
> I haven't seen an actual case where this causes a probl
On Tue, Sep 29, 2020 at 03:29:27AM +0300, Imre Deak wrote:
> When selecting the WRPLL dividers for a given port clock/PLL freq, the
> hard-coded PLL freq in a table entry can be calculated using the rest of
> parameters in the same entry. Cross-check if the hard coded values match
> what we calcula
On Tue, Sep 29, 2020 at 03:29:25AM +0300, Imre Deak wrote:
> The BIOS of at least one ASUS-Z170M system with an SKL I have programs
> the 101b WRPLL PDIV divider value, which is the encoding for PDIV=7 with
> bit#0 incorrectly set.
>
> This happens with the
>
> "3840x2160": 30 262750 3840 3888 39
On Thu, Oct 01, 2020 at 10:25:06AM +0200, Thomas Gleixner wrote:
> On Thu, Oct 01 2020 at 10:17, Joonas Lahtinen wrote:
> > Quoting paul...@kernel.org (2020-09-29 02:30:58)
> >> CONFIG_PREEMPT_COUNT is now unconditionally enabled and will be
> >> removed. Cleanup the leftovers before doing so.
> >
On Wed, Jun 10, 2020 at 03:55:10PM +0800, Kai-Heng Feng wrote:
> On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
> becomes useless and never responds to cable hotplugging:
> [3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon
> [3.031945] [drm:intel_dd
== Series Details ==
Series: series starting with [v2,1/6] drm/i915: Shut down displays gracefully
on reboot
URL : https://patchwork.freedesktop.org/series/82308/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9089 -> Patchwork_18607
===
== Series Details ==
Series: series starting with [v2,1/6] drm/i915: Shut down displays gracefully
on reboot
URL : https://patchwork.freedesktop.org/series/82308/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be check
On Wed, Sep 30, 2020 at 03:47:06PM +0200, Stefan Joosten wrote:
> The fix of flagging state->modeset whenever distrust_bios_wm is set
> causes a regression when initializing display(s) attached to a Lenovo
> USB-C docking station. The display remains blank until the dock is
> reattached. Revert to
From: Ville Syrjälä
Currently VLV/CHV use a reboot notifier to make sure the panel
power cycle delay isn't violated across a system reboot. Replace
that with the new encoder .shutdown() hook.
And let's also stop overriding the power cycle delay with the
max value. No idea why the current code do
From: Ville Syrjälä
Just like with eDP let's wait for the power sequencer power
cycle delay before we reboot the machine, as otherwise we
can't guarantee the panel's minimum power cycle delay will
be respected.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_lvds.c | 10 +++
From: Ville Syrjälä
As with eDP and LVDS we should also respect the power cycle
delay on DSI panels. We are not using the power sequencer
for these, and we have no optimizations around the sleep
duration, so we just msleep() the whole thing away.
Note that the ICL+ DSI code doesn't seem to have
From: Ville Syrjälä
Extend the eDP panel power cycle delay wait on reboot handling
to cover all platforms. No reason to think that VLV/CHV are
in any way special since the documentation states that the
hardware power cycle delay goes back to its default value on
reset, and that may not be enough
From: Ville Syrjälä
Add a new encoder hook .shutdown() which will get called at the end
of the pci .shutdown() hook. We shall use this to deal with the
panel power cycle delay issues.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_types.h | 5 +
drivers/gpu/dr
From: Ville Syrjälä
Implement the pci .shutdown() hook in order to quiesce the
hardware prior to reboot. The main purpose here is to turn
all displays off. Some displays/other drivers tend to get
confused if the state after reboot isn't exactly as they
expected.
One specific example was the Dell
On Thu, Oct 1, 2020 at 5:08 PM Jani Nikula wrote:
>
> On Thu, 01 Oct 2020, Daniel Vetter wrote:
> > On Thu, Oct 1, 2020 at 3:53 PM Christoph Hellwig wrote:
> >>
> >> On Thu, Oct 01, 2020 at 08:39:17PM +1000, Stephen Rothwell wrote:
> >> > Hi all,
> >> >
> >> > Today's linux-next merge of the akp
On Thu, 01 Oct 2020, Daniel Vetter wrote:
> On Thu, Oct 1, 2020 at 3:53 PM Christoph Hellwig wrote:
>>
>> On Thu, Oct 01, 2020 at 08:39:17PM +1000, Stephen Rothwell wrote:
>> > Hi all,
>> >
>> > Today's linux-next merge of the akpm tree got a conflict in:
>> >
>> > drivers/gpu/drm/i915/gem/i915
On Wed, Sep 30, 2020 at 10:16:02PM -0700, Lucas De Marchi wrote:
> On Wed, Sep 30, 2020 at 10:20:41AM -0700, Matt Roper wrote:
> > On Tue, Sep 29, 2020 at 11:42:33PM -0700, Lucas De Marchi wrote:
> > > From: Anshuman Gupta
> > >
> > > DGFX devices have different DMC_DEBUG* counter MMIO address
>
On Thu, Oct 1, 2020 at 3:53 PM Christoph Hellwig wrote:
>
> On Thu, Oct 01, 2020 at 08:39:17PM +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > Today's linux-next merge of the akpm tree got a conflict in:
> >
> > drivers/gpu/drm/i915/gem/i915_gem_pages.c
> >
> > between commit:
> >
> > 4caf0
On Wed, Sep 30, 2020 at 02:34:38AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Another attempt at plumbing the crtc state to the depths of
> the link training code. This time I tried to preserve the
> PHY test stuff in a somewhat working condition.
>
> The DDI buf trans stuff also star
On Thu, Oct 01, 2020 at 08:39:17PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the akpm tree got a conflict in:
>
> drivers/gpu/drm/i915/gem/i915_gem_pages.c
>
> between commit:
>
> 4caf017ee937 ("drm/i915/gem: Avoid implicit vmap for highmem on x86-32")
> ba2
== Series Details ==
Series: drm/i915: Plumb crtc state to link training code (rev5)
URL : https://patchwork.freedesktop.org/series/76993/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9086_full -> Patchwork_18606_full
Summ
Hi Baolu,
On Tue, Sep 29, 2020 at 08:11:35AM +0800, Lu Baolu wrote:
> I have no preference. It depends on which patch goes first. Let the
> maintainers help here.
No preference on my side, except that it is too late for this now to
make it into v5.10. Besides that I let the decission up to you wh
== Series Details ==
Series: drm/i915: Skip over MI_NOOP when parsing (rev2)
URL : https://patchwork.freedesktop.org/series/82268/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9086_full -> Patchwork_18605_full
Summary
== Series Details ==
Series: drm/i915: Plumb crtc state to link training code (rev5)
URL : https://patchwork.freedesktop.org/series/76993/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9086 -> Patchwork_18606
Summary
--
On Wed, 30 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
wrote:
> -Original Message-
> From: Intel-gfx On Behalf Of José
> Roberto de Souza
> Sent: 29 September 2020 01:33
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2] drm/i915/display/ehl: Limit eDP to HBR2
>
== Series Details ==
Series: drm/i915: Plumb crtc state to link training code (rev5)
URL : https://patchwork.freedesktop.org/series/76993/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d4651ba92742 drm/i915: s/pre_empemph/preemph/
d2dcd064491e drm/i915: s/old_crtc_state/crtc_st
On Thu, 2020-09-24 at 10:42 -0700, José Roberto de Souza wrote:
> Another step towards PSR2 selective fetch, here programming plane
> selective fetch registers and MAN_TRK_CTL enabling selective fetch
> but
> for now it is fetching the whole area of the planes.
> The damaged area calculation will c
From: Ville Syrjälä
Get rid of mode crtc->config usage, and some ad-hoc intel_dp state
usage by plumbing the crtc state all the way down to the link training
code.
Unfortunately we do have to keep some cached state in intel_dp so
that we can do the "does the link need retraining?" checks from
th
== Series Details ==
Series: drm/i915: Skip over MI_NOOP when parsing (rev2)
URL : https://patchwork.freedesktop.org/series/82268/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9086 -> Patchwork_18605
Summary
---
**S
Hi all,
Today's linux-next merge of the akpm tree got a conflict in:
drivers/gpu/drm/i915/gem/i915_gem_pages.c
between commit:
4caf017ee937 ("drm/i915/gem: Avoid implicit vmap for highmem on x86-32")
ba2ebf605d5f ("drm/i915/gem: Prevent using pgprot_writecombine() if PAT is
not supported
Though less likely in practice, igt uses MI_NOOP frequently to pad out
its batch buffers. The lookup and valiation of so many MI_NOOP command
descriptions is noticeable, though the side-effect of poisoning the
last-validated-command cache is more likely to impact upon real CS.
Signed-off-by: Chris
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: don't conflate is_dgfx with
fake lmem
URL : https://patchwork.freedesktop.org/series/82283/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9085_full -> Patchwork_18604_full
===
On Thu, Oct 01 2020 at 10:17, Joonas Lahtinen wrote:
> Quoting paul...@kernel.org (2020-09-29 02:30:58)
>> CONFIG_PREEMPT_COUNT is now unconditionally enabled and will be
>> removed. Cleanup the leftovers before doing so.
>
> Change looks fine:
>
> Reviewed-by: Joonas Lahtinen
>
> Are you looking
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: don't conflate is_dgfx with
fake lmem
URL : https://patchwork.freedesktop.org/series/82283/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9085 -> Patchwork_18604
=
drm-misc-fixes-2020-10-01:
drm-misc-fixes for v5.9:
- Small doc fix.
- Re-add FB_ARMCLCD for android.
- Fix global-out-of-bounds read in fbcon_get_font().
The following changes since commit 19a508bd1ad8e444de86873bf2f2b2ab8edd6552:
dmabuf: fix NULL pointer dereference in dma_buf_release() (2020-
Quoting paul...@kernel.org (2020-09-29 02:30:58)
> From: Thomas Gleixner
>
> CONFIG_PREEMPT_COUNT is now unconditionally enabled and will be
> removed. Cleanup the leftovers before doing so.
Change looks fine:
Reviewed-by: Joonas Lahtinen
Are you looking for us to merge or merge through anoth
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