[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Cancel submitted requests upon context reset

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/gt: Cancel submitted requests upon context reset URL : https://patchwork.freedesktop.org/series/85336/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534_full -> Patchwork_19234_full

Re: [Intel-gfx] [PATCH] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Almahallawy, Khaled
On Wed, 2020-12-30 at 16:02 -0800, Matt Roper wrote: > On Wed, Dec 30, 2020 at 10:37:42AM +, Chris Wilson wrote: > > The timeouts are frequent and expected. We will complain if we > > retry so > > often as to lose patience and give up, so the cacophony from > > individual > > complaints is

[Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce Intel PXP component - Mesa single session (rev16)

2020-12-30 Thread Patchwork
== Series Details == Series: Introduce Intel PXP component - Mesa single session (rev16) URL : https://patchwork.freedesktop.org/series/84620/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19235 Summary

Re: [Intel-gfx] [PATCH] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Matt Roper
On Wed, Dec 30, 2020 at 10:37:42AM +, Chris Wilson wrote: > The timeouts are frequent and expected. We will complain if we retry so > often as to lose patience and give up, so the cacophony from individual > complaints is redundant. > > Signed-off-by: Chris Wilson Reviewed-by: Matt Roper

Re: [Intel-gfx] [PATCH V2] drm/i915/cml : Add TGP PCH support

2020-12-30 Thread Matt Roper
On Mon, Dec 28, 2020 at 11:42:35AM +0530, Tejas Upadhyay wrote: > We have TGP PCH support for Tigerlake and Rocketlake. Similarly > now TGP PCH can be used with Cometlake CPU. Based on the 'compatibility' section of bspec 49181, I think the TGP PCH can technically be compatible with any gen9bc

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP component - Mesa single session (rev16)

2020-12-30 Thread Patchwork
== Series Details == Series: Introduce Intel PXP component - Mesa single session (rev16) URL : https://patchwork.freedesktop.org/series/84620/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8aed24199142 drm/i915/pxp: Introduce Intel PXP component -:118:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Track pm_qos per connector (rev2)

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/dp: Track pm_qos per connector (rev2) URL : https://patchwork.freedesktop.org/series/85333/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534_full -> Patchwork_19233_full Summary

[Intel-gfx] [RFC-v16 03/13] drm/i915/pxp: Implement funcs to create the TEE channel

2020-12-30 Thread Huang, Sean Z
Implement the funcs to create the TEE channel, so kernel can send the TEE commands directly to TEE for creating the arbitrary (defualt) session. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile| 3 +- drivers/gpu/drm/i915/i915_drv.c | 1 +

[Intel-gfx] [RFC-v16 13/13] drm/i915/pxp: Add plane decryption support

2020-12-30 Thread Huang, Sean Z
From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PAVP session is enabled. 2. Buffer object is protected. v2: - Rebased to libva_cp-drm-tip_tgl_cp tree. - Used gen fb obj

[Intel-gfx] [RFC-v16 11/13] drm/i915/uapi: introduce drm_i915_gem_create_ext

2020-12-30 Thread Huang, Sean Z
From: Bommu Krishnaiah Same old gem_create but with now with extensions support. This is needed to support various upcoming usecases. For now we use the extensions mechanism to support PAVP. Signed-off-by: Bommu Krishnaiah Signed-off-by: Matthew Auld Cc: Joonas Lahtinen

[Intel-gfx] [RFC-v16 00/13] Introduce Intel PXP component - Mesa single session

2020-12-30 Thread Huang, Sean Z
PXP (Protected Xe Path) is an i915 component, available on GEN12+ that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. This patch series is to allow the kernel space to create and manage a single hardware session

[Intel-gfx] [RFC-v16 12/13] drm/i915/pxp: User interface for Protected buffer

2020-12-30 Thread Huang, Sean Z
From: Bommu Krishnaiah This api allow user mode to create Protected buffer and context creation. Signed-off-by: Bommu Krishnaiah Cc: Telukuntla Sreedhar Cc: Kondapally Kalyan Cc: Gupta Anshuman Cc: Huang Sean Z --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++--

[Intel-gfx] [RFC-v16 10/13] mei: pxp: export pavp client to me client bus

2020-12-30 Thread Huang, Sean Z
From: Vitaly Lubart Export PAVP client to work with i915_cp driver, for binding it uses kernel component framework. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 + drivers/misc/mei/pxp/Kconfig |

[Intel-gfx] [RFC-v16 05/13] drm/i915/pxp: Func to send hardware session termination

2020-12-30 Thread Huang, Sean Z
Implement the functions to allow PXP to send a GPU command, in order to terminate the hardware session, so hardware can recycle this session slot for the next usage. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c |

[Intel-gfx] [RFC-v16 07/13] drm/i915/pxp: Destroy arb session upon teardown

2020-12-30 Thread Huang, Sean Z
Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. So as a result, PXP should handle such case and terminate the type0 sessions, which including arb session Signed-off-by: Huang, Sean

[Intel-gfx] [RFC-v16 06/13] drm/i915/pxp: Enable PXP irq worker and callback stub

2020-12-30 Thread Huang, Sean Z
Create the irq worker that serves as callback handler, those callback stubs should be called while the hardware key teardown occurs. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 + drivers/gpu/drm/i915/i915_reg.h | 3 +-

[Intel-gfx] [RFC-v16 09/13] drm/i915/pxp: Expose session state for display protection flip

2020-12-30 Thread Huang, Sean Z
Implement the intel_pxp_gem_object_status() to allow i915 display querying the current PXP session state. In the design, display should not perform protection flip on the protected buffers if there is no PXP session alive. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c |

[Intel-gfx] [RFC-v16 08/13] drm/i915/pxp: Enable PXP power management

2020-12-30 Thread Huang, Sean Z
During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the software session state was marked as alive after resume. So to handle such case, PXP should terminate all the hardware sessions and cleanup all the software states after

[Intel-gfx] [RFC-v16 04/13] drm/i915/pxp: Create the arbitrary session after boot

2020-12-30 Thread Huang, Sean Z
Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. This arbitrary session

[Intel-gfx] [RFC-v16 01/13] drm/i915/pxp: Introduce Intel PXP component

2020-12-30 Thread Huang, Sean Z
PXP (Protected Xe Path) is an i915 componment, available on GEN12+, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. This patch series is to allow the kernel space to create and manage a single hardware session

[Intel-gfx] [RFC-v16 02/13] drm/i915/pxp: set KCR reg init during the boot time

2020-12-30 Thread Huang, Sean Z
Set the KCR init during the boot time, which is required by hardware, to allow us doing further protection operation such as sending commands to GPU or TEE. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 8 1 file changed, 8 insertions(+) diff --git

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Cancel submitted requests upon context reset

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/gt: Cancel submitted requests upon context reset URL : https://patchwork.freedesktop.org/series/85336/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19234 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Only disable preemption on gen8 render engines (rev2)

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/gt: Only disable preemption on gen8 render engines (rev2) URL : https://patchwork.freedesktop.org/series/85311/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534_full -> Patchwork_19230_full

[Intel-gfx] [CI] drm/i915/gt: Cancel submitted requests upon context reset

2020-12-30 Thread Chris Wilson
Since we process schedule-in of a context after submitting the request, if we decide to reset the context at that time, we also have to cancel the requets we have marked for submission. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- .../drm/i915/gt/intel_execlists_submission.c |

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Track pm_qos per connector (rev2)

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/dp: Track pm_qos per connector (rev2) URL : https://patchwork.freedesktop.org/series/85333/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19233 Summary ---

Re: [Intel-gfx] [PATCH 03/56] drm/i915/gt: Cancel submitted requests upon context reset

2020-12-30 Thread Mika Kuoppala
Chris Wilson writes: > Since we process schedule-in of a context after submitting the request, > if we decide to reset the context at that time, we also have to cancel > the requets we have marked for submission. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/dp: Track pm_qos per connector URL : https://patchwork.freedesktop.org/series/85333/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19232 Summary ---

[Intel-gfx] [CI] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Chris Wilson
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a single global pm_qos does not suffice. (One connector may disable the dma-latency boost prematurely while the second is still depending on it.) Instead of a single global pm_qos, track the pm_qos request for each intel_dp. v2:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message (rev2)

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message (rev2) URL : https://patchwork.freedesktop.org/series/85315/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19231

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Only disable preemption on gen8 render engines (rev2)

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/gt: Only disable preemption on gen8 render engines (rev2) URL : https://patchwork.freedesktop.org/series/85311/ State : success == Summary == CI Bug Log - changes from CI_DRM_9534 -> Patchwork_19230

[Intel-gfx] [CI] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Chris Wilson
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a single global pm_qos does not suffice. (One connector may disable the dma-latency boost prematurely while the second is still depending on it.) Instead of a single global pm_qos, track the pm_qos request for each intel_dp. v2:

Re: [Intel-gfx] [PATCH v2] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Imre Deak
On Wed, Dec 30, 2020 at 05:07:34PM +, Chris Wilson wrote: > Since multiple connectors may run intel_dp_aux_xfer conncurrently, a > single global pm_qos does not suffice. (One connector may disable the > dma-latency boost prematurely while the second is still depending on > it.) Instead of a

[Intel-gfx] [PATCH v2] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Chris Wilson
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a single global pm_qos does not suffice. (One connector may disable the dma-latency boost prematurely while the second is still depending on it.) Instead of a single global pm_qos, track the pm_qos request for each intel_dp. v2:

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Imre Deak
On Wed, Dec 30, 2020 at 10:48:34AM +, Chris Wilson wrote: > Since multiple connectors may run intel_dp_aux_xfer conncurrently, a > single global pm_qos does not suffice. (One connector may disable the > dma-latency boost prematurely while the second is still depending on > it.) Instead of a

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_suspend: Remove legacy ring abi

2020-12-30 Thread Chris Wilson
Cover all engines with the engine map API. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_suspend.c | 69 +-- 1 file changed, 25 insertions(+), 44 deletions(-) diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c index

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_whisper: Replace ring selection with engine map

2020-12-30 Thread Chris Wilson
Provide complete engine coverage by switching from the legacy ring selection abi into the engine map. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_whisper.c | 35 --- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_fence: Fix legacy ring selection

2020-12-30 Thread Chris Wilson
Fix the use of the legacy ring selection after the default context had an engine map installed. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_fence.c | 30 -- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/tests/i915/gem_exec_fence.c

Re: [Intel-gfx] [PATCH] i915: fix shift warning

2020-12-30 Thread Chris Wilson
Quoting Arnd Bergmann (2020-12-30 15:39:14) > From: Arnd Bergmann > > Randconfig builds on 32-bit machines show lots of warnings for > the i915 driver for incorrect bit masks like: mask is a u8. VCS0 is 2, I915_MAX_VCS 4 (u8 & GENMASK(5, 2)) >> 2 >

[Intel-gfx] [PATCH] drm/i915/gt: Only disable preemption on gen8 render engines

2020-12-30 Thread Chris Wilson
The reason why we did not enable preemption on Broadwater was due to missing GPGPU workarounds. Since this only applies to rcs0, only restrict rcs0 (and our global capabilities). While this does not affect exposing a preemption capability to userspace, it does affect our internal decisions on

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Support secure dispatch on gen6/gen7

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915: Support secure dispatch on gen6/gen7 URL : https://patchwork.freedesktop.org/series/85323/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9533_full -> Patchwork_19229_full Summary

Re: [Intel-gfx] [PATCH 06/54] drm/i915: Drop i915_request.lock requirement for intel_rps_boost()

2020-12-30 Thread Mika Kuoppala
Chris Wilson writes: > Since we use a flag within i915_request.flags to indicate when we have > boosted the request (so that we only apply the boost) once, this can be > used as the serialisation with i915_request_retire() to avoid having to > explicitly take the i915_request.lock which is more

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Support secure dispatch on gen6/gen7

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915: Support secure dispatch on gen6/gen7 URL : https://patchwork.freedesktop.org/series/85323/ State : success == Summary == CI Bug Log - changes from CI_DRM_9533 -> Patchwork_19229 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/dp: Remove aux xfer timeout debug message URL : https://patchwork.freedesktop.org/series/85313/ State : success == Summary == CI Bug Log - changes from CI_DRM_9533_full -> Patchwork_19226_full Summary

Re: [Intel-gfx] [PATCH] drm/i915/gt: Taint the reset mutex with the shrinker

2020-12-30 Thread Mika Kuoppala
Chris Wilson writes: > Declare that, under extreme circumstances, the shrinker may need to wait > upon a request, in which case reset must not itself deadlock in order to > ensure forward progress of the driver. That is since the shrinker may > depend upon a reset, any reset cannot touch the

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message URL : https://patchwork.freedesktop.org/series/85315/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9533 -> Patchwork_19228

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dp: Remove aux xfer timeout debug message URL : https://patchwork.freedesktop.org/series/85315/ State : warning == Summary == $ dim checkpatch origin/drm-tip d3af34a8e551 drm/i915/dp: Remove aux xfer timeout debug message

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] pm-qos

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] pm-qos URL : https://patchwork.freedesktop.org/series/85314/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9533 -> Patchwork_19227 Summary --- **FAILURE**

[Intel-gfx] [PATCH] drm/i915: Support secure dispatch on gen6/gen7

2020-12-30 Thread Chris Wilson
Re-enable secure dispatch for gen6/gen7, primarily to workaround the command parser and overly zealous command validation on Haswell. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] pm-qos

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] pm-qos URL : https://patchwork.freedesktop.org/series/85314/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] pm-qos

2020-12-30 Thread Patchwork
== Series Details == Series: series starting with [1/2] pm-qos URL : https://patchwork.freedesktop.org/series/85314/ State : warning == Summary == $ dim checkpatch origin/drm-tip a5980931c890 pm-qos -:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one -:34:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/dp: Remove aux xfer timeout debug message URL : https://patchwork.freedesktop.org/series/85313/ State : success == Summary == CI Bug Log - changes from CI_DRM_9533 -> Patchwork_19226 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Only disable preemption on gen8 render engines

2020-12-30 Thread Patchwork
== Series Details == Series: drm/i915/gt: Only disable preemption on gen8 render engines URL : https://patchwork.freedesktop.org/series/85311/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9533 -> Patchwork_19225 Summary

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Chris Wilson
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a single global pm_qos does not suffice. (One connector may disable the dma-latency boost prematurely while the second is still depending on it.) Instead of a single global pm_qos, track the pm_qos request for each intel_dp.

[Intel-gfx] [PATCH 1/2] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Chris Wilson
The timeouts are frequent and expected. We will complain if we retry so often as to lose patience and give up, so the cacophony from individual complaints is redundant. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/display/intel_dp.c | 2 -- 1 file changed, 2 deletions(-) diff --git

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Track pm_qos per connector

2020-12-30 Thread Chris Wilson
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a single global pm_qos does not suffice. (One connector may disable the dma-latency boost prematurely while the second is still depending on it.) Instead of a single global pm_qos, track the pm_qos request for each intel_dp.

[Intel-gfx] [PATCH 1/2] pm-qos

2020-12-30 Thread Chris Wilson
--- drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++ drivers/gpu/drm/i915/i915_drv.h| 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index

[Intel-gfx] [PATCH] drm/i915/dp: Remove aux xfer timeout debug message

2020-12-30 Thread Chris Wilson
The timeouts are frequent and expected. We will complain if we retry so often as to lose patience and give up, so the cacophony from individual complaints is redundant. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/display/intel_dp.c | 2 -- 1 file changed, 2 deletions(-) diff --git

[Intel-gfx] [PATCH] drm/i915/gt: Only disable preemption on gen8 render engines

2020-12-30 Thread Chris Wilson
The reason why we did not enable preemption on Broadwater was due to missing GPGPU workarounds. Since this only applies to rcs0, only restrict rcs0 (and our global capabilities). While this does not affect exposing a preemption capability to userspace, it does affect our internal decisions on

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: Exercise non-persistent behaviours

2020-12-30 Thread Chris Wilson
Verify that the virtual engine is destroyed when the context is lost if persistence is disabled either on the context or system-wide. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_balancer.c | 165 + 1 file changed, 165 insertions(+) diff --git