On Thu, 14 Jan 2021, Steven Rostedt wrote:
> [ Forgot to add those on the commit itself ]
>
> -- Steve
>
>
> On Thu, 14 Jan 2021 16:32:06 -0500
> Steven Rostedt wrote:
>
>> On reboot, one of my test boxes now triggers the following warning:
>>
>> [ cut here ]
>> RPM raw
On 1/13/2021 5:22 PM, Jani Nikula wrote:
On Fri, 08 Jan 2021, Jani Nikula wrote:
On Thu, 24 Dec 2020, "Nautiyal, Ankit K" wrote:
Thanks Chris to catch this.
This definitely should be bitwise Operator, as mentioned by Jani is
right thing to do.
The PCON which I had access to, had the F/W w
== Series Details ==
Series: drm/i915: support two CSC module on gen11 and later (rev2)
URL : https://patchwork.freedesktop.org/series/85847/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9617 -> Patchwork_19364
Summary
---
On Thursday, January 14, 2021 11:32 PM, Ville Syrjälä wrote:
>On Thu, Jan 14, 2021 at 05:22:36PM +0800, Lee Shawn C wrote:
>> There are two CSC on pipeline on gen11 and later platform.
>> User space application is allowed to enable CTM and RGB to YCbCr
>> coversion at the same time now.
>>
>> Cc:
There are two CSC on pipeline on gen11 and later platform.
User space application is allowed to enable CTM and RGB
to YCbCr coversion at the same time now.
v2: check csc capability in {}_color_check function.
Cc: Ville Syrjala
Cc: Imre Deak
Cc: Jani Nikula
Cc: Cooper Chiou
Cc: Shankar Uma
S
On Thu, Jan 14, 2021 at 2:01 PM Steven Rostedt wrote:
>
> Thanks, I take it, it will be going into mainline soon.
Just got merged - it might be a good idea to verify that your problem is solved.
Linus
___
Intel-gfx mailing list
Intel-gfx@li
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c: In function
'amdgpu_display_user_framebuffer_create':
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:929:24: warning: unused variable
'adev' [
== Series Details ==
Series: drm/i915: Add support for Intel's eDP backlight controls (rev10)
URL : https://patchwork.freedesktop.org/series/81702/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19363
Summa
== Series Details ==
Series: drm/i915: Add DEBUG_GEM to the recommended CI config
URL : https://patchwork.freedesktop.org/series/85868/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9608_full -> Patchwork_19356_full
Summary
== Series Details ==
Series: drm/i915: Add support for Intel's eDP backlight controls (rev10)
URL : https://patchwork.freedesktop.org/series/81702/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a14218296b37 drm/i915: Pass port to intel_panel_bl_funcs.get()
e8d05076842e drm/i915
== Series Details ==
Series: drm/i915: Shuffle DP code around
URL : https://patchwork.freedesktop.org/series/85878/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19362
Summary
---
**SUCCESS**
No
This reverts commit 0883ce8146ed6074c76399f4e70dbed788582e12. Originally
these quirks were added because of the issues with using the eDP
backlight interfaces on certain laptop panels, which made it impossible
to properly probe for DPCD backlight support without having a whitelist
for panels that w
Since we now support controlling panel backlights through DPCD using
both the standard VESA interface, and Intel's proprietary HDR backlight
interface, we should allow the user to be able to explicitly choose
between one or the other in the event that we're wrong about panels
reliably reporting sup
So-recently a bunch of laptops on the market have started using DPCD
backlight controls instead of the traditional DDI backlight controls.
Originally we thought we had this handled by adding VESA backlight
control support to i915, but the story ended up being a lot more
complicated then that.
Simp
Currently, every different type of backlight hook that i915 supports is
pretty straight forward - you have a backlight, probably through PWM
(but maybe DPCD), with a single set of platform-specific hooks that are
used for controlling it.
HDR backlights, in particular VESA and Intel's HDR backlight
In the next commit where we split PWM related backlight functions from
higher-level backlight functions, we'll want to be able to retrieve the
backlight level for the current display panel from the
intel_panel_bl_funcs->setup() function using pwm_funcs->get(). Since
intel_panel_bl_funcs->setup() is
A while ago we ran into issues while trying to enable the eDP backlight
control interface as defined by VESA, in order to make the DPCD
backlight controls on newer laptop panels work. The issue ended up being
much more complicated however, as we also apparently needed to add
support for an Intel-sp
== Series Details ==
Series: drm/i915: Shuffle DP code around
URL : https://patchwork.freedesktop.org/series/85878/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4c22a0db410f drm/i915: Fix the training pattern debug print
e5f62898fdee drm/i915: Remove dead TPS3->TPS2 fallback c
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
URL : https://patchwork.freedesktop.org/series/85877/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19361
S
On Thu, 14 Jan 2021 21:35:53 +
Chris Wilson wrote:
> Quoting Steven Rostedt (2021-01-14 21:32:06)
> > On reboot, one of my test boxes now triggers the following warning:
>
> 057fe3535eb3 ("drm/i915: Disable RPM wakeref assertions during driver
> shutdown")
> is included with the drm-intel
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
URL : https://patchwork.freedesktop.org/series/85877/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separatel
On 1/13/2021 14:07, john.c.harri...@intel.com wrote:
From: John Harrison
There is a module parameter for controlling what GuC/HuC features are
enabled. Setting to -1 means 'use the default'. However, the default
was not well defined, out of date and needs to be different across
platforms.
The
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
URL : https://patchwork.freedesktop.org/series/85877/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
89e07f063541 drm/framebuffer: Format modifier for Intel Gen 12 render
compressi
Quoting Steven Rostedt (2021-01-14 21:32:06)
> On reboot, one of my test boxes now triggers the following warning:
057fe3535eb3 ("drm/i915: Disable RPM wakeref assertions during driver shutdown")
is included with the drm-intel-fixes PR.
-Chris
___
Intel-
== Series Details ==
Series: series starting with [1/3] drm/i915/gem: split gem_create into own file
URL : https://patchwork.freedesktop.org/series/85875/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19360
[ Forgot to add those on the commit itself ]
-- Steve
On Thu, 14 Jan 2021 16:32:06 -0500
Steven Rostedt wrote:
> On reboot, one of my test boxes now triggers the following warning:
>
> [ cut here ]
> RPM raw-wakeref not held
> WARNING: CPU: 4 PID: 1 at drivers/gpu
On reboot, one of my test boxes now triggers the following warning:
[ cut here ]
RPM raw-wakeref not held
WARNING: CPU: 4 PID: 1 at drivers/gpu/drm/i915/intel_runtime_pm.h:106
gen6_write32+0x1bc/0x2a0 [i915]
Modules linked in: ebtable_filter ebtables bridge stp llc ip6
Quoting Imre Deak (2021-01-14 20:13:13)
> Add a simple helper to read data with the CPU from the page of a GEM
> object. Do the read either via a kmap if the object has struct pages
> or an iomap otherwise. This is needed by the next patch, reading a u64
> value from the object (w/o requiring the o
== Series Details ==
Series: series starting with [1/3] drm/i915/gem: split gem_create into own file
URL : https://patchwork.freedesktop.org/series/85875/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separa
== Series Details ==
Series: series starting with [1/3] drm/i915/gem: split gem_create into own file
URL : https://patchwork.freedesktop.org/series/85875/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b246ef5eb0cb drm/i915/gem: split gem_create into own file
-:25: WARNING:FILE_
== Series Details ==
Series: series starting with [CI,1/5] drm/i915: Mark up protected uses of
'i915_request_completed'
URL : https://patchwork.freedesktop.org/series/85871/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19359
Quoting Matthew Auld (2021-01-14 18:24:02)
> Give more flexibility to the caller, if they already have an allocated
> object, in case they wish to apply some transformation to the object
> prior to handing it over to the region specific initialisation step,
> like in gem_create_ext where we would l
Quoting Matthew Auld (2021-01-14 18:24:01)
> Depending on the regions min_page_size we might need to adjust the
> object size, ensure this matches our expectations.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
-Chris
Quoting Matthew Auld (2021-01-14 18:24:00)
> In preparation for gem_create_ext break out the gem_create uAPI, so that
> we don't clutter i915_gem.c once we start adding various extensions
>
> Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
-Chris
___
From: Ville Syrjälä
Move the g4x+ DP code into a new file. This will leave mostly
platform agnostic code in intel_dp.c. Well, the misplaced phy
test stuff pretty much ruins that, but let's squint real hard
for now.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/Makefile
From: Ville Syrjälä
I accidentally added the compliance test hacks only to
intel_dp_hotplug() which doesn't even get used on any DDI
platform. Put the same crap into intel_ddi_hotplug().
Cc: Imre Deak
Fixes: 193af12cd681 ("drm/i915: Shove the PHY test into the hotplug work")
Signed-off-by: Vill
From: Ville Syrjälä
Most of intel_dp_encoder_reset() is for pre-ddi platforms.
Make a clean split.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 11 ++-
drivers/gpu/drm/i915/display/intel_dp.c | 5 ++---
drivers/gpu/drm/i915/display/intel_dp.h | 1 -
3
From: Ville Syrjälä
intel_dp_program_link_training_pattern() clearly belongs in
intel_dp_link_training.c. Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 33 ---
drivers/gpu/drm/i915/display/intel_dp.h | 4 ---
.../drm/i915/di
From: Ville Syrjälä
If we ever get here with bogus signal levels we've messed
up somewhere earlier. Just use MISSIN_CASE().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
From: Ville Syrjälä
If we ever get here with TPS3 then intel_dp_training_pattern()
is just broken. Replace the creful fallback with just
MISSING_CASE().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions
From: Ville Syrjälä
Currently we claim to use TPS7 when using TPS4. That is just
confusing, so let's fix the debug print.
And while we're touching this let's add the customary
encoder id/name as well.
v2: Add MISSING_CASE() (Manasi)
Reviewed-by: Manasi Navare
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
In keeping with current trends, let's try to clean up
intel_dp.c a bit.
Ville Syrjälä (7):
drm/i915: Fix the training pattern debug print
drm/i915: Remove dead TPS3->TPS2 fallback code
drm/i915: Remove dead signal level debugs
drm/i915: Relocate intel_dp_program_link_
== Series Details ==
Series: series starting with [CI,1/5] drm/i915: Mark up protected uses of
'i915_request_completed'
URL : https://patchwork.freedesktop.org/series/85871/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won
== Series Details ==
Series: drm-buf: Add debug option (rev2)
URL : https://patchwork.freedesktop.org/series/85813/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9612 -> Patchwork_19358
Summary
---
**SUCCESS**
No
From: Radhakrishna Sripada
Render Decompression is supported with Y-Tiled main surface. The CCS is
linear and has 4 bits of data for each main surface cache line pair, a
ratio of 1:256. Additional Clear Color information is passed from the
user-space through an offset in the GEM BO. Add a new mod
From: Radhakrishna Sripada
Gen12 display can decompress surfaces compressed by render engine with
Clear Color, add a new modifier as the driver needs to know the surface
was compressed by render engine.
V2: Description changes as suggested by Rafael.
V3: Mention the Clear Color size of 64 bits i
This is v7 of [1] addressing the review comments from Chris and Nanley.
Tested on TGL and DG1.
[1] https://patchwork.freedesktop.org/series/84183/
Cc: Nanley G Chery
Cc: Chris Wilson https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Add a simple helper to read data with the CPU from the page of a GEM
object. Do the read either via a kmap if the object has struct pages
or an iomap otherwise. This is needed by the next patch, reading a u64
value from the object (w/o requiring the obj to be mapped to the GPU).
Suggested by Chris
== Series Details ==
Series: drm-buf: Add debug option (rev2)
URL : https://patchwork.freedesktop.org/series/85813/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9406d53d49b1 drm-buf: Add debug option
-:64: ERROR:POINTER_LOCATION: "foo * bar" should be "foo *bar"
#64: FILE: dri
== Series Details ==
Series: series starting with [1/2] drm/i915: Add DEBUG_GEM to the recommended
CI config
URL : https://patchwork.freedesktop.org/series/85869/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9611 -> Patchwork_19357
===
== Series Details ==
Series: series starting with [1/2] drm/i915: Add DEBUG_GEM to the recommended
CI config
URL : https://patchwork.freedesktop.org/series/85869/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2ab1c85e3427 drm/i915: Add DEBUG_GEM to the recommended CI config
01
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/selftests: Exercise relative
mmio paths to non-privileged registers
URL : https://patchwork.freedesktop.org/series/85865/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9607_full -> Patchwork_19354_full
==
Depending on the regions min_page_size we might need to adjust the
object size, ensure this matches our expectations.
Suggested-by: Chris Wilson
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/
Give more flexibility to the caller, if they already have an allocated
object, in case they wish to apply some transformation to the object
prior to handing it over to the region specific initialisation step,
like in gem_create_ext where we would like to first apply the extensions
to the object.
S
In preparation for gem_create_ext break out the gem_create uAPI, so that
we don't clutter i915_gem.c once we start adding various extensions
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_create.c | 111 +
Hi Chris,
> > > diff --git a/drivers/gpu/drm/i915/i915_request.c
> > > b/drivers/gpu/drm/i915/i915_request.c
> > > index 0b1a46a0d866..784c05ac5cca 100644
> > > --- a/drivers/gpu/drm/i915/i915_request.c
> > > +++ b/drivers/gpu/drm/i915/i915_request.c
> > > @@ -276,7 +276,7 @@ static void remove_f
On Thu, 2021-01-14 at 09:12 +0200, Jani Nikula wrote:
> On Wed, 13 Jan 2021, Lyude Paul wrote:
> > Currently, every different type of backlight hook that i915 supports is
> > pretty straight forward - you have a backlight, probably through PWM
> > (but maybe DPCD), with a single set of platform-sp
On Wed, Jan 13, 2021 at 02:09:25PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä
>
> If VRR is enabled, DRRS cannot be enabled, so make this check
> in atomic check.
Signed-off-by: Ville Syrjälä
if we want to keep this as a separete patch.
> ---
> drivers/gpu/drm/i915/display/intel_dp.c
== Series Details ==
Series: drm/i915/gt: Reapply ppgtt enabling after engine resets
URL : https://patchwork.freedesktop.org/series/85864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9606_full -> Patchwork_19353_full
Summ
On Wed, 2021-01-13 at 20:03 +, Patchwork wrote:
Patch Details
Series: drm/i915/dg1: Apply WA 1409120013 and 14011059788
URL:https://patchwork.freedesktop.org/series/85807/
State: success
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19333/index.html
CI Bug Log - chang
On Thu, Jan 14, 2021 at 01:13:55PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> Migrate this code out like the skylake code.
>
> !!! FIXME: Dave's s-o-b !!!
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c| 119 +++
On Thu, Jan 14, 2021 at 01:13:54PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> This moves the older i9xx/vlv/chv enable/disable to dpll file.
>
> !!! FIXME: Dave's s-o-b !!!
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c
On Thu, Jan 14, 2021 at 01:13:53PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> There is no need for this to be out of line.
>
> Signed-off-by: Dave Airlie
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8
>
On Thu, Jan 14, 2021 at 01:13:50PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> Rework the plane init calls to do the gen test one level higher.
>
> Rework some of the plane helpers so they can live in new file,
> there is still some scope to clean up the plane/fb interactions
> later.
>
>
== Series Details ==
Series: drm/i915: Add DEBUG_GEM to the recommended CI config
URL : https://patchwork.freedesktop.org/series/85868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9608 -> Patchwork_19356
Summary
---
On Thu, Jan 14, 2021 at 01:13:49PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> Daniel asked for this, but it's a bit messy and I'm not sure
> how best to clean it up yet.
>
> Signed-off-by: Dave Airlie
> [Jani: also moved fdi buf trans to intel_fdi.c.]
> Signed-off-by: Jani Nikula
I gue
On Thu, Jan 14, 2021 at 01:13:48PM +0200, Jani Nikula wrote:
> From: Dave Airlie
>
> Ville suggested this, these tables are probably better being
> standalone.
>
> This fixes up the cnl/bxt interfaces to be like the others,
> the intel one I left alone since it has a few extra entrypoints.
>
>
On Thu, Jan 14, 2021 at 05:22:36PM +0800, Lee Shawn C wrote:
> There are two CSC on pipeline on gen11 and later platform.
> User space application is allowed to enable CTM and RGB
> to YCbCr coversion at the same time now.
>
> Cc: Ville Syrjala
> Cc: Imre Deak
> Cc: Jani Nikula
> Cc: Cooper Chi
Hi Chris,
On Wed, Jan 13, 2021 at 12:45:58PM +, Chris Wilson wrote:
> As context-in/out is now always serialised, we do not have to worry
> about concurrent enabling/disable of the busy-stats and can reduce the
> atomic_t active to a plain unsigned int, and the seqlock to a seqcount.
>
> Sign
Hi Dave & Daniel,
Here is the first PR for v5.12. There are quite a few patches
accumulated after the holidays as usual:
Most importantly there are fixes to the clear residual security
mitigations to avoid GPU hangs caused by them. Further there is
option to allow the user to decide to disable su
Chris Wilson writes:
> Remove the extraneous inlines. The only split by the compiler that
> looked dubious was execlists_schedule_out, so push the code around
> slightly to move all the work into the out-of-line function.
>
> In a normal build, bloat-o-meter shows that only the
> execlists_schedu
On Thu, Jan 14, 2021 at 09:27:35AM +0200, Jani Nikula wrote:
> On Mon, 11 Jan 2021, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Let's not enable the 4:4:4->4:2:0 conversion bit in the DFP unless we're
> > actually outputting YCbCr 4:4:4. It would appear some protocol
> > converters blind
== Series Details ==
Series: rebased refactor of intel_display
URL : https://patchwork.freedesktop.org/series/85867/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9607 -> Patchwork_19355
Summary
---
**FAILURE**
Se
== Series Details ==
Series: drm/i915: support two CSC module on gen11 and later
URL : https://patchwork.freedesktop.org/series/85847/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9605_full -> Patchwork_19352_full
Summary
Originally, we used the signal->lock as a means of following the
previous link in its timeline and peeking at the previous fence.
However, we have replaced the explicit serialisation with a series of
very careful probes that anticipate the links being deleted and the
fences recycled before we are a
When cloning the engines from the source context, we need to ensure that
the engines are not freed as we copy them, and that the flags we clone
from the source correspond with the engines we copy across. To do this
we need only take a reference to the src->engines, rather than hold the
src->engine_
Take a snapshot of the ctx->engines, so we can avoid taking the
ctx->engines_mutex for a mere read in get_engines().
Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 39 +
1 file changed, 8 insertions(+), 31 deletions(-)
Avoid the full blown memory barrier of test_and_set_bit() by noting the
completed request and removing it from the lists.
Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_request.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --gi
When we know that we are inside the timeline mutex, or inside the
submission flow (under active.lock or the holder's rcu lock), we know
that the rq->hwsp is stable and we can use the simpler direct version.
Signed-off-by: Chris Wilson
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_ge
== Series Details ==
Series: drm/i915/selftests: Exercise relative mmio paths to non-privileged
registers
URL : https://patchwork.freedesktop.org/series/85841/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9605_full -> Patchwork_19350_full
== Series Details ==
Series: rebased refactor of intel_display
URL : https://patchwork.freedesktop.org/series/85867/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/
== Series Details ==
Series: rebased refactor of intel_display
URL : https://patchwork.freedesktop.org/series/85867/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
604e87846b3b drm/i915: refactor some crtc code out of intel display. (v2)
-:32: WARNING:FILE_PATH_CHANGES: added, m
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/selftests: Exercise relative
mmio paths to non-privileged registers
URL : https://patchwork.freedesktop.org/series/85865/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9607 -> Patchwork_19354
On 05/01/2021 15:34, Maarten Lankhorst wrote:
Instead of sharing pages with breadcrumbs, give each timeline a
single page. This allows unrelated timelines not to share locks
any more during command submission.
As an additional benefit, seqno wraparound no longer requires
i915_vma_pin, which mea
Quoting Andi Shyti (2021-01-14 03:01:15)
> Hi Chris,
>
> > diff --git a/drivers/gpu/drm/i915/i915_request.c
> > b/drivers/gpu/drm/i915/i915_request.c
> > index 0b1a46a0d866..784c05ac5cca 100644
> > --- a/drivers/gpu/drm/i915/i915_request.c
> > +++ b/drivers/gpu/drm/i915/i915_request.c
> > @@ -276
== Series Details ==
Series: drm/i915/gt: Reapply ppgtt enabling after engine resets
URL : https://patchwork.freedesktop.org/series/85864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9606 -> Patchwork_19353
Summary
--
Quoting Andi Shyti (2021-01-14 03:02:25)
> Hi Chris,
>
> On Wed, Jan 13, 2021 at 12:45:57PM +, Chris Wilson wrote:
> > Lift the busy-stats context-in/out implementation out of intel_lrc, so
> > that we can reuse it for other scheduler implementations.
> >
> > Signed-off-by: Chris Wilson
> >
While immensely convenient for developing to only tackle the first
error, and not be flooded by repeated or secondiary issues, many more
casual testers are not setup to remotely capture debug traces. For those
testers, it is more beneficial to keep the system running in the remote
chance that they
Now that i915 compiles cleanly with Werror, we can enforce enabling
DEBUG_GEM when selecting the default debug config.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/Kconfig.debug | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i91
Now that i915 compiles cleanly with Werror, we can enforce enabling
DEBUG_GEM when selecting the default debug config.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
---
drivers/gpu/drm/i915/Kconfig.debug | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i91
Hi
Am 14.01.21 um 01:31 schrieb Stephen Rothwell:
Hi all,
After merging the drm-misc tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/gpu/drm/drm_cache.c: In function 'drm_need_swiotlb':
drivers/gpu/drm/drm_cache.c:202:6: error: implicit declaration of function
From: Dave Airlie
Migrate this code out like the skylake code.
!!! FIXME: Dave's s-o-b !!!
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/i9xx_plane.c| 119 +++
drivers/gpu/drm/i915/display/i9xx_plane.h| 4 +
drivers/gpu/drm/i915/display/intel_display.c
From: Dave Airlie
This moves the older i9xx/vlv/chv enable/disable to dpll file.
!!! FIXME: Dave's s-o-b !!!
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 512 ---
drivers/gpu/drm/i915/display/intel_display.h | 3 -
drivers/gpu/drm/i915/displa
On Thu, 14 Jan 2021, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [01/11] drm/i915: refactor some crtc code out of
> intel display. (v2)
> URL : https://patchwork.freedesktop.org/series/85846/
> State : failure
>
> == Summary ==
>
> Applying: drm/i915: refactor some
From: Dave Airlie
Daniel suggested this should move here.
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crtc.c | 230
drivers/gpu/drm/i915/display/intel_sprite.c | 228 ---
2 file
From: Dave Airlie
There is no need for this to be out of line.
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 8
drivers/gpu/drm/i915/display/intel_display.h | 1 -
drivers/gpu/drm/i915/display/intel_display_types.
From: Dave Airlie
This just cleans these up a bit.
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_sprite.c| 7 +++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++--
2 files changed, 5 insertions(+
From: Dave Airlie
Daniel asked for this, but it's a bit messy and I'm not sure
how best to clean it up yet.
Signed-off-by: Dave Airlie
[Jani: also moved fdi buf trans to intel_fdi.c.]
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c | 1 +
drivers/gpu/drm/i915/display
From: Dave Airlie
This just refactors out the fdi code to a separate file.
Signed-off-by: Dave Airlie
[Jani: cleaned up intel_fdi.h a bit.]
Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_disp
From: Dave Airlie
This pulls a large chunk of the pll calculation code out of
intel_display.c to a new file.
One function makes sense to be an inline, otherwise this
is pretty much a straight copy cover. Also all the
remaining hooks for g45 and older end up the same now.
Signed-off-by: Dave Air
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