Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend specific.
v2: An overabundance of caution is
Now that we no longer switch back and forth between guc and execlists,
we no longer need to restore the backend's vfunc and can leave them set
after initialisation. The only catch is that we lose the submission on
wedging and still need to reset the submit_request vfunc on unwedging.
== Series Details ==
Series: Oops with "ALSA: jack: implement software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86597/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9719_full -> Patchwork_19565_full
== Series Details ==
Series: drm/i915: Remove notion of GEM from i915_gem_shrinker_taints_mutex
URL : https://patchwork.freedesktop.org/series/86586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9718_full -> Patchwork_19560_full
== Series Details ==
Series: series starting with [CI,01/13] Oops with "ALSA: jack: implement
software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86599/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9719 -> Patchwork_19566
== Series Details ==
Series: series starting with [CI,01/13] Oops with "ALSA: jack: implement
software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86599/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used,
== Series Details ==
Series: series starting with [CI,01/13] Oops with "ALSA: jack: implement
software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86599/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
27bd3e4245a9 Oops with "ALSA: jack: implement
== Series Details ==
Series: Oops with "ALSA: jack: implement software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86597/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9719 -> Patchwork_19565
== Series Details ==
Series: Oops with "ALSA: jack: implement software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86597/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
05f71ab54209 Oops with "ALSA: jack: implement software jack injection via
From: Takashi Iwai
On Tue, 02 Feb 2021 17:30:36 +0100,
Chris Wilson wrote:
>
> commit 2d670ea2bd53 ("ALSA: jack: implement software jack injection via
> debugfs") is causing issues for our CI as we see a use-after-free on
> module unload (on all machines):
>
>
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend specific.
v2: An overabundance of caution is
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend. It already
operates on the common structs, so just a matter of moving and renaming.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
Now that we no longer switch back and forth between guc and execlists,
we no longer need to restore the backend's vfunc and can leave them set
after initialisation. The only catch is that we lose the submission on
wedging and still need to reset the submit_request vfunc on unwedging.
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still unsightly.
Signed-off-by: Chris Wilson
Reviewed-by:
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 225 ++
1 file changed, 225 insertions(+)
diff --git
Looking to the future, we want to set the scheduling attributes
explicitly and so replace the generic engine->schedule() with the more
direct i915_request_set_priority()
What it loses in removing the 'schedule' name from the function, it
gains in having an explicit entry point with a stated goal.
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify a potential fix.
Signed-off-by: Chris
Make the ability to suspend and resume a request and its dependents
generic.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 167 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 8 +-
In anticipation of wanting to be able to call pi from underneath an
engine's active.lock, rework the priority inheritance to primarily work
along an engine's priority queue, delegating any other engine that the
chain may traverse to a worker. This reduces the global spinlock from
governing the
The core of the scheduling algorithm is that we compute the topological
order of the fence DAG. Knowing that we have a DAG, we should be able to
use a DFS to compute the topological sort in linear time. However,
during the conversion of the recursive algorithm into an iterative one,
the
Lift the ability to defer a request until later from execlists into the
common layer.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 57 +++--
drivers/gpu/drm/i915/i915_scheduler.c | 63 +--
== Series Details ==
Series: series starting with [CI,1/3] *** HAX FOR CI *** Revert "rtc: mc146818:
Detect and handle broken RTCs"
URL : https://patchwork.freedesktop.org/series/86596/
State : failure
== Summary ==
Applying: *** HAX FOR CI *** Revert "rtc: mc146818: Detect and handle broken
Hi Chris,
On Mon, Feb 01, 2021 at 04:42:22PM +, Chris Wilson wrote:
> We have not seen an occurrence of the false restart state recenty, and if
> we did such an event from inside engine-reset, it would deadlock on
> trying to suspend the tasklet to read the register state. Instead, we
>
Quoting Chris Wilson (2021-02-02 21:24:16)
> Quoting Chris Wilson (2021-02-02 21:14:35)
> > Quoting Chris Wilson (2021-02-02 17:43:53)
> > > Let's see how horrible it is to cycle elements on defer. (Curse the
> > > irqlock pollution.)
> >
> > While that did work. I do not have a good idea on how
Quoting Chris Wilson (2021-02-02 21:14:35)
> Quoting Chris Wilson (2021-02-02 17:43:53)
> > Let's see how horrible it is to cycle elements on defer. (Curse the
> > irqlock pollution.)
>
> While that did work. I do not have a good idea on how to do list
> rotation on an RCU list. I can see that it
From: Takashi Iwai
On Tue, 02 Feb 2021 17:30:36 +0100,
Chris Wilson wrote:
>
> commit 2d670ea2bd53 ("ALSA: jack: implement software jack injection via
> debugfs") is causing issues for our CI as we see a use-after-free on
> module unload (on all machines):
>
>
From: Takashi Iwai
On Tue, 02 Feb 2021 17:30:36 +0100,
Chris Wilson wrote:
>
> commit 2d670ea2bd53 ("ALSA: jack: implement software jack injection via
> debugfs") is causing issues for our CI as we see a use-after-free on
> module unload (on all machines):
>
>
From: Joonas Lahtinen
---
integration-manifest | 40
1 file changed, 40 insertions(+)
create mode 100644 integration-manifest
diff --git a/integration-manifest b/integration-manifest
new file mode 100644
index ..d80099bceaa5
--- /dev/null
From: Jani Nikula
This reverts commit 211e5db19d15a721b2953ea54b8f26c2963720eb.
---
drivers/rtc/rtc-cmos.c | 8
drivers/rtc/rtc-mc146818-lib.c | 7 ---
2 files changed, 15 deletions(-)
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index
Quoting Chris Wilson (2021-02-02 17:43:53)
> Let's see how horrible it is to cycle elements on defer. (Curse the
> irqlock pollution.)
While that did work. I do not have a good idea on how to do list
rotation on an RCU list. I can see that it must require a pair of
synchronize_rcu, and that
Quoting Umesh Nerlige Ramappa (2021-02-02 20:10:44)
> On Tue, Feb 02, 2021 at 08:24:15AM +, Chris Wilson wrote:
> >Ok, this looks as compact and readable as writing it as a bunch of
> >tables. I presume there's a reason you didn't just use generation rather
> >than platform.
> >
> >switch
On Tue, Feb 02, 2021 at 08:24:15AM +, Chris Wilson wrote:
Quoting Umesh Nerlige Ramappa (2021-02-02 07:54:15)
Validity of an OA format is checked by using a sparse array of formats
per gen. Instead maintain a mask of supported formats for a platform in
the perf object.
Signed-off-by: Umesh
Hi all,
Commit
44c5bd08518c ("*** HAX FOR CI *** Revert "rtc: mc146818: Detect and handle
broken RTCs"")
is missing a Signed-off-by from its author and committer.
Reverts are commits as well.
--
Cheers,
Stephen Rothwell
pgpKZp048c5Hl.pgp
Description: OpenPGP digital signature
== Series Details ==
Series: Revert "ALSA: jack: implement software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86590/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9718 -> Patchwork_19563
Chris Wilson writes:
> Instead of copying the whole table to each category (mocs, l3cc), use a
> single table with a pointer to it if the category is enabled.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/selftest_mocs.c | 32
== Series Details ==
Series: Revert "ALSA: jack: implement software jack injection via debugfs"
URL : https://patchwork.freedesktop.org/series/86590/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6adf76b93ea8 Revert "ALSA: jack: implement software jack injection via debugfs"
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove notion of GEM from
i915_gem_shrinker_taints_mutex
URL : https://patchwork.freedesktop.org/series/86587/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9718 -> Patchwork_19561
== Series Details ==
Series: series starting with [CI,01/14] drm/i915/gt: Move engine setup out of
set_default_submission (rev2)
URL : https://patchwork.freedesktop.org/series/86585/
State : failure
== Summary ==
Applying: drm/i915/gt: Move engine setup out of set_default_submission
Chris Wilson writes:
> The name very often may be freed independently of the fence, with the
> only protection being RCU. To be safe as we read the names, hold RCU.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_sw_fence.c | 2 ++
> 1 file
== Series Details ==
Series: drm/i915: Remove notion of GEM from i915_gem_shrinker_taints_mutex
URL : https://patchwork.freedesktop.org/series/86586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9718 -> Patchwork_19560
Quoting Tvrtko Ursulin (2021-02-02 16:52:18)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > live_timeslice_rewind assumes a particular traversal and reordering
> > after the first timeslice yield. However, the outcome can be either
> > (A1, A2, B1) or (A1, B2, A2) depending on the path taken
Quoting Tvrtko Ursulin (2021-02-02 16:44:26)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > + err = 0;
> > + count = 0;
> > + for_each_uabi_engine(engine, i915) {
> > + if (!intel_engine_has_scheduler(engine))
> > + continue;
> > +
> > +
On 02/02/2021 15:14, Chris Wilson wrote:
live_timeslice_rewind assumes a particular traversal and reordering
after the first timeslice yield. However, the outcome can be either
(A1, A2, B1) or (A1, B2, A2) depending on the path taken through the
dependency graph. So if we do not get the
On 02/02/2021 15:14, Chris Wilson wrote:
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify
On 02/02/2021 15:14, Chris Wilson wrote:
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 225 ++
1 file changed, 225 insertions(+)
On 02/02/2021 16:15, Chris Wilson wrote:
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend
This reverts commit 2d670ea2bd53a9792f453bb5b97cb8ef695988ff.
---
Documentation/sound/designs/index.rst | 1 -
.../sound/designs/jack-injection.rst | 166 --
include/sound/core.h | 6 -
include/sound/jack.h | 1 -
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend specific.
v2: An overabundance of caution is
On Tue, Feb 02, 2021 at 08:59:20AM +, Surendrakumar Upadhyay, TejaskumarX
wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: 02 February 2021 12:42
> > To: Surendrakumar Upadhyay, TejaskumarX
> >
> > Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom
> >
> >
Quoting Chris Wilson (2021-02-02 15:53:41)
> Quoting Tvrtko Ursulin (2021-02-02 15:49:59)
> >
> > On 02/02/2021 15:14, Chris Wilson wrote:
> > > The different submission backends each have their own preferred
> > > behaviour and interrupt setup. Let each handle their own interrupts.
> > >
> > >
Quoting Tvrtko Ursulin (2021-02-02 15:49:59)
>
> On 02/02/2021 15:14, Chris Wilson wrote:
> > The different submission backends each have their own preferred
> > behaviour and interrupt setup. Let each handle their own interrupts.
> >
> > This becomes more useful later as we to extract the use
On 02/02/2021 15:14, Chris Wilson wrote:
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend
On Tue, 02 Feb 2021, Imre Deak wrote:
> Hi,
>
> On Tue, Feb 02, 2021 at 09:15:18AM +0200, Jani Nikula wrote:
>> On Mon, 18 Jan 2021, Jani Nikula wrote:
>> > The following commits have been marked as Cc: stable or fixing something
>> > in v5.11-rc4 or earlier, but failed to cherry-pick to
>> >
Since we dropped the use of dev->struct_mutex from inside the shrinker,
we no longer include that as part of our fs_reclaim tainting. We can
drop the i915 argument and rebrand it as a generic fs_reclaim tainter.
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
After calling lock_set_subclass() the lock _must_ be used, or else
lockdep's internal nr_used_locks becomes unbalanced. Extract the little
utility function to i915_utils.c
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 13 +
On Tue, 2021-02-02 at 15:29 +, Chris Wilson wrote:
> Since we dropped the use of dev->struct_mutex from inside the
> shrinker,
> we no longer include that as part of our fs_reclaim tainting. We can
> drop the i915 argument and rebrand it as a generic fs_reclaim
> tainter.
>
> Signed-off-by:
Since we dropped the use of dev->struct_mutex from inside the shrinker,
we no longer include that as part of our fs_reclaim tainting. We can
drop the i915 argument and rebrand it as a generic fs_reclaim tainter.
Signed-off-by: Chris Wilson
Cc: Thomas Hellström
---
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify a potential fix.
Signed-off-by: Chris
The different submission backends each have their own preferred
behaviour and interrupt setup. Let each handle their own interrupts.
This becomes more useful later as we to extract the use of auxiliary
state in the interrupt handler that is backend specific.
Signed-off-by: Chris Wilson
---
Looking to the future, we want to set the scheduling attributes
explicitly and so replace the generic engine->schedule() with the more
direct i915_request_set_priority()
What it loses in removing the 'schedule' name from the function, it
gains in having an explicit entry point with a stated goal.
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 225 ++
1 file changed, 225 insertions(+)
diff --git
Make the ability to suspend and resume a request and its dependents
generic.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 167 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 8 +-
The core of the scheduling algorithm is that we compute the topological
order of the fence DAG. Knowing that we have a DAG, we should be able to
use a DFS to compute the topological sort in linear time. However,
during the conversion of the recursive algorithm into an iterative one,
the
live_timeslice_rewind assumes a particular traversal and reordering
after the first timeslice yield. However, the outcome can be either
(A1, A2, B1) or (A1, B2, A2) depending on the path taken through the
dependency graph. So if we do not get the outcome we need at first, give
it a priority kick
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend. It already
operates on the common structs, so just a matter of moving and renaming.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still unsightly.
Signed-off-by: Chris Wilson
Reviewed-by:
The current implementation of walking the children of a deferred
requests lacks the backtracking required to reduce the dfs to linear.
Having pulled it from execlists into the common layer, we can reuse the
dfs code for priority inheritance.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko
In anticipation of wanting to be able to call pi from underneath an
engine's active.lock, rework the priority inheritance to primarily work
along an engine's priority queue, delegating any other engine that the
chain may traverse to a worker. This reduces the global spinlock from
governing the
Lift the ability to defer a request until later from execlists into the
common layer.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../drm/i915/gt/intel_execlists_submission.c | 57 +++--
drivers/gpu/drm/i915/i915_scheduler.c | 63 +--
Now that we no longer switch back and forth between guc and execlists,
we no longer need to restore the backend's vfunc and can leave them set
after initialisation. The only catch is that we lose the submission on
wedging and still need to reset the submit_request vfunc on unwedging.
On Fri, 2021-01-29 at 11:45 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v14,1/2] drm/i915/display: Support PSR
> Multiple Instances
> URL : https://patchwork.freedesktop.org/series/86445/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch
Hi,
On Tue, Feb 02, 2021 at 09:15:18AM +0200, Jani Nikula wrote:
> On Mon, 18 Jan 2021, Jani Nikula wrote:
> > The following commits have been marked as Cc: stable or fixing something
> > in v5.11-rc4 or earlier, but failed to cherry-pick to
> > drm-intel-fixes. Please see if they are worth
On 01/02/2021 08:56, Chris Wilson wrote:
The current implementation of walking the children of a deferred
requests lacks the backtracking required to reduce the dfs to linear.
Having pulled it from execlists into the common layer, we can reuse the
dfs code for priority inheritance.
Quoting Jani Nikula (2021-02-02 13:19:13)
> On Mon, 01 Feb 2021, Lucas De Marchi wrote:
> > Hi Rodrigo/Jani,
> >
> > Here are the changes to add basic Alder Lake S support in the driver, with
> > patches touching both generic parts, gt and display. Remaining changes don't
> > need a topic branch
On 02/02/2021 13:26, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-02-02 13:15:52)
On 01/02/2021 08:56, Chris Wilson wrote:
+void __i915_sched_resume_request(struct intel_engine_cs *engine,
+ struct i915_request *rq)
+{
+ LIST_HEAD(list);
+
+
Quoting Jani Nikula (2021-02-02 14:37:00)
>
> Hi Joonas -
>
> This is Thomas's drm_device.pdev removal for i915, the first three
> patches from [1]. Let's merge to both drm-intel-next and
> drm-intel-gt-next.
This is now merged.
Regards, Joonas
> Zhenyu & Zhi, FYI, this touches gvt too, and
Quoting Tvrtko Ursulin (2021-02-02 13:15:52)
>
> On 01/02/2021 08:56, Chris Wilson wrote:
> > Make the ability to suspend and resume a request and its dependents
> > generic.
> > +bool __i915_sched_suspend_request(struct intel_engine_cs *engine,
> > + struct
Quoting Tvrtko Ursulin (2021-02-02 13:15:52)
>
> On 01/02/2021 08:56, Chris Wilson wrote:
> > +void __i915_sched_resume_request(struct intel_engine_cs *engine,
> > + struct i915_request *rq)
> > +{
> > + LIST_HEAD(list);
> > +
> > +
On 01/02/2021 08:56, Chris Wilson wrote:
Lift the ability to defer a request until later from execlists into the
common layer.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 57 +++--
drivers/gpu/drm/i915/i915_scheduler.c | 63
On 01/02/2021 08:56, Chris Wilson wrote:
Make the ability to suspend and resume a request and its dependents
generic.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 167 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 8 +-
On 01/02/2021 08:56, Chris Wilson wrote:
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still
On Thu, 28 Jan 2021, Thomas Zimmermann wrote:
> V6 of the patchset fixes i915/selftests to do the assigment of pdev
> in a later patch. This was forgotten in v5.
>
> The pdev field in struct drm_device points to a PCI device structure and
> goes back to UMS-only days when all DRM drivers were for
Hi Joonas -
This is Thomas's drm_device.pdev removal for i915, the first three
patches from [1]. Let's merge to both drm-intel-next and
drm-intel-gt-next.
Zhenyu & Zhi, FYI, this touches gvt too, and it was getting a bit too
complicated to handle all the components separately. Hopefully you
Hi Dave and Daniel,
here's this week's PR for drm-misc-fixes. There are 3 patches for the
bridge code and one for TTM.
Best regards
Thomas
drm-misc-fixes-2021-02-02:
* drm/bridge/lontium-lt9611uxc: EDID fixes; Don't handle hotplug
events in IRQ handler
* drm/ttm: Use _GFP_NOWARN for huge
Quoting Tvrtko Ursulin (2021-02-02 12:03:02)
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > b/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > index 5d7fac383add..9304a35384aa 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
> > +++
On 01/02/2021 08:56, Chris Wilson wrote:
Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h | 8 +++-
On 01/02/2021 08:56, Chris Wilson wrote:
Now that we no longer switch back and forth between guc and execlists,
we no longer need to restore the backend's vfunc and can leave them set
after initialisation. The only catch is that we lose the submission on
wedging and still need to reset the
On Tue, 02 Feb 2021, Chris Wilson wrote:
> Quoting Jani Nikula (2021-02-02 07:15:18)
>> On Mon, 18 Jan 2021, Jani Nikula wrote:
>> > The following commits have been marked as Cc: stable or fixing something
>> > in v5.11-rc4 or earlier, but failed to cherry-pick to
>> > drm-intel-fixes. Please
== Series Details ==
Series: series starting with [1/3] i915/perf: Store a mask of valid OA formats
for a platform
URL : https://patchwork.freedesktop.org/series/86558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9714_full -> Patchwork_19558_full
On Mon, 01 Feb 2021, Lucas De Marchi wrote:
> Hi Rodrigo/Jani,
>
> Here are the changes to add basic Alder Lake S support in the driver, with
> patches touching both generic parts, gt and display. Remaining changes don't
> need a topic branch anymore and can be applied individually to each
On Tue, 02 Feb 2021, Ville Syrjala wrote:
> From: Andres Calderon Jaramillo
>
> Prevent the ICL HDR plane pipeline from performing YUV color range
> correction twice when the input is in limited range. This is done by
> removing the limited-range code from icl_program_input_csc().
>
> Before
Chris Wilson writes:
> As soon as we mark a request as completed, it may be retired. So when
> cancelling a request and marking it complete, make sure we first keep a
> reference to the request.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
>
> -Original Message-
> From: Ville Syrjälä
> Sent: 02 February 2021 12:42
> To: Surendrakumar Upadhyay, TejaskumarX
>
> Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH during
> suspend/resume
>
> On Tue, Feb
== Series Details ==
Series: series starting with [1/3] i915/perf: Store a mask of valid OA formats
for a platform
URL : https://patchwork.freedesktop.org/series/86558/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9714 -> Patchwork_19558
== Series Details ==
Series: drm/i915/display: Prevent double YUV range correction on HDR planes
(rev3)
URL : https://patchwork.freedesktop.org/series/84966/
State : failure
== Summary ==
Applying: drm/i915/display: Prevent double YUV range correction on HDR planes
Using index info to
From: Andres Calderon Jaramillo
Prevent the ICL HDR plane pipeline from performing YUV color range
correction twice when the input is in limited range. This is done by
removing the limited-range code from icl_program_input_csc().
Before this patch the following could happen: user space gives us
Quoting Jani Nikula (2021-02-02 07:15:18)
> On Mon, 18 Jan 2021, Jani Nikula wrote:
> > The following commits have been marked as Cc: stable or fixing something
> > in v5.11-rc4 or earlier, but failed to cherry-pick to
> > drm-intel-fixes. Please see if they are worth backporting, and please do
>
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