Add check for object size to return appropriate error -E2BIG or -EINVAL
to avoid WARM_ON and sucessfull return for some testcase.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Anand Moon
---
VLK-17702: Since these object size is U64 these corner case will not come
into real test senario.
Hi
Am 09.02.21 um 11:54 schrieb Daniel Vetter:
*: vmwgfx is the only non-gem driver, but there's plans to move at least
vmwgfx internals (maybe not the uapi, we'll see) over to gem. Once that's
done it's truly all gpu memory.
Do you have a URL to the discussion?
While I recent worked on GEM,
== Series Details ==
Series: Revert "drm/atomic: document and enforce rules around "spurious" EBUSY"
URL : https://patchwork.freedesktop.org/series/86927/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9754_full -> Patchwork_19647_full
> -Original Message-
> From: Lyude Paul
> Sent: Wednesday, February 10, 2021 1:34 AM
> To: Deak, Imre ; Surendrakumar Upadhyay, TejaskumarX
> ; Gupta, Anshuman
>
> Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH
for
'v3d_cache_clean_sched_ops.timedout_job')
Caused by commit
c10983e14e8f ("drm/scheduler: Job timeout handler returns status (v3)")
I have used the drm-misc tree from next-20210209 for today.
--
Cheers,
Stephen Rothwell
pgpOuXq244HYz.pgp
Description: OpenPGP digital
== Series Details ==
Series: Revert "drm/atomic: document and enforce rules around "spurious" EBUSY"
URL : https://patchwork.freedesktop.org/series/86927/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9754 -> Patchwork_19647
== Series Details ==
Series: drm/i915/gen9_bc: Add TGP PCH support
URL : https://patchwork.freedesktop.org/series/86918/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752_full -> Patchwork_19646_full
Summary
---
== Series Details ==
Series: drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
(rev2)
URL : https://patchwork.freedesktop.org/series/86773/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9752_full -> Patchwork_19645_full
This reverts commit fb6473a48b635c55d04eb94e579eede52ef39550.
These additional checks added to avoid EBUSY give unnecessary WARN_ON
in case of big joiner used in i915 in which case even if the modeset
is requested on a single pipe, internally another consecutive
pipe is stolen and used to drive
Quoting Hans de Goede (2021-02-09 11:46:46)
> Hi,
>
> On 2/9/21 12:27 AM, Chris Wilson wrote:
> > Quoting Hans de Goede (2021-02-08 20:38:58)
> >> Hi All,
> >>
> >> We (Fedora) have been receiving reports from multiple users about gfx
> >> issues / glitches
> >> stating with 5.10.9. All
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Rename
for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL : https://patchwork.freedesktop.org/series/86910/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752_full ->
== Series Details ==
Series: drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entries
URL : https://patchwork.freedesktop.org/series/86908/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752_full -> Patchwork_19643_full
== Series Details ==
Series: drm/i915/gen9_bc: Add TGP PCH support
URL : https://patchwork.freedesktop.org/series/86918/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19646
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
(rev2)
URL : https://patchwork.freedesktop.org/series/86773/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19645
Next, let's start introducing the HPD pin mappings for Intel's new gen9_bc
platform in order to make hotplugging display connectors work. Since
gen9_bc is just a TGP PCH along with a CML CPU, except with the same HPD
mappings as ICL, we simply add a skl_hpd_pin function that is shared
between gen9
Apparently the new gen9_bc platforms that Intel has introduced don't
provide us with a STRAP config register to read from for initializing DDI
B, C, and D detection. So, workaround this by hard-coding our strap config
in intel_setup_outputs().
Changes since v4:
* Split this into it's own commit
With the introduction of gen9_bc, where Intel combines Cometlake CPUs with
a Tigerpoint PCH, we'll need to introduce new DDC pin mappings for this
platform in order to make all of the display connectors work. So, let's do
that.
Changes since v4:
* Split this into it's own patch - vsyrjala
Cc:
Since Intel has introduced the gen9_bc platform, a combination of
Tigerpoint PCHs and CML CPUs, let's recognize such platforms as valid and
avoid WARNing on them.
Changes since v4:
* Split this into it's own patch - vsyrjala
Cc: Matt Roper
Cc: Jani Nikula
Cc: Ville Syrjala
[originally from
This is to add basic support for Intel's new gen9_bc platform, which
consists of a combination of a TGP PCH along with a CML CPU. This is
also a continuation of the work from Tejaskumar Surendrakumar Upadhyay
with the various review comments addressed.
Lyude Paul (4):
drm/i915/gen9_bc:
== Series Details ==
Series: drm/i915/debugfs : PM_REQ and PM_RES registers (rev4)
URL : https://patchwork.freedesktop.org/series/85437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752_full -> Patchwork_19642_full
== Series Details ==
Series: series starting with [1/3] drm/i915: Disallow plane x+w>stride on ilk+
with X-tiling
URL : https://patchwork.freedesktop.org/series/86882/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9747_full -> Patchwork_19637_full
Right now CI is blacklisting module reload, so we need to be able to
enable PSR2 selective fetch in run time to test this feature before
enable it by default.
Changes in IGT will also be needed.
v2:
- Fixed handling of I915_PSR_DEBUG_ENABLE_SEL_FETCH in
intel_psr_debug_set()
Cc: Gwan-gyeong Mun
On Tue, Feb 09, 2021 at 09:42:38AM -0800, José Roberto de Souza wrote:
> Set the right BW buddy page mask for new memory types.
>
> BSpec: 49218
> Cc: Clint Taylor
> Cc: Matt Roper
> Cc: Lucas De Marchi
> Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
> ---
>
..snip.. (comments down below)
On Tue, 2021-02-02 at 18:14 +0200, Imre Deak wrote:
>
> BSpec says about this WA for both ICL and TGL:
> """
> Display driver should set and clear register offset 0xC2000 bit #7 as
> last step in programming south display registers in preparation for
> entering
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Rename
for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL : https://patchwork.freedesktop.org/series/86910/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19644
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Rename
for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL : https://patchwork.freedesktop.org/series/86910/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
== Series Details ==
Series: series starting with [1/4] drm/i915/display: Rename
for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr
URL : https://patchwork.freedesktop.org/series/86910/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1edc3ad07376
== Series Details ==
Series: drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entries
URL : https://patchwork.freedesktop.org/series/86908/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19643
Summary
This will set the right value of source_support when the port
encoder/port supports PSR but sink don't.
This change will also be needed in future for panel replay as psr
struct needs to be initialized even if disconnected or current sink
don't support PSR.
Cc: Gwan-gyeong Mun
Signed-off-by:
There is no support for two pipes one transcoder for PSR and if we had
that the current code should not use cpu_transcoder.
Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch is
set and PSR is not enabled and if by a bug it happens PSR HW will just
ignore any value in set in
If source_support is set the platform supports PSR so no need to check
it again at every CAN_PSR().
Also removing the intel_dp_is_edp() calls, if sink_support is set
the sink connected is for sure a eDP panel.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
for_each_intel_encoder.*_"can_psr" sounds strange, in my opinion
"with_psr" is better.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.h | 4 ++--
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 +++---
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Create stolen memory region
from local memory
URL : https://patchwork.freedesktop.org/series/86895/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9750_full -> Patchwork_19641_full
Chris Wilson writes:
> The heartbeat runs through a few phases that we expect to complete
> within a certain number of heartbeat intervals. First we must submit the
> heartbeat to the queue, and if the queue is occupied it may take a
> couple of intervals before the heartbeat preempts the
Set the right BW buddy page mask for new memory types.
BSpec: 49218
Cc: Clint Taylor
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 8
1 file changed, 8 insertions(+)
diff --git
Re-reported.
-Original Message-
From: Imre Deak
Sent: Tuesday, February 9, 2021 4:31 AM
To: intel-gfx@lists.freedesktop.org; Souza, Jose ; Vudum,
Lakshminarayana
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/tgl+: Make sure TypeC FIA is
powered up when initializing it
On Mon, Feb
== Series Details ==
Series: drm/i915/tgl+: Make sure TypeC FIA is powered up when initializing it
URL : https://patchwork.freedesktop.org/series/86858/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9747_full -> Patchwork_19631_full
== Series Details ==
Series: drm/i915/debugfs : PM_REQ and PM_RES registers (rev4)
URL : https://patchwork.freedesktop.org/series/85437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9752 -> Patchwork_19642
Summary
---
== Series Details ==
Series: series starting with [1/3] drm/i915: Disallow plane x+w>stride on ilk+
with X-tiling
URL : https://patchwork.freedesktop.org/series/86882/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9747 -> Patchwork_19637
On Tue, Feb 9, 2021 at 4:41 PM Ville Syrjälä
wrote:
> On Tue, Feb 09, 2021 at 11:07:53AM +0100, Daniel Vetter wrote:
> > On Thu, Feb 04, 2021 at 04:04:00AM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > drm_vblank_restore() exists because certain power saving states
> > > can
Hi,
On 2/9/21 12:27 AM, Chris Wilson wrote:
> Quoting Hans de Goede (2021-02-08 20:38:58)
>> Hi All,
>>
>> We (Fedora) have been receiving reports from multiple users about gfx issues
>> / glitches
>> stating with 5.10.9. All reporters are users of Ivy Bridge / Haswell iGPUs
>> and all
>>
On 08/02/2021 16:19, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-02-08 15:23:17)
On 08/02/2021 10:52, Chris Wilson wrote:
static struct list_head *
lookup_priolist(struct i915_sched *se, int prio)
{
- struct i915_priolist *p;
- struct rb_node **parent, *rb;
- bool
On Tue, Feb 09, 2021 at 11:07:53AM +0100, Daniel Vetter wrote:
> On Thu, Feb 04, 2021 at 04:04:00AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > drm_vblank_restore() exists because certain power saving states
> > can clobber the hardware frame counter. The way it does this is
> >
On Tue, Feb 09, 2021 at 11:15:23AM +0100, Daniel Vetter wrote:
> I got real badly confused when trying to review a fix from Ville for
> this. Let's try to document better what's required for this, and check
> the minimal settings at runtime - we can't check ofc that there's
> indeed no races in
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Create stolen memory region
from local memory
URL : https://patchwork.freedesktop.org/series/86895/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9750 -> Patchwork_19641
On Tue, Feb 09, 2021 at 09:22:09AM +, Chris Wilson wrote:
> Quoting Ville Syrjala (2021-02-09 02:19:16)
> > From: Ville Syrjälä
> >
> > ilk+ planes get notably unhappy when the plane x+w exceeds
> > the stride. This wasn't a problem previously because we
> > always aligned SURF to the
On Tue, Feb 09, 2021 at 03:22:09AM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/3] drm/i915: Disallow plane x+w>stride on
> ilk+ with X-tiling
> URL : https://patchwork.freedesktop.org/series/86882/
> State : failure
>
> == Summary ==
>
> CI Bug Log -
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Create stolen memory region
from local memory
URL : https://patchwork.freedesktop.org/series/86895/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Create stolen memory region
from local memory
URL : https://patchwork.freedesktop.org/series/86895/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e8b34b3c94ee drm/i915: Create stolen memory region from local
== Series Details ==
Series: drm/i915/display: fix spelling mistake "Couldnt" -> "Couldn't" (rev2)
URL : https://patchwork.freedesktop.org/series/86637/
State : failure
== Summary ==
Applying: drm/i915/display: Fix spelling mistake "Couldnt" -> "Couldn't"
Using index info to reconstruct a
On Tue, Feb 09, 2021 at 04:44:12PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 09, 2021 at 09:50:28AM +, Chris Wilson wrote:
> > Quoting Chris Wilson (2021-02-09 09:22:09)
> > > Quoting Ville Syrjala (2021-02-09 02:19:16)
> > > > + while ((src_x + src_w) * cpp >
> > > >
On Tue, Feb 09, 2021 at 09:50:28AM +, Chris Wilson wrote:
> Quoting Chris Wilson (2021-02-09 09:22:09)
> > Quoting Ville Syrjala (2021-02-09 02:19:16)
> > > + while ((src_x + src_w) * cpp >
> > > plane_state->color_plane[0].stride) {
> > > + if (offset ==
> -Original Message-
> From: S, Saichandana
> Sent: Tuesday, February 9, 2021 7:02 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; ch...@chris-wilson.co.uk; Gupta,
> Anshuman
> Subject: [PATCH v5] drm/i915/debugfs : PCU PM_REQ and PM_RES registers
I would have kept the
This debugfs provides the display PM debug information like Time
to Next VBI and Time to Next Fill from Display Engine <-> PCU Mailbox.
V2:
Added a functional print to debugfs. [Jani Nikula]
V3:
Used separate variables to store the register values and also
used REG_GENMASK and REG_BIT for mask
On Mon, Feb 08, 2021 at 10:43:14PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl+: Make sure TypeC FIA is powered up when initializing it
> URL : https://patchwork.freedesktop.org/series/86858/
> State : failure
Thanks for the review pushed to -din. The failure is
== Series Details ==
Series: drm/vblank: Document drm_crtc_vblank_restore constraints
URL : https://patchwork.freedesktop.org/series/86888/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9747_full -> Patchwork_19639_full
From: CQ Tang
Stolen memory is always allocated as physically contiguous pages, mark
the object flags as such.
Signed-off-by: CQ Tang
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git
Underneath it's the same stuff, so things like the PTE_LM bits for the
GTT should just keep working as-is.
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
From: CQ Tang
Since stolen can now be device local-memory underneath, we should try to
enforce any min_page_size restrictions when allocating pages.
v2: Drop the min_page_size sanity checking around
stolen_insert_node_in_range. Given that this is a low-level interface we
shouldn't just assume
From: CQ Tang
Add "REGION_STOLEN" device info to dg1, create stolen memory
region from upper portion of local device memory, starting
from DSMBASE.
v2:
- s/drm_info/drm_dbg; userspace likely doesn't care about stolen.
- mem->type is only setup after the region probe, so setting the name
Quoting Hans de Goede (2021-02-09 11:46:46)
> Hi,
>
> On 2/9/21 12:27 AM, Chris Wilson wrote:
> > Quoting Hans de Goede (2021-02-08 20:38:58)
> >> Hi All,
> >>
> >> We (Fedora) have been receiving reports from multiple users about gfx
> >> issues / glitches
> >> stating with 5.10.9. All
From: Colin Ian King
There is a spelling mistake in a drm_dbg message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
Hi,
On 2/9/21 12:27 AM, Chris Wilson wrote:
> Quoting Hans de Goede (2021-02-08 20:38:58)
>> Hi All,
>>
>> We (Fedora) have been receiving reports from multiple users about gfx issues
>> / glitches
>> stating with 5.10.9. All reporters are users of Ivy Bridge / Haswell iGPUs
>> and all
>>
From this CI warning log, there are all known warning message in i915 driver
and is not caused by my patch.
Warning 1:
<3> [69.081809] [drm:wa_verify [i915]] *ERROR* engine workaround lost on
application! (reg[b004]=0x0, relevant bits were 0x0 vs expected 0x80)
Warning 2:
<3> [619.188270]
== Series Details ==
Series: drm/vblank: Document drm_crtc_vblank_restore constraints
URL : https://patchwork.freedesktop.org/series/86888/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9747 -> Patchwork_19639
Summary
On 08/02/2021 20:55, Dave Airlie wrote:
On Mon, 8 Feb 2021 at 20:53, Chris Wilson wrote:
Re-enable secure dispatch for gen6/gen7, primarily to workaround the
command parser and overly zealous command validation on Haswell. For
example this prevents making accurate measurements using a
On Tue, Jan 26, 2021 at 01:46:25PM -0800, Brian Welty wrote:
> This patch adds tracking of which cgroup to make charges against for a
> given GEM object. We associate the current task's cgroup with GEM objects
> as they are created. First user of this is for charging DRM cgroup for
> device
== Series Details ==
Series: drm/vblank: Document drm_crtc_vblank_restore constraints
URL : https://patchwork.freedesktop.org/series/86888/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
37b0a64a8211 drm/vblank: Document drm_crtc_vblank_restore constraints
-:81:
On 09/02/2021 10:31, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-02-09 09:37:19)
On 08/02/2021 10:52, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/Kconfig.profile
b/drivers/gpu/drm/i915/Kconfig.profile
index 35bbe2b80596..f1d009906f71 100644
---
Quoting Tvrtko Ursulin (2021-02-09 09:37:19)
>
> On 08/02/2021 10:52, Chris Wilson wrote:
>
> > diff --git a/drivers/gpu/drm/i915/Kconfig.profile
> > b/drivers/gpu/drm/i915/Kconfig.profile
> > index 35bbe2b80596..f1d009906f71 100644
> > --- a/drivers/gpu/drm/i915/Kconfig.profile
> > +++
On Tue, Feb 09, 2021 at 07:39:17AM +0200, Gupta, Anshuman wrote:
> > > > > > [...]
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > > > > > index ae1371c36a32..58af323d189a 100644
> > > > > > ---
I got real badly confused when trying to review a fix from Ville for
this. Let's try to document better what's required for this, and check
the minimal settings at runtime - we can't check ofc that there's
indeed no races in the driver callback.
Also noticed that the drm_vblank_restore version is
On Thu, Feb 04, 2021 at 04:04:00AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_vblank_restore() exists because certain power saving states
> can clobber the hardware frame counter. The way it does this is
> by guesstimating how many frames were missed purely based on
> the
Quoting Chris Wilson (2021-02-09 09:22:09)
> Quoting Ville Syrjala (2021-02-09 02:19:16)
> > + while ((src_x + src_w) * cpp >
> > plane_state->color_plane[0].stride) {
> > + if (offset == 0) {
> > + drm_dbg_kms(_priv->drm,
> > +
Quoting Ville Syrjala (2021-02-09 02:19:18)
> From: Ville Syrjälä
>
> Let's scream if we are about to release a frontbuffer which
> is still in use.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_frontbuffer.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff
Quoting Ville Syrjala (2021-02-09 02:19:16)
> From: Ville Syrjälä
>
> ilk+ planes get notably unhappy when the plane x+w exceeds
> the stride. This wasn't a problem previously because we
> always aligned SURF to the closest tile boundary so the
> x offset never got particularly large. But now
On 08/02/2021 10:52, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/Kconfig.profile
b/drivers/gpu/drm/i915/Kconfig.profile
index 35bbe2b80596..f1d009906f71 100644
--- a/drivers/gpu/drm/i915/Kconfig.profile
+++ b/drivers/gpu/drm/i915/Kconfig.profile
@@ -1,3 +1,65 @@
+choice
+
Quoting Ville Syrjala (2021-02-09 02:19:17)
> From: Ville Syrjälä
>
> We don't have a persistent fb holding a reference to the frontbuffer
> object, so every time we do the get+put we throw the frontbuffer object
> immediately away. And so the next time around we get a pristine
> frontbuffer
patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Paolo-Bonzini/i915-kvmgt-the-KVM-mmu_lock-is-now-an-rwlock/20210209-070812
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64
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