On Thu, 20 Jan 2022, Matthew Brost wrote:
> Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is
> set, before CT write / read as this could result in a read across the
> PCIe bus thus adding latency to every CT write / read. On well behavied
> systems this vaue should always
== Series Details ==
Series: Flush G2H handler during a GT reset
URL : https://patchwork.freedesktop.org/series/99136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5_full -> Patchwork_22051_full
Summary
---
On Fri, Jan 21, 2022 at 01:05:07AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dg2: Add Wa_18018781329
> URL : https://patchwork.freedesktop.org/series/99128/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5 -> Patchwork_22049
>
Hi Matthew,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next v5.16 next-20220121]
[cannot apply to airlied/drm-next]
[If your
== Series Details ==
Series: Flush G2H handler during a GT reset
URL : https://patchwork.freedesktop.org/series/99136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5 -> Patchwork_22051
Summary
---
**SUCCESS**
Hi Matthew,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next v5.16 next-20220121]
[cannot apply to airlied/drm-next]
[If your
== Series Details ==
Series: drm/i915: Introduce G12 subplatform of DG2
URL : https://patchwork.freedesktop.org/series/99129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5_full -> Patchwork_22050_full
Summary
---
== Series Details ==
Series: Flush G2H handler during a GT reset
URL : https://patchwork.freedesktop.org/series/99136/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
After a small fix to error capture code, we now can flush G2H during a
GT reset which simplifies code and seals some extreme corner case races.
v2:
(CI)
- Don't trigger GT reset from G2H handler
v3:
- Address John Harrison's comments
v4:
- Address John Harrison's comments
Signed-off-by:
The G2H handler needs to be flushed during a GT reset but a G2H
indicating engine reset failure can trigger a GT reset. Add a worker to
trigger the GT rest when an engine reset failure is received to break
this circular dependency.
v2:
(John Harrison)
- Store engine reset mask
- Fix typo in
Now that the error capture is fully decoupled from fence signalling
(request retirement to free memory, which in turn depends on resets) we
can safely flush the G2H handler during a GT reset. This eliminates
corner cases where GuC generated G2H (e.g. engine resets) race with a GT
reset.
v2:
Allocate intel_engine_coredump_alloc with ALLOW_FAIL rather than
GFP_KERNEL to fully decouple the error capture from fence signalling.
v2:
(John Harrison)
- Fix typo in commit message (s/do/to)
Fixes: 8b91cdd4f8649 ("drm/i915: Use __GFP_KSWAPD_RECLAIM in the capture code")
Signed-off-by:
On Thu, Jan 20, 2022 at 05:36:22PM -0800, John Harrison wrote:
> On 1/19/2022 13:24, Matthew Brost wrote:
> > Now that the error capture is fully decoupled from fence signalling
> > (request retirement to free memory, which in turn depends on resets) we
> > can safely flush the G2H handler during
On Thu, Jan 20, 2022 at 05:34:54PM -0800, John Harrison wrote:
> On 1/19/2022 13:24, Matthew Brost wrote:
> > The G2H handler needs to be flushed during a GT reset but a G2H
> > indicating engine reset failure can trigger a GT reset. Add a worker to
> > trigger the GT when an engine reset failure
== Series Details ==
Series: Splitting up platform-specific calls
URL : https://patchwork.freedesktop.org/series/99126/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5_full -> Patchwork_22048_full
Summary
---
Hi Matthew,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next
drm/drm-next tegra-drm/drm/tegra/for-next v5.16 next-20220120]
[cannot apply to airlied/drm-next
== Series Details ==
Series: drm/i915/guc: Update guc shim control programming on newer platforms
URL : https://patchwork.freedesktop.org/series/99125/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4_full -> Patchwork_22047_full
On Thu, 20 Jan 2022 17:09:28 -0800, john.c.harri...@intel.com wrote:
>
> From: John Harrison
>
> The capture tests require knowing exactly how big the test allocation
> is. Part of the test is to compare the captured size against the
> allocated size to make sure they match. That doesn't work if
On Wed, 2022-01-19 at 16:00 -0500, Steven Rostedt wrote:
> On Wed, 19 Jan 2022 21:25:08 +0200
> Andy Shevchenko wrote:
>
> > > I say keep it one line!
> > >
> > > Reviewed-by: Steven Rostedt (Google)
> >
> > I believe Sakari strongly follows the 80 rule, which means...
>
> Checkpatch says
== Series Details ==
Series: drm/i915: Introduce G12 subplatform of DG2
URL : https://patchwork.freedesktop.org/series/99129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5 -> Patchwork_22050
Summary
---
On 1/19/2022 13:24, Matthew Brost wrote:
Now that the error capture is fully decoupled from fence signalling
(request retirement to free memory, which in turn depends on resets) we
can safely flush the G2H handler during a GT reset. This is eliminates
This eliminates
John.
corner cases where
On 1/19/2022 13:24, Matthew Brost wrote:
The G2H handler needs to be flushed during a GT reset but a G2H
indicating engine reset failure can trigger a GT reset. Add a worker to
trigger the GT when an engine reset failure is received to break this
trigger the GT reset?
circular dependency.
== Series Details ==
Series: drm/i915: Introduce G12 subplatform of DG2
URL : https://patchwork.freedesktop.org/series/99129/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
From: John Harrison
The capture tests require knowing exactly how big the test allocation
is. Part of the test is to compare the captured size against the
allocated size to make sure they match. That doesn't work if the
allocator creates an object of a different size than was requested
without
== Series Details ==
Series: drm/i915/dg2: Add Wa_18018781329
URL : https://patchwork.freedesktop.org/series/99128/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5 -> Patchwork_22049
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/wopcm: Handle pre-programmed WOPCM registers (rev3)
URL : https://patchwork.freedesktop.org/series/98910/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4_full -> Patchwork_22046_full
== Series Details ==
Series: drm/i915/dg2: Add Wa_18018781329
URL : https://patchwork.freedesktop.org/series/99128/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Splitting up platform-specific calls
URL : https://patchwork.freedesktop.org/series/99126/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5 -> Patchwork_22048
Summary
---
**SUCCESS**
Hi Ramalingam,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next
drm/drm-next next-20220120]
[cannot apply to tegra-drm/drm/tegra/for-next airlied/drm-next v5.16]
[If your
== Series Details ==
Series: A few CT updates
URL : https://patchwork.freedesktop.org/series/99117/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4_full -> Patchwork_22044_full
Summary
---
**SUCCESS**
No
== Series Details ==
Series: Splitting up platform-specific calls
URL : https://patchwork.freedesktop.org/series/99126/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Splitting up platform-specific calls
URL : https://patchwork.freedesktop.org/series/99126/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cfedaf9b9519 i915/drm: Split out x86 and arm64 functionality
-:53: WARNING:FILE_PATH_CHANGES: added, moved or
Another fork of the DG2 design has appeared, known as "DG2-G12;" let's
add it as a new subplatform. As with G11, the GT stepping resets back
to A0 (so a DG2-G12 A0 is similar, but not identical, to a DG2-G10 C0)
but the display steppings continue to use the same numbering scheme as
G10 and G11.
A few more MOD registers need to be programmed on DG2.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++
drivers/gpu/drm/i915/i915_reg.h | 4
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
== Series Details ==
Series: drm/i915/guc: Update guc shim control programming on newer platforms
URL : https://patchwork.freedesktop.org/series/99125/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4 -> Patchwork_22047
== Series Details ==
Series: drm/i915/guc: Update guc shim control programming on newer platforms
URL : https://patchwork.freedesktop.org/series/99125/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0b46254f664d drm/i915/guc: Update guc shim control programming on newer
Some x86 checks are unnecessary on arm64 systems, so they
are being split out to avoid being used. There may be
further arm64 implementations created in the future for
this area, so it's better to split this out now.
Signed-off-by: Casey Bowman
---
drivers/gpu/drm/i915/Makefile |
In this RFC I would like to ask the community their thoughts
on how we can best handle splitting architecture-specific
calls.
I would like to address the following:
1. How do we want to split architecture calls? Different object files
per platform? Separate function calls within the same object
Starting from xehpsdv, bit 0 of of the GuC shim control register has
been repurposed, while bit 2 is now reserved, so we need to avoid
setting those for their old meaning on newer platforms.
Cc: Vinay Belgaumkar
Cc: Stuart Summers
Signed-off-by: Daniele Ceraolo Spurio
---
== Series Details ==
Series: drm/i915/wopcm: Handle pre-programmed WOPCM registers (rev3)
URL : https://patchwork.freedesktop.org/series/98910/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4 -> Patchwork_22046
Summary
== Series Details ==
Series: drm/i915/wopcm: Handle pre-programmed WOPCM registers (rev3)
URL : https://patchwork.freedesktop.org/series/98910/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/wopcm: Handle pre-programmed WOPCM registers (rev3)
URL : https://patchwork.freedesktop.org/series/98910/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0abf9917c5c0 drm/i915/wopcm: Handle pre-programmed WOPCM registers
-:14:
Starting from DG2, some of the programming previously done by i915 and
the GuC has been moved to the GSC and the relevant registers are no
longer writable by either CPU or GuC. This is also referred to as GuC
deprivilege.
On the i915 side, this affects the WOPCM registers: these are no longer
== Series Details ==
Series: discrete card 64K page support
URL : https://patchwork.freedesktop.org/series/99119/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_4 -> Patchwork_22045
Summary
---
**FAILURE**
== Series Details ==
Series: A few CT updates
URL : https://patchwork.freedesktop.org/series/99117/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_4 -> Patchwork_22044
Summary
---
**SUCCESS**
No regressions
== Series Details ==
Series: discrete card 64K page support
URL : https://patchwork.freedesktop.org/series/99119/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: discrete card 64K page support
URL : https://patchwork.freedesktop.org/series/99119/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2ad66084bf0b drm/i915: add needs_compact_pt flag
f2a348f85370 drm/i915: enforce min GTT alignment for discrete cards
On 1/11/2022 08:39, Matthew Brost wrote:
Don't use the interruptable version of the timeline mutex lock in the
error path of eb_pin_timeline as the cleanup must always happen.
v2:
(John Harrison)
- Don't check for interrupt during mutex lock
v3:
(Tvrtko)
- A comment explaining why
On 1/20/2022 11:40 AM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i915/selftests: Don't restart WL for every frequency step
*URL:* https://patchwork.freedesktop.org/series/99109/
*State:*failure
*Details:*
The following changes since commit fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf:
Linux 5.16-rc1 (2021-11-14 13:56:52 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
tags/pci-v5.17-fixes-1
for you to fetch changes up to
add test to check handling of misaligned offsets and sizes
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 130 ++
1 file changed, 130 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
From: Matthew Auld
On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.
v3: fix typos and less emphasis
v2: Fixed suggestions on
From: Matthew Auld
discrete cards optimise 64K GTT pages for local-memory, since everything
should be allocated at 64K granularity. We say goodbye to sparse
entries, and instead get a compact 256B page-table for 64K pages,
which should be more cache friendly. 4K pages for local-memory
are no
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the type of object we are inserting.
With this in mind update the GTT selftests to take this
into
This series continues support for 64K pages for discrete cards.
It supersedes the 64K patches from
https://patchwork.freedesktop.org/series/95686/#rev4
Changes since that series:
- set min alignment for DG2 to 2MB in i915_address_space_init
- replace coloring with simpler 2MB VA alignment for
From: Ramalingam C
Add a new platform flag, needs_compact_pt, to mark the requirement of
compact pt layout support for the ppGTT when using 64K GTT pages.
With this flag has_64k_pages will only indicate requirement of 64K
GTT page sizes or larger for device local memory access.
Suggested-by:
== Series Details ==
Series: drm/i915/selftests: Don't restart WL for every frequency step
URL : https://patchwork.freedesktop.org/series/99109/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_3 -> Patchwork_22043
On Thu, Jan 20, 2022 at 03:31:34AM +, Tolakanahalli Pradeep, Madhumitha
wrote:
On Tue, 2022-01-18 at 13:37 -0800, Lucas De Marchi wrote:
On Thu, Dec 23, 2021 at 03:18:57AM +, Tolakanahalli Pradeep,
Madhumitha wrote:
> On Fri, 2021-12-17 at 21:37 +, Yokoyama, Caz wrote:
> > On Thu,
Reviewed-by: Alan Previn
On Mon, 2022-01-10 at 17:55 -0800, Umesh Nerlige Ramappa wrote:
> All timestamps returned by GuC for GuC PMU busyness are captured from
> GUC PM TIMESTAMP. Since this timestamp does not tick when GuC goes idle,
> kmd uses RING_TIMESTAMP to measure busyness of an engine
On Thu, Jan 20, 2022 at 06:13:47PM +, Teres Alexis, Alan Previn wrote:
> Just one nit below, (assuming that igt CI failure isnt related - kms flip not
> completing)
> Reviewed-by Alan Previn
>
> -Original Message-
> From: Ceraolo Spurio, Daniele
> Sent: Friday, January 14, 2022
On 2022-01-20 at 16:42:52 +, Robert Beckett wrote:
>
>
> On 20/01/2022 16:21, Ramalingam C wrote:
> > Add a new platform flag, needs_compact_pt, to mark the requirement of
> > compact pt layout support for the ppGTT when using 64K GTT pages.
> >
> > With this flag has_64k_pages will only
Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is
set, before CT write / read as this could result in a read across the
PCIe bus thus adding latency to every CT write / read. On well behavied
systems this vaue should always read as zero. For some reason it doesn't
the CT
Noticed that the CT descriptor status was not printed in the CT debug
function, add that in.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
A couple of minor CT updates. 1 for performance, 1 for extra debug.
Signed-off-by: Matthew Brost
Matthew Brost (2):
drm/i915/guc: Don't check CT descriptor status before CT write / read
drm/i915/guc: Print CT descriptor status in CT debug function
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is
set, before CT write / read as this could result in a read across the
PCIe bus thus adding latency to every CT write / read. On well behavied
systems this vaue should always read as zero. For some reason it doesn't
the CT
Just one nit below, (assuming that igt CI failure isnt related - kms flip not
completing)
Reviewed-by Alan Previn
-Original Message-
From: Ceraolo Spurio, Daniele
Sent: Friday, January 14, 2022 11:33 AM
To: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org; Ceraolo
Move spinner start out of the steps loop. If we restart WL for each
freq step, the rapid start/stop causes SLPC algorithm to think that
GT busyness is 50% for it's evaluation interval. This leads to SLPC
not increasing the requested frequency as per the test expectation.
Fixes: 8ee2c227822e
On 19/01/2022 11:37, Arunpravin wrote:
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.
v2(Matthew Auld):
- replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
== Series Details ==
Series: Add driver for GSC controller (rev3)
URL : https://patchwork.freedesktop.org/series/98066/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_2_full -> Patchwork_22041_full
Summary
---
On Thu, Jan 20, 2022 at 04:48:50PM +0100, Daniel Vetter wrote:
> On Thu, Jan 20, 2022 at 09:16:35AM +0100, Christian König wrote:
> > Am 20.01.22 um 00:55 schrieb Ira Weiny:
> > > On Wed, Jan 19, 2022 at 06:24:22PM +0100, Daniel Vetter wrote:
> > > > On Wed, Jan 19, 2022 at 08:53:56AM -0800, Ira
On Wed, Jan 19, 2022 at 7:09 AM Daniel Vetter wrote:
>
> On Thu, Jan 06, 2022 at 04:55:35PM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > Proposal to standardise the fdinfo text format as optionally output by DRM
> > drivers.
> >
> > Idea is that a simple but, well defined, spec
On 20/01/2022 16:21, Ramalingam C wrote:
Add a new platform flag, needs_compact_pt, to mark the requirement of
compact pt layout support for the ppGTT when using 64K GTT pages.
With this flag has_64k_pages will only indicate requirement of 64K
GTT page sizes or larger for device local memory
== Series Details ==
Series: drm/i915: Add needs_compact_pt flag
URL : https://patchwork.freedesktop.org/series/99105/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M]
On 2022-01-20 at 16:09:01 +, Robert Beckett wrote:
>
>
> On 20/01/2022 15:58, Matthew Auld wrote:
> > On 20/01/2022 15:44, Robert Beckett wrote:
> > >
> > >
> > > On 20/01/2022 14:59, Matthew Auld wrote:
> > > > On 20/01/2022 13:15, Robert Beckett wrote:
> > > > >
> > > > >
> > > > > On
On 20/01/2022 16:09, Robert Beckett wrote:
On 20/01/2022 15:58, Matthew Auld wrote:
On 20/01/2022 15:44, Robert Beckett wrote:
On 20/01/2022 14:59, Matthew Auld wrote:
On 20/01/2022 13:15, Robert Beckett wrote:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +,
Add a new platform flag, needs_compact_pt, to mark the requirement of
compact pt layout support for the ppGTT when using 64K GTT pages.
With this flag has_64k_pages will only indicate requirement of 64K
GTT page sizes or larger for device local memory access.
Suggested-by: Matthew Auld
On 20/01/2022 15:58, Matthew Auld wrote:
On 20/01/2022 15:44, Robert Beckett wrote:
On 20/01/2022 14:59, Matthew Auld wrote:
On 20/01/2022 13:15, Robert Beckett wrote:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +, Robert Beckett wrote:
From: Matthew Auld
== Series Details ==
Series: drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch] (rev2)
URL : https://patchwork.freedesktop.org/series/99096/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_2_full -> Patchwork_22040_full
On 20/01/2022 15:44, Robert Beckett wrote:
On 20/01/2022 14:59, Matthew Auld wrote:
On 20/01/2022 13:15, Robert Beckett wrote:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align
== Series Details ==
Series: Add driver for GSC controller (rev3)
URL : https://patchwork.freedesktop.org/series/98066/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_2 -> Patchwork_22041
Summary
---
**SUCCESS**
On Thu, Jan 20, 2022 at 09:16:35AM +0100, Christian König wrote:
> Am 20.01.22 um 00:55 schrieb Ira Weiny:
> > On Wed, Jan 19, 2022 at 06:24:22PM +0100, Daniel Vetter wrote:
> > > On Wed, Jan 19, 2022 at 08:53:56AM -0800, Ira Weiny wrote:
> > > > On Fri, Dec 10, 2021 at 03:23:57PM -0800, 'Ira
On 20/01/2022 14:59, Matthew Auld wrote:
On 20/01/2022 13:15, Robert Beckett wrote:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt
== Series Details ==
Series: Add driver for GSC controller (rev3)
URL : https://patchwork.freedesktop.org/series/98066/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add driver for GSC controller (rev3)
URL : https://patchwork.freedesktop.org/series/98066/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9ad89d8f20ab drm/i915/gsc: add gsc as a mei auxiliary device
-:50: WARNING:FILE_PATH_CHANGES: added, moved or
On 20/01/2022 13:15, Robert Beckett wrote:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support
Add a hook to retrieve the firmware version of the
GSC devices to bus-fixup.
GSC has a different MKHI clients GUIDs but the same message structure
to retrieve the firmware version as MEI so mei_fwver() can be reused.
CC: Ashutosh Dixit
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas
From: Tomas Winkler
Implement runtime handlers for mei-gsc, to track
idle state of the device properly.
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/gsc-me.c | 80 ++-
1 file changed, 79
Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/gsc-me.c | 11 ++-
From: Tomas Winkler
GSC is a graphics system controller, based on CSE, it provides
a chassis controller for graphics discrete cards, as well as it
supports media protection on selected devices.
mei_gsc binds to a auxiliary devices exposed by Intel discrete
driver i915.
Signed-off-by: Alexander
From: Tomas Winkler
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000.
GSC is a GT Engine (class 4: instance 6). HECI1
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
This series includes instantiation of the auxiliary devices for HECI2
and mei-gsc auxiliary device driver that binds to the auxiliary device.
== Series Details ==
Series: drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch] (rev2)
URL : https://patchwork.freedesktop.org/series/99096/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_2 -> Patchwork_22040
== Series Details ==
Series: series starting with [RESEND,1/7] drm/i915/mst: fix
intel_dp_mst_hpd_irq() indentation (rev2)
URL : https://patchwork.freedesktop.org/series/98788/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_1_full -> Patchwork_22037_full
== Series Details ==
Series: drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch] (rev2)
URL : https://patchwork.freedesktop.org/series/99096/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch] (rev2)
URL : https://patchwork.freedesktop.org/series/99096/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
eb1cf9369ca6 drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch]
-:57:
On 20/01/2022 11:46, Ramalingam C wrote:
On 2022-01-18 at 17:50:34 +, Robert Beckett wrote:
From: Matthew Auld
For local-memory objects we need to align the GTT addresses
to 64K, both for the ppgtt and ggtt.
We need to support vm->min_alignment > 4K, depending
on the vm itself and the
== Series Details ==
Series: drm/i915: split out i915_reg_read_ioctl() to i915_ioctl.[ch]
URL : https://patchwork.freedesktop.org/series/99096/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_1 -> Patchwork_22039
Summary
== Series Details ==
Series: drm/i915/mst: DP MST ESI handling improvements (rev2)
URL : https://patchwork.freedesktop.org/series/98479/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_1_full -> Patchwork_22036_full
++
-Original Message-
From: Harrison, John C
Sent: Wednesday, January 19, 2022 9:36 PM
To: Intel-GFX@Lists.FreeDesktop.Org
Cc: dri-de...@lists.freedesktop.org; Harrison, John C
; Cencelewska, Katarzyna
; Ye, Tony ; Jason Ekstrand
; Brost, Matthew
Subject: [PATCH v3 0/2] Add support
On Thu, 20 Jan 2022, Daniel Vetter wrote:
> On Thu, Jan 20, 2022 at 10:49 AM Jani Nikula wrote:
>>
>> The stack_depot member was added without kernel-doc, leading to below
>> warning. Fix it.
>>
>> ./include/drm/drm_modeset_lock.h:74: warning: Function parameter or
>> member 'stack_depot' not
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