== Series Details ==
Series: i915: Add "standalone media" support for MTL (rev5)
URL : https://patchwork.freedesktop.org/series/107908/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12101_full -> Patchwork_107908v5_full
On Thu, Sep 08, 2022 at 09:24:07PM +, Winkler, Tomas wrote:
>
> >
> > On Fri, Aug 19, 2022 at 03:53:22PM -0700, Daniele Ceraolo Spurio wrote:
> > > --- a/drivers/misc/mei/hw-me.c
> > > +++ b/drivers/misc/mei/hw-me.c
> > > @@ -590,7 +590,10 @@ static int mei_me_hbuf_write(struct mei_device
>
Gentle Reminder!
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, September 6, 2022 9:18 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com; Murthy, Arun R
> Subject: [PATCHv3] drm/i915: Support Async Flip on Linear buffers
>
> Starting from Gen12
== Series Details ==
Series: drm/i915: A couple of if/else ladder refactors
URL : https://patchwork.freedesktop.org/series/108315/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12100_full -> Patchwork_108315v1_full
Summary
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/108156/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12102 -> Patchwork_108156v3
Summary
---
== Series Details ==
Series: Tidy up vfio_device life cycle (rev6)
URL : https://patchwork.freedesktop.org/series/107838/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/107838/revisions/6/mbox/ not
applied
Applying: vfio: Add helpers for unifying
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/108156/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: i915: CAGF and RC6 changes for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/108156/
State : warning
== Summary ==
Error: dim checkpatch failed
fe6011b91b65 drm/i915: Prepare more multi-GT initialization
-:79: CHECK:COMPARISON_TO_NULL: Comparison to
> From: Jason Gunthorpe
> Sent: Thursday, September 8, 2022 8:37 PM
>
> On Thu, Sep 08, 2022 at 11:39:07AM +0200, Eric Auger wrote:
>
> > >> I am not totally clear about remaining 'struct device *dev;' in
> > >> vfio_device struct. I see it used in some places. Is it supposed to
> > >> disappear
From: Yi Liu
and replace kref. With it a 'vfio-dev/vfioX' node is created under the
sysfs path of the parent, indicating the device is bound to a vfio
driver, e.g.:
/sys/devices/pci\:6f/\:6f\:01.0/vfio-dev/vfio0
It is also a preparatory step toward adding cdev for supporting future
With the addition of vfio_put_device() now the names become confusing.
vfio_put_device() is clear from object life cycle p.o.v given kref.
vfio_device_put()/vfio_device_try_get() are helpers for tracking
users on a registered device.
Now rename them:
- vfio_device_put() ->
ccw is the only exception which cannot use vfio_alloc_device() because
its private device structure is designed to serve both mdev and parent.
Life cycle of the parent is managed by css_driver so vfio_ccw_private
must be allocated/freed in css_driver probe/remove path instead of
conforming to vfio
Implement amba's own vfio_device_ops.
Remove vfio_platform_probe/remove_common() given no user now.
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
Reviewed-by: Eric Auger
---
drivers/vfio/platform/vfio_amba.c | 72 ++-
From: Yi Liu
and manage mdpy_count inside @init/@release.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
samples/vfio-mdev/mdpy.c | 81 +++-
1 file changed, 47 insertions(+), 34 deletions(-)
diff --git
Move vfio_device_ops from platform core to platform drivers so device
specific init/cleanup can be added.
Introduce two new helpers vfio_platform_init/release_common() for the
use in driver @init/@release.
vfio_platform_probe/remove_common() will be deprecated.
Signed-off-by: Kevin Tian
Move vfio_device to the start of intel_vgpu as required by the new
helpers.
Change intel_gvt_create_vgpu() to use intel_vgpu as the first param
as other vgpu helpers do.
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
Reviewed-by: Zhenyu Wang
---
drivers/gpu/drm/i915/gvt/gvt.h | 5
From: Yi Liu
Also add a comment to mark that vfio core releases device_set if @init
fails.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
drivers/vfio/fsl-mc/vfio_fsl_mc.c | 85 ++-
1 file changed, 49 insertions(+), 36
From: Yi Liu
and manage avail_mbytes inside @init/@release.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
samples/vfio-mdev/mbochs.c | 73 --
1 file changed, 46 insertions(+), 27 deletions(-)
diff --git
From: Yi Liu
mlx5 has its own @init/@release for handling migration cap.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
drivers/vfio/pci/mlx5/main.c | 50 ++--
1 file changed, 36 insertions(+), 14 deletions(-)
diff --git
From: Yi Liu
and manage available_instances inside @init/@release.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Tony Krowiak
Reviewed-by: Jason Gunthorpe
---
drivers/s390/crypto/vfio_ap_ops.c | 50 ++-
1 file changed, 29 insertions(+), 21
From: Yi Liu
and manage available ports inside @init/@release.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
samples/vfio-mdev/mtty.c | 67 +++-
1 file changed, 39 insertions(+), 28 deletions(-)
diff --git
The idea is to let vfio core manage the vfio_device life cycle instead
of duplicating the logic cross drivers. This is also a preparatory
step for adding struct device into vfio_device.
New pair of helpers together with a kref in vfio_device:
- vfio_alloc_device()
- vfio_put_device()
Drivers
The idea is to let vfio core manage the vfio_device life cycle instead
of duplicating the logic cross drivers. Besides cleaner code in driver
side this also allows adding struct device to vfio_device as the first
step toward adding cdev uAPI in the future. Another benefit is that
user can now look
From: Yi Liu
Tidy up @probe so all migration specific initialization logic is moved
to migration specific @init callback.
Remove vfio_pci_core_{un}init_device() given no user now.
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
Reviewed-by: Shameer Kolothum
---
From: Yi Liu
Also introduce two pci core helpers as @init/@release for pci drivers:
- vfio_pci_core_init_dev()
- vfio_pci_core_release_dev()
Signed-off-by: Yi Liu
Signed-off-by: Kevin Tian
Reviewed-by: Jason Gunthorpe
---
drivers/vfio/pci/vfio_pci.c | 20 +-
From: Don Hiatt
On GEN12, use the correct GEN12 RPSTAT register mask/shift.
HSD: 1409538411
Cc: Don Hiatt
Cc: Andi Shyti
Signed-off-by: Don Hiatt
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 5
From: Matt Roper
The common early GT init is needed for initialization of all GT types
(root/primary, remote tile, standalone media). Since standalone media
(coming in the next patch) will be implemented in a separate file,
rename and expose the function for use.
Signed-off-by: Matt Roper
From: Matt Roper
Xe_LPM+ platforms have "standalone media." I.e., the media unit is
designed as an additional GT with its own engine list, GuC, forcewake,
etc. Let's allow platforms to include media GTs in their device info.
Cc: Aravind Iddamsetty
Signed-off-by: Matt Roper
---
Updated the CAGF functions to get actual resolved frequency of
3D and SAMedia
Bspec: 66300
Cc: Vinay Belgaumkar
Cc: Ashutosh Dixit
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 8
drivers/gpu/drm/i915/gt/intel_rps.c | 7 ++-
2 files changed, 14
For MTL SAMedia updated relevant functions and places in the code to get
Media C6 residency.
Cc: Vinay Belgaumkar
Cc: Ashutosh Dixit
Cc: Chris Wilson
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 56 +++
From: Matt Roper
We're going to introduce an additional intel_gt for MTL's media unit
soon. Let's provide a bit more multi-GT initialization framework in
preparation for that. The initialization will pull the list of GTs for
a platform from the device info structure. Although necessary for
This series includes the code changes to get CAGF, RC State and
C6 Residency of MTL. The series depends on:
https://patchwork.freedesktop.org/series/107908/
We have included 3 patches from from the above series as part of this
series in order for this series to compile. These are the first 3
== Series Details ==
Series: drm/i915: Move skl+ wm code into its own file
URL : https://patchwork.freedesktop.org/series/108313/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12100_full -> Patchwork_108313v1_full
Summary
> From: Eric Farman
> Sent: Friday, September 9, 2022 4:51 AM
>
> On Thu, 2022-09-08 at 07:19 +, Tian, Kevin wrote:
> > ping @Eric Farman.
> >
> > ccw is the only tricky player in this series. Please help take a look
> > in case of
> > any oversight here.
>
> Apologies, I had started looking
== Series Details ==
Series: drm/i915: HuC loading for DG2 (rev3)
URL : https://patchwork.freedesktop.org/series/107477/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: HuC loading for DG2 (rev3)
URL : https://patchwork.freedesktop.org/series/107477/
State : warning
== Summary ==
Error: dim checkpatch failed
489f4c218bd4 mei: add support to GSC extended header
727f7def9db4 mei: bus: enable sending gsc commands
I've submitted a merge request to have those flags turned on by default
in our CI builds:
https://gitlab.freedesktop.org/gfx-ci/i915-infra/-/merge_requests/116
Daniele
On 9/8/2022 5:16 PM, Daniele Ceraolo Spurio wrote:
Both are required for HuC loading.
Signed-off-by: Daniele Ceraolo Spurio
Both are required for HuC loading.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig.debug | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug
b/drivers/gpu/drm/i915/Kconfig.debug
index e7fd3e76f8a2..a6576ffbc4dc 100644
---
Wait on the fence to be signalled to avoid the submissions finding HuC
not yet loaded.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Tony Ye
Reviewed-by: Alan Previn
---
drivers/gpu/drm/i915/gt/uc/intel_huc.h | 6 ++
drivers/gpu/drm/i915/i915_request.c| 24
2
Given that HuC load is delayed on DG2, this patch adds support for a fence
that can be used to wait for load completion. No waiters are added in this
patch (they're coming up in the next one), to keep the focus of the
patch on the tracking logic.
The full HuC loading flow on boot DG2 is as
From: Vitaly Lubart
Command to be sent via the stream interface are written to a local
memory page, whose address is then provided to the GSC.
The interface supports providing a full sg with multiple pages for both
input and output messages, but since for now we only aim to support short
and
The mei_pxp module is required to send the command to load authenticate
the HuC to the GSC even if pxp is not in use for protected content
management.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
Reviewed-by: Alan Previn
---
drivers/gpu/drm/i915/Makefile| 10 +++---
From: Tomas Winkler
Add support for loading HuC via a pxp stream command.
V4:
1. Remove unnecessary include in intel_pxp_huc.h (Jani)
2. Adjust copyright year to 2022
Signed-off-by: Tomas Winkler
Signed-off-by: Vitaly Lubart
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
The current HuC status getparam return values are a bit confusing in
regards to what happens in some scenarios. In particular, most of the
error cases cause the ioctl to return an error, but a couple of them,
INIT_FAIL and LOAD_FAIL, are not explicitly handled and neither is
their expected return
From: Tomas Winkler
With on-boards graphics card, both i915 and MEI
are in the same device hierarchy with the same parent,
while for discrete gfx card the MEI is its child device.
Adjust the match function for that scenario
by matching MEI parent device with i915.
V2:
1. More detailed commit
From: Tomas Winkler
GSC command is and extended header containing a scatter gather
list and without a data buffer. Using MEI_CL_IO_SGL flag,
the caller send the GSC command as a data and the function internally
moves it to the extended header.
Signed-off-by: Tomas Winkler
Signed-off-by:
From: Vitaly Lubart
The discrete graphics card with GSC firmware
using command streamer API hence it requires to enhance
pxp module with the new gsc_command() handler.
The handler is implemented via mei_pxp_gsc_command() which is
just a thin wrapper around mei_cldev_send_gsc_command()
V2:
1.
From: Vitaly Lubart
Add mei bus API for sending gsc commands: mei_cldev_send_gsc_command()
The GSC commands are originated in the graphics stack
and are in form of SGL DMA buffers.
The GSC commands are synchronous, the response is received
in the same call on the out sg list buffers.
The
The fw name is different and we need to record the fact that the blob is
gsc-loaded, so add a new macro to help.
Note: A-step DG2 G10 does not support HuC loading via GSC and would
require a separate firmware to be loaded the legacy way, but that's
not a production stepping so we're not going to
The GSC will perform both the load and the authentication, so we just
need to check the auth bit after the GSC has replied.
Since we require the PXP module to load the HuC, the earliest we can
trigger the load is during the pxp_bind operation.
Note that GSC-loaded HuC survives GT reset, so we
From: Tomas Winkler
GSC extend header is of variable size and data
is provided in a sgl list inside the header
and not in the data buffers, need to enable the path.
V2:
1. Add missing kdoc for mei_cl_cb
2. In mei_me_hbuf_write()
use dev_err() when validationg parameters instead of WARN_ON()
From: Tomas Winkler
Fix kdoc for struct mei_ext_hdr and mei_ext_begin().
V4: New in the series
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Cc: Greg Kroah-Hartman
---
drivers/misc/mei/hw.h | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git
On DG2, HuC loading is performed by the GSC, via a PXP command. The load
operation itself is relatively simple (just send a message to the GSC
with the physical address of the HuC in LMEM), but there are timing
changes that requires special attention. In particular, to send a PXP
command we need
Please ignore this cover letter, I've only realized I was missing a
title and aborted the git-send after sending it. Proper series coming in
a couple of mins.
Daniele
On 9/8/2022 5:10 PM, Daniele Ceraolo Spurio wrote:
On DG2, HuC loading is performed by the GSC, via a PXP command. The load
On DG2, HuC loading is performed by the GSC, via a PXP command. The load
operation itself is relatively simple (just send a message to the GSC
with the physical address of the HuC in LMEM), but there are timing
changes that requires special attention. In particular, to send a PXP
command we need
The following changes since commit 2f2f0181581d3e35bfdb9fc65f609ee9d3fbaeb7:
Mellanox: Add new mlxsw_spectrum firmware xx.2010.3146 (2022-09-02 07:28:59
-0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware dg2_huc_7.10.6
for you to fetch changes up
== Series Details ==
Series: drm/i915/dsb: hide struct intel_dsb better
URL : https://patchwork.freedesktop.org/series/108310/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12099_full -> Patchwork_108310v1_full
Summary
== Series Details ==
Series: i915: Add "standalone media" support for MTL (rev5)
URL : https://patchwork.freedesktop.org/series/107908/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12101 -> Patchwork_107908v5
Summary
== Series Details ==
Series: i915: Add "standalone media" support for MTL (rev5)
URL : https://patchwork.freedesktop.org/series/107908/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: i915: Add "standalone media" support for MTL (rev5)
URL : https://patchwork.freedesktop.org/series/107908/
State : warning
== Summary ==
Error: dim checkpatch failed
6c1062d5ca5c drm/i915: Move locking and unclaimed check into
mmio_debug_{suspend, resume}
On Thu, Sep 08, 2022 at 09:32:12PM +0300, Lionel Landwerlin wrote:
On 06/09/2022 23:35, Umesh Nerlige Ramappa wrote:
On Tue, Sep 06, 2022 at 10:48:50PM +0300, Lionel Landwerlin wrote:
On 23/08/2022 23:41, Umesh Nerlige Ramappa wrote:
Some SKUs of same gen12 platform may have different
On 9/8/2022 3:45 PM, Matt Roper wrote:
GT non-engine registers (referred to as "GSI" registers by the spec)
have the same relative offsets on standalone media as they do on the
primary GT, just with an additional "GSI offset" added to their MMIO
address. If we store this GSI offset in the
GT non-engine registers (referred to as "GSI" registers by the spec)
have the same relative offsets on standalone media as they do on the
primary GT, just with an additional "GSI offset" added to their MMIO
address. If we store this GSI offset in the standalone media's
intel_uncore structure, it
On Thu, Sep 08, 2022 at 02:16:27PM -0700, Ceraolo Spurio, Daniele wrote:
>
>
> On 9/6/2022 4:49 PM, Matt Roper wrote:
> > GT non-engine registers (referred to as "GSI" registers by the spec)
> > have the same relative offsets on standalone media as they do on the
> > primary GT, just with an
>
> On Fri, Aug 19, 2022 at 03:53:22PM -0700, Daniele Ceraolo Spurio wrote:
> > --- a/drivers/misc/mei/hw-me.c
> > +++ b/drivers/misc/mei/hw-me.c
> > @@ -590,7 +590,10 @@ static int mei_me_hbuf_write(struct mei_device
> *dev,
> > u32 dw_cnt;
> > int empty_slots;
> >
> > - if
On 9/6/2022 4:49 PM, Matt Roper wrote:
When we hook up interrupts (in the next patch), interrupts for the media
GT are still processed as part of the primary GT's interrupt flow. As
such, we should share the same IRQ lock with the primary GT. Let's
convert gt->irq_lock into a pointer and
On 9/6/2022 4:49 PM, Matt Roper wrote:
GT non-engine registers (referred to as "GSI" registers by the spec)
have the same relative offsets on standalone media as they do on the
primary GT, just with an additional "GSI offset" added to their MMIO
address. If we store this GSI offset in the
== Series Details ==
Series: drm/i915: A couple of if/else ladder refactors
URL : https://patchwork.freedesktop.org/series/108315/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12100 -> Patchwork_108315v1
Summary
---
== Series Details ==
Series: drm/i915: A couple of if/else ladder refactors
URL : https://patchwork.freedesktop.org/series/108315/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: A couple of if/else ladder refactors
URL : https://patchwork.freedesktop.org/series/108315/
State : warning
== Summary ==
Error: dim checkpatch failed
8e2c6bd18bc2 drm/i915: Invert if/else ladder for frequency read
-:120: WARNING:UNNECESSARY_ELSE: else
On 9/6/2022 4:49 PM, Matt Roper wrote:
In preparation for enabling a second GT, there are a number of GT/uncore
operations that happen during initialization or suspend flows that need
to be performed on each GT, not just the primary,
Cc: Daniele Ceraolo Spurio
Signed-off-by: Matt Roper
On 9/6/2022 4:49 PM, Matt Roper wrote:
In a multi-GT system we need to initialize MMIO access for each GT, not
just the primary GT.
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
Daniele
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_driver.c | 27
== Series Details ==
Series: drm/i915/gt: Fix perf limit reasons bit positions (rev2)
URL : https://patchwork.freedesktop.org/series/108277/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12098_full -> Patchwork_108277v2_full
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix a potential UAF at device
unload
URL : https://patchwork.freedesktop.org/series/108314/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12100 -> Patchwork_108314v1
On Thu, Sep 01, 2022 at 11:03:41PM -0700, Radhakrishna Sripada wrote:
> From: Madhumitha Tolakanahalli Pradeep
>
>
> In Display version 14, Transcoder Chicken Registers have updated address.
> This patch performs checks to use the right register when required.
>
> v2: Omit display version
Instead of calling read_clock_frequency() to walk the if/else ladder
per platform, move the ladder to intel_gt_init_clock_frequency() and
use one function per branch.
With the new logic, it's now clear the call to
gen9_get_crystal_clock_freq() was just dead code, as gen9 is handled by
another
Continue converting the driver to the convention of last version first,
extending it to the future platforms. Now, any GRAPHICS_VER >= 11 will
be handled by the first branch.
With the new ranges it's easier to see what platform a branch started to
be taken. Besides the >= 11 change, the branch
Continue converting the driver to the convention of last version first,
extending it to the future platforms. Now, any GRAPHICS_VER >= 11 will
be handled by the first branch.
Signed-off-by: Lucas De Marchi
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
deletions(-)
---
base-commit: adc57f2b82896fed07bc8e34956c15bb1448fca2
change-id: 20220908-if-ladder-df33a06d4f4e
Best regards,
--
Lucas De Marchi
i915_gem_drain_workqueue() call i915_gem_drain_freed_objects()
so no need to call that again.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_gem.c | 2 --
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 -
2 files changed, 3 deletions(-)
diff --git
i915_gem_drain_freed_objects() might not be enough to
free all the objects and RCU delayed work might get
scheduled after the i915 device struct gets freed.
Call i915_gem_drain_workqueue() to catch all RCU delayed work.
Suggested-by: Chris Wilson
Signed-off-by: Nirmoy Das
---
On Thu, Sep 01, 2022 at 11:03:40PM -0700, Radhakrishna Sripada wrote:
> Display version 14 platforms have different credits values
> compared to ADL-P. Update the credits based on pipe usage.
>
> v2: Simplify DBOX BW Credit definition(MattR)
>
> Bspec: 49213
>
> Cc: Jose Roberto de Souza
> Cc:
== Series Details ==
Series: drm/i915: Move skl+ wm code into its own file
URL : https://patchwork.freedesktop.org/series/108313/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12100 -> Patchwork_108313v1
Summary
---
On 9/8/2022 5:11 PM, Ville Syrjälä wrote:
On Thu, Sep 08, 2022 at 04:32:56PM +0200, Das, Nirmoy wrote:
Hi Ville,
I fixed a similar issue in DII but I couldn't reproduce it in drm
http://intel-gfx-pw.fi.intel.com/patch/228850/?series=15910=2.
I wonder if that fixes the problem you are
== Series Details ==
Series: drm/i915: Move skl+ wm code into its own file
URL : https://patchwork.freedesktop.org/series/108313/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Move skl+ wm code into its own file
URL : https://patchwork.freedesktop.org/series/108313/
State : warning
== Summary ==
Error: dim checkpatch failed
eff551e7ad3c drm/i915: Split intel_read_wm_latency() into per-platform versions
129d570bf892 drm/i915:
On 9/8/2022 4:55 PM, Tvrtko Ursulin wrote:
On 08/09/2022 15:32, Das, Nirmoy wrote:
Hi Ville,
I fixed a similar issue in DII but I couldn't reproduce it in drm
http://intel-gfx-pw.fi.intel.com/patch/228850/?series=15910=2.
I wonder if that fixes the problem you are facing then I can send
From: Ville Syrjälä
Replace the hand rolled stuff with REG_FIELD_GET() for reading
out the skl+ watermark latencies.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 22 +++-
drivers/gpu/drm/i915/i915_reg.h | 8 +++
2 files
From: Ville Syrjälä
No reaon to have this humongous if ladder in intel_read_wm_latency().
Just split it into nicer per-platforms functions.
Also do the s/dev_priv/i915/ while touching all of this code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 201
From: Ville Syrjälä
Hoist all the skl+ wm related stuff from intel_pm.c into
its own file.
Ville Syrjälä (3):
drm/i915: Split intel_read_wm_latency() into per-platform versions
drm/i915: Extract skl_watermark.c
drm/i915: Use REG_FIELD_GET() to extract skl+ wm latencies
On 06/09/2022 23:35, Umesh Nerlige Ramappa wrote:
On Tue, Sep 06, 2022 at 10:48:50PM +0300, Lionel Landwerlin wrote:
On 23/08/2022 23:41, Umesh Nerlige Ramappa wrote:
Some SKUs of same gen12 platform may have different oactxctrl
offsets. For gen12, determine oactxctrl offsets at runtime.
On Thu, 08 Sep 2022, Ville Syrjälä wrote:
> On Thu, Sep 08, 2022 at 07:57:02PM +0300, Jani Nikula wrote:
>> struct intel_dsb can be an opaque type, hidden in intel_dsb.c. Make it
>> so. Reduce related includes while at it.
>>
>> Signed-off-by: Jani Nikula
>
> One thing I was mildly worried
On Thu, Sep 01, 2022 at 11:03:38PM -0700, Radhakrishna Sripada wrote:
> From: Imre Deak
>
> On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
> changed wrt. previous platforms, adjust the code accordingly.
>
> Signed-off-by: Imre Deak
> Signed-off-by: Radhakrishna Sripada
As
On Thu, Sep 08, 2022 at 11:07:16AM -0700, Matt Roper wrote:
> On Thu, Sep 01, 2022 at 11:03:37PM -0700, Radhakrishna Sripada wrote:
> > From: Imre Deak
> >
> > Add support for display power wells on MTL. The differences from XE_LPD:
> > - The AUX HW block is moved to the PICA block, where the
On Thu, Sep 01, 2022 at 11:03:37PM -0700, Radhakrishna Sripada wrote:
> From: Imre Deak
>
> Add support for display power wells on MTL. The differences from XE_LPD:
> - The AUX HW block is moved to the PICA block, where the registers are on
> an always-on power well and the functionality needs
On Thu, Sep 01, 2022 at 11:03:36PM -0700, Radhakrishna Sripada wrote:
> Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
> From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
> GPIO_CTL[9-12] are mapped to TC ports.
>
> v2:
> - Drop unused GPIO
On Wed, Sep 07, 2022 at 04:33:17PM -0700, Radhakrishna Sripada wrote:
> From: Matt Roper
>
> The part of the media and blitter engine contexts that we care about for
> setting up an initial state are the same on MTL as they were on DG2
> (and PVC), so we need to update the driver conditions to
On Thu, Sep 08, 2022 at 07:57:02PM +0300, Jani Nikula wrote:
> struct intel_dsb can be an opaque type, hidden in intel_dsb.c. Make it
> so. Reduce related includes while at it.
>
> Signed-off-by: Jani Nikula
One thing I was mildly worried about with dsb is the cost
of creating the batch
== Series Details ==
Series: drm/i915/dsb: hide struct intel_dsb better
URL : https://patchwork.freedesktop.org/series/108310/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12099 -> Patchwork_108310v1
Summary
---
== Series Details ==
Series: drm/i915/dsb: hide struct intel_dsb better
URL : https://patchwork.freedesktop.org/series/108310/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
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