[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: A couple of if/else ladder refactors (rev2)

== Series Details == Series: drm/i915: A couple of if/else ladder refactors (rev2) URL : https://patchwork.freedesktop.org/series/108315/ State : success == Summary == CI Bug Log - changes from CI_DRM_12132_full -> Patchwork_108315v2_full

Re: [Intel-gfx] [topic/core-for-CI] Revert "iommu/dma: Fix race condition during iova_domain initialization"

On 14.09.2022 17:01, Lucas De Marchi wrote: On Wed, Sep 14, 2022 at 02:40:45PM +0200, Karolina Drobnik wrote: This reverts commit ac9a5d522bb80be50ea84965699e1c8257d745ce. This change introduces a regression on Alder Lake that completely blocks testing. To enable CI and avoid possible circular

[Intel-gfx] ✓ Fi.CI.BAT: success for Delay disabling GuC scheduling of an idle context

== Series Details == Series: Delay disabling GuC scheduling of an idle context URL : https://patchwork.freedesktop.org/series/108587/ State : success == Summary == CI Bug Log - changes from CI_DRM_12139 -> Patchwork_108587v1 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Delay disabling GuC scheduling of an idle context

== Series Details == Series: Delay disabling GuC scheduling of an idle context URL : https://patchwork.freedesktop.org/series/108587/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for New GuC and new GuC/HuC names

== Series Details == Series: New GuC and new GuC/HuC names URL : https://patchwork.freedesktop.org/series/108582/ State : success == Summary == CI Bug Log - changes from CI_DRM_12139 -> Patchwork_108582v1 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.BAT: success for Further multi-gt handling

== Series Details == Series: Further multi-gt handling URL : https://patchwork.freedesktop.org/series/108577/ State : success == Summary == CI Bug Log - changes from CI_DRM_12139 -> Patchwork_108577v1 Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Further multi-gt handling

== Series Details == Series: Further multi-gt handling URL : https://patchwork.freedesktop.org/series/108577/ State : warning == Summary == Error: dim checkpatch failed 7cda801d9e36 drm/i915/gt: Cleanup partial engine discovery failures -:43: CHECK:COMPARISON_TO_NULL: Comparison to NULL could

[Intel-gfx] [PATCH 0/1] Delay disabling GuC scheduling of an idle context

This series adds a delay before disabling scheduling of the guc-context when a context has become idle to avoid costly re-registration that may occur immediately after. The 2nd patch should explain it quite well. The origin of this series was posted by Matthew Brost back in Oct 2021

[Intel-gfx] [PATCH 1/1] drm/i915/guc: Delay disabling guc_id scheduling for better hysteresis

From: Matthew Brost Add a delay, configurable via debugfs (default 34ms), to disable scheduling of a context after the pin count goes to zero. Disable scheduling is a costly operation as it requires synchronizing with the GuC. So the idea is that a delay allows the user to resubmit something

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix return type of mode_valid function hook

== Series Details == Series: drm/i915: Fix return type of mode_valid function hook URL : https://patchwork.freedesktop.org/series/108553/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12133_full -> Patchwork_108553v1_full

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths

On 9/14/2022 3:04 PM, Matt Roper wrote: From: Tvrtko Ursulin This, along with the changes already landed in commit 1c66a12ab431 ("drm/i915: Handle each GT on init/release and suspend/resume") makes engines from all GTs actually known to the driver. To accomplish this we need to sprinkle a

Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names

On 9/14/2022 4:46 PM, john.c.harri...@intel.com wrote: From: John Harrison Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms

Re: [Intel-gfx] [PATCH 1/1] drm/i915/guc: Fix release build bug in 'remove log size module parameters'

On 9/12/2022 6:09 PM, john.c.harri...@intel.com wrote: From: John Harrison A patch was merged to remove the GuC log size override module parameters. That patch was broken and caused kernel error messages on boot in non CONFIG_DEBUG_GUC|GEM builds: [ 12.085121] i915 :00:02.0: [drm]

Re: [Intel-gfx] [PATCH 05/19] drm/i915/perf: Enable commands per clock reporting in OA

On Tue, Sep 13, 2022 at 05:19:24PM -0700, Dixit, Ashutosh wrote: On Tue, 23 Aug 2022 13:41:41 -0700, Umesh Nerlige Ramappa wrote: Hi Umesh, XEHPSDV and DG2 provide a way to configure bytes per clock vs commands per clock reporting. Enable command per clock setting on enabling OA. should

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable Pipewriteback (rev4)

== Series Details == Series: Enable Pipewriteback (rev4) URL : https://patchwork.freedesktop.org/series/107440/ State : success == Summary == CI Bug Log - changes from CI_DRM_12132_full -> Patchwork_107440v4_full Summary ---

[Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names

From: John Harrison Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms that are officially GuC/HuC enabled. Also, update the

[Intel-gfx] [PATCH 0/1] New GuC and new GuC/HuC names

From: John Harrison Update the GuC version numbers to expect the latest release. Also start using GuC/HuC firmware files with reduced version information in the file name. Signed-off-by: John Harrison John Harrison (1): drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names

Re: [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode

On Mon, Sep 12, 2022 at 08:08:33PM -0700, Dixit, Ashutosh wrote: On Fri, 09 Sep 2022 16:47:36 -0700, Dixit, Ashutosh wrote: On Tue, 23 Aug 2022 13:41:37 -0700, Umesh Nerlige Ramappa wrote: > Hi Umesh, > With GuC mode of submission, GuC is in control of defining the context id field > that

Re: [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode

On Fri, Sep 09, 2022 at 04:47:36PM -0700, Dixit, Ashutosh wrote: On Tue, 23 Aug 2022 13:41:37 -0700, Umesh Nerlige Ramappa wrote: Hi Umesh, With GuC mode of submission, GuC is in control of defining the context id field that is part of the OA reports. To filter reports, UMD and KMD must

Re: [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode

On Wed, Sep 14, 2022 at 03:26:15PM -0700, Umesh Nerlige Ramappa wrote: On Tue, Sep 06, 2022 at 09:39:33PM +0300, Lionel Landwerlin wrote: On 06/09/2022 20:39, Umesh Nerlige Ramappa wrote: On Tue, Sep 06, 2022 at 05:33:00PM +0300, Lionel Landwerlin wrote: On 23/08/2022 23:41, Umesh Nerlige

Re: [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode

On Tue, Sep 06, 2022 at 09:39:33PM +0300, Lionel Landwerlin wrote: On 06/09/2022 20:39, Umesh Nerlige Ramappa wrote: On Tue, Sep 06, 2022 at 05:33:00PM +0300, Lionel Landwerlin wrote: On 23/08/2022 23:41, Umesh Nerlige Ramappa wrote: With GuC mode of submission, GuC is in control of defining

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: A couple of if/else ladder refactors (rev2)

On Wed, Sep 14, 2022 at 03:34:12PM +, Patchwork wrote: == Series Details == Series: drm/i915: A couple of if/else ladder refactors (rev2) URL : https://patchwork.freedesktop.org/series/108315/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12132_full ->

[Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths

From: Tvrtko Ursulin This, along with the changes already landed in commit 1c66a12ab431 ("drm/i915: Handle each GT on init/release and suspend/resume") makes engines from all GTs actually known to the driver. To accomplish this we need to sprinkle a lot of for_each_gt calls around but is

[Intel-gfx] [PATCH 2/4] drm/i915: Make GEM resume all engines

From: Tvrtko Ursulin Walk all GTs from i915_gem_resume when resuming engines. Cc: Andi Shyti Signed-off-by: Tvrtko Ursulin Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 22 -- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH 3/4] drm/i915: Make GEM suspend all GTs

From: Tvrtko Ursulin Walk all GTs when suspending. Signed-off-by: Tvrtko Ursulin Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c

[Intel-gfx] [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures

From: Chris Wilson If we abort driver initialisation in the middle of gt/engine discovery, some engines will be fully setup and some not. Those incompletely setup engines only have 'engine->release == NULL' and so will leak any of the common objects allocated. Signed-off-by: Chris Wilson Cc:

[Intel-gfx] [PATCH 0/4] Further multi-gt handling

Now that MTL is going to start providing two GTs, there are a few more places in the driver that need to iterate over each GT instead of operating directly on gt0. Also some more deliberate cleanup is needed, in cases where we fail GT/engine initialization after the first GT has been fully setup.

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

> -Original Message- > From: Ville Syrjälä > Sent: Wednesday, September 14, 2022 2:43 PM > To: Srivatsa, Anusha > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to > intel_cdclk_state > > On Thu, Sep 15, 2022 at

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Fix bug in version reduced firmware update (rev2)

On 9/14/2022 10:07, Patchwork wrote: Project List - Patchwork *Patch Details* *Series:* Fix bug in version reduced firmware update (rev2) *URL:* https://patchwork.freedesktop.org/series/108461/ *State:*failure *Details:*

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915: Force compilation with intel-iommu for CI validation"

== Series Details == Series: Revert "drm/i915: Force compilation with intel-iommu for CI validation" URL : https://patchwork.freedesktop.org/series/108576/ State : success == Summary == CI Bug Log - changes from CI_DRM_12136 -> Patchwork_108576v1

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

On Thu, Sep 15, 2022 at 12:22:53AM +0300, Ville Syrjälä wrote: > On Fri, Aug 19, 2022 at 05:58:19PM -0700, Anusha Srivatsa wrote: > > This is a prep patch for what the rest of the series does. > > > > Add existing actions that change cdclk - squash, crawl, modeset to > > intel_cdclk_state so we

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Force compilation with intel-iommu for CI validation"

== Series Details == Series: Revert "drm/i915: Force compilation with intel-iommu for CI validation" URL : https://patchwork.freedesktop.org/series/108576/ State : warning == Summary == Error: dim checkpatch failed e51c64216129 Revert "drm/i915: Force compilation with intel-iommu for CI

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

On Fri, Aug 19, 2022 at 05:58:19PM -0700, Anusha Srivatsa wrote: > This is a prep patch for what the rest of the series does. > > Add existing actions that change cdclk - squash, crawl, modeset to > intel_cdclk_state so we have access to the cdclk values > that are in transition. > > Cc: Jani

Re: [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2

On Wed, 14 Sep 2022 13:54:34 -0700, Umesh Nerlige Ramappa wrote: > > On Tue, Sep 13, 2022 at 08:40:22AM -0700, Dixit, Ashutosh wrote: > > On Tue, 23 Aug 2022 13:41:38 -0700, Umesh Nerlige Ramappa wrote: > >> > >> Add new OA formats for DG2. > > > > Should we change the patch title and commit

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "HAX iommu/intel: Ignore igfx_off"

== Series Details == Series: Revert "HAX iommu/intel: Ignore igfx_off" URL : https://patchwork.freedesktop.org/series/108575/ State : success == Summary == CI Bug Log - changes from CI_DRM_12136 -> Patchwork_108575v1 Summary ---

Re: [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2

On Tue, Sep 13, 2022 at 08:40:22AM -0700, Dixit, Ashutosh wrote: On Tue, 23 Aug 2022 13:41:38 -0700, Umesh Nerlige Ramappa wrote: Add new OA formats for DG2. Should we change the patch title and commit message a bit to 'Add OAR and OAG formats for DG2'? Hmm, I assumed OAR was also part of

[Intel-gfx] [PATCH] Revert "drm/i915: Force compilation with intel-iommu for CI validation"

This reverts commit 9e54866e25e7919ab9704a7680bd8df0c9ee9cdd. To be removed from topic/core-for-CI branch. If I got the location right for the CI config (https://gitlab.freedesktop.org/gfx-ci/i915-infra/-/blob/master/kconfig/debug), it should be safe to remove this as it already has

Re: [Intel-gfx] [PATCH 11/19] drm/i915/perf: Store a pointer to oa_format in oa_buffer

On Tue, 23 Aug 2022 13:41:47 -0700, Umesh Nerlige Ramappa wrote: > > @@ -3184,15 +3184,12 @@ static int i915_oa_stream_init(struct > i915_perf_stream *stream, > stream->sample_flags = props->sample_flags; > stream->sample_size += format_size; > > - stream->oa_buffer.format_size =

[Intel-gfx] [PATCH] Revert "HAX iommu/intel: Ignore igfx_off"

This reverts commit 58f44e349cfc10a4f2208fd806829c8fd046480b. To be removed from the topic/core-for-CI branch. If CI's config is setting that, it just shouldn't do it. Looking at a random current CI execution, the command line is: Command line: BOOT_IMAGE=/boot/drm_intel root=/dev/nvme0n1p2 \

Re: [Intel-gfx] [PATCH 2/4] drm/i915/squash: s/intel_cdclk_can_squash/intel_cdclk_squash

On Fri, Aug 19, 2022 at 05:58:20PM -0700, Anusha Srivatsa wrote: > Apart from checking if squashing can be performed, > accommodate accessing in-flight cdclk state for any changes > that are needed during commit phase. > > v2: Move squashing bits to switch case.(Anusha) > > Cc: Jani Nikula >

Re: [Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

On Fri, Aug 19, 2022 at 05:58:19PM -0700, Anusha Srivatsa wrote: > This is a prep patch for what the rest of the series does. > > Add existing actions that change cdclk - squash, crawl, modeset to > intel_cdclk_state so we have access to the cdclk values > that are in transition. > > Cc: Jani

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch]

== Series Details == Series: drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch] URL : https://patchwork.freedesktop.org/series/108571/ State : success == Summary == CI Bug Log - changes from CI_DRM_12136 -> Patchwork_108571v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch]

== Series Details == Series: drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch] URL : https://patchwork.freedesktop.org/series/108571/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch]

== Series Details == Series: drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch] URL : https://patchwork.freedesktop.org/series/108571/ State : warning == Summary == Error: dim checkpatch failed 2e046376e4d1 drm/i915: move i915_fence_{context_, }timeout() to

Re: [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size

On Wed, 14 Sep 2022 11:19:30 -0700, Umesh Nerlige Ramappa wrote: > > On Wed, Sep 14, 2022 at 09:04:10AM -0700, Dixit, Ashutosh wrote: > > On Tue, 23 Aug 2022 13:41:42 -0700, Umesh Nerlige Ramappa wrote: > >> > > > > Hi Umesh, > > > >> diff --git a/drivers/gpu/drm/i915/i915_perf.c > >>

Re: [Intel-gfx] [PATCH 09/19] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops

On Tue, 23 Aug 2022 13:41:45 -0700, Umesh Nerlige Ramappa wrote: > > With multi-gt, user can access multiple OA buffers concurrently. Use > stream->lock instead of gt->perf.lock to serialize file operations. Ok, will come in handy for multiple streams per gt: Reviewed-by: Ashutosh Dixit

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move i915_coherent_map_type() to i915_gem_pages.c and un-inline

== Series Details == Series: drm/i915: move i915_coherent_map_type() to i915_gem_pages.c and un-inline URL : https://patchwork.freedesktop.org/series/108569/ State : success == Summary == CI Bug Log - changes from CI_DRM_12135 -> Patchwork_108569v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move i915_coherent_map_type() to i915_gem_pages.c and un-inline

== Series Details == Series: drm/i915: move i915_coherent_map_type() to i915_gem_pages.c and un-inline URL : https://patchwork.freedesktop.org/series/108569/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for Update to version reduced firmware file names

== Series Details == Series: Update to version reduced firmware file names URL : https://patchwork.freedesktop.org/series/108568/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12135 -> Patchwork_108568v1 Summary ---

Re: [Intel-gfx] [PATCH 08/19] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf

On Tue, 23 Aug 2022 13:41:44 -0700, Umesh Nerlige Ramappa wrote: > > Make perf part of gt as the OAG buffer is specific to a gt. The refactor > eventually simplifies programming the right OA buffer and the right HW > registers when supporting multiple gts. Reviewed-by: Ashutosh Dixit

Re: [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size

On Wed, Sep 14, 2022 at 09:04:10AM -0700, Dixit, Ashutosh wrote: On Tue, 23 Aug 2022 13:41:42 -0700, Umesh Nerlige Ramappa wrote: Hi Umesh, diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 6fc4f0d8fc5a..bbf1c574f393 100644 ---

Re: [Intel-gfx] [PATCH v5 00/15] drm/i915: HuC loading for DG2

On Wed, Sep 14, 2022 at 04:51:03PM +, Winkler, Tomas wrote: > > > > On DG2, HuC loading is performed by the GSC, via a PXP command. The load > > operation itself is relatively simple (just send a message to the GSC with > > the > > physical address of the HuC in LMEM), but there are timing

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gem: Really move i915_gem_context.link under ref protection

Hi, [...] > > struct i915_address_space *vm; > > + unsigned long flags; > > trace_i915_context_free(ctx); > > GEM_BUG_ON(!i915_gem_context_is_closed(ctx)); > > + spin_lock_irqsave(>i915->gem.contexts.lock, flags); > > Why irqsave and the conversion to irq safe elsewhere? Worker

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915/uc: Fix issues with overriding firmware files

On 9/13/2022 5:58 PM, john.c.harri...@intel.com wrote: From: John Harrison The earlier update to support reduced versioning of firmware files introduced an issue with the firmware override module parameter. If an invalid file was specified then an infinite loop could occur trying to find a

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev3)

== Series Details == Series: drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev3) URL : https://patchwork.freedesktop.org/series/108477/ State : success == Summary == CI Bug Log - changes from CI_DRM_12134 -> Patchwork_108477v3

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fix bug in version reduced firmware update (rev2)

== Series Details == Series: Fix bug in version reduced firmware update (rev2) URL : https://patchwork.freedesktop.org/series/108461/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12132_full -> Patchwork_108461v2_full

[Intel-gfx] [PATCH] drm/i915: move i915_fence_{context_, }timeout() to i915_sw_fence.[ch]

Maybe there was a grand plan with i915_fence_timeout() and i915_fence_context_timeout() and i915_config.c, but that seems to have been lost a bit. Just move the functions to i915_sw_fence.[ch] from i915_drv.h and i915_config.c, and remove the latter. Cc: Tvrtko Ursulin Signed-off-by: Jani

Re: [Intel-gfx] [GIT PULL] Immutable backlight-detect-refactor branch between acpi, drm-* and pdx86

Hi, On 9/14/22 12:29, Maxime Ripard wrote: > Hi Hans, > > On Mon, Sep 05, 2022 at 10:35:47AM +0200, Hans de Goede wrote: >> Hi All, >> >> Now that all patches have been reviewed/acked here is an immutable >> backlight-detect-refactor >> branch with 6.0-rc1 + the v5 patch-set, for merging into

Re: [Intel-gfx] [PATCH v5 00/15] drm/i915: HuC loading for DG2

> > On DG2, HuC loading is performed by the GSC, via a PXP command. The load > operation itself is relatively simple (just send a message to the GSC with the > physical address of the HuC in LMEM), but there are timing changes that > requires special attention. In particular, to send a PXP

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915/uc: Fix issues with overriding firmware files

On 9/13/2022 17:58, john.c.harri...@intel.com wrote: From: John Harrison The earlier update to support reduced versioning of firmware files introduced an issue with the firmware override module parameter. If an invalid file was specified then an infinite loop could occur trying to find a

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2)

== Series Details == Series: drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2) URL : https://patchwork.freedesktop.org/series/105975/ State : success == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_105975v2_full

[Intel-gfx] [PATCH] drm/i915: move i915_coherent_map_type() to i915_gem_pages.c and un-inline

The inline function has no place in i915_drv.h. Move it away, un-inline, and untangle some header dependencies while at it. Cc: Matthew Auld Cc: Tvrtko Ursulin Signed-off-by: Jani Nikula --- I don't know where this belongs, I just know it doesn't belong in i915_drv.h. I first tried moving

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2)

https://gitlab.freedesktop.org/drm/intel/-/issues/6844 [DG1][DG2] igt@i915_pm_rpm@.* - skip - Test requirement: has_runtime_pm, Last errno: 5, Input/output error, SKIP Issue closed as expected and re-reported. Lakshmi. -Original Message- From: Gupta, Anshuman Sent: Wednesday,

[Intel-gfx] [PATCH 0/1] Update to version reduced firmware file names

From: John Harrison Start using GuC/HuC firmware files with reduced version information in the file name. Signed-off-by: John Harrison John Harrison (1): drm/i915/uc: Enable version reduced firmware files for newest platforms drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 12 +++-

[Intel-gfx] [PATCH 1/1] drm/i915/uc: Enable version reduced firmware files for newest platforms

From: John Harrison Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms that are officially GuC/HuC enabled. Also, update the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2)

== Series Details == Series: drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2) URL : https://patchwork.freedesktop.org/series/108477/ State : success == Summary == CI Bug Log - changes from CI_DRM_12134 -> Patchwork_108477v2

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gem: Really move i915_gem_context.link under ref protection

Hi Tvrtko, Thanks for review. On Wednesday, 14 September 2022 17:37:19 CEST Tvrtko Ursulin wrote: > > On 13/09/2022 17:10, Janusz Krzysztofik wrote: > > From: Chris Wilson > > > > i915_perf assumes that it can use the i915_gem_context reference to > > protect its i915->gem.contexts.list

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: HuC loading for DG2 (rev7)

== Series Details == Series: drm/i915: HuC loading for DG2 (rev7) URL : https://patchwork.freedesktop.org/series/107477/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12132_full -> Patchwork_107477v7_full Summary ---

[Intel-gfx] [PATCH v2] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

DG1 and DG2 has lmem, and cpu can access the lmem objects via mmap and i915 internal i915_gem_object_pin_map() for i915 own usages. Both of these methods has pre-requisite requirement to keep GFX PCI endpoint in D0 for a supported iomem transaction over PCI link. (Refer PCIe specs 5.3.1.4.1) Both

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Use GEN12 RPSTAT register

On Wed, 14 Sep 2022 02:56:26 -0700, Nilawar, Badal wrote: > > On 13-09-2022 13:17, Tvrtko Ursulin wrote: > > > > On 13/09/2022 01:09, Dixit, Ashutosh wrote: > >> On Mon, 12 Sep 2022 04:29:38 -0700, Nilawar, Badal wrote: > >>> > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c > >

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2)

> -Original Message- > From: Gupta, Anshuman > Sent: Wednesday, September 14, 2022 9:36 PM > To: intel-gfx@lists.freedesktop.org; ", lakshminarayana.vudum"@intel.com; > ",rodrigo.vivi"@intel.com > Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915/DG{1, 2}: FIXME Temporary > hammer to

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gem: Really move i915_gem_context.link under ref protection

On Wednesday, 14 September 2022 17:15:02 CEST Andi Shyti wrote: > Hi Krzysztofik, > > if you are going to resend it, I just have a little thing if you > don't mind, > > On Tue, Sep 13, 2022 at 06:10:39PM +0200, Janusz Krzysztofik wrote: > > From: Chris Wilson > > > > i915_perf assumes that it

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2)

On 9/14/2022 9:13 PM, Patchwork wrote: *Patch Details* *Series:* drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2) *URL:* https://patchwork.freedesktop.org/series/108477/ *State:*failure *Details:*

Re: [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size

On Tue, 23 Aug 2022 13:41:42 -0700, Umesh Nerlige Ramappa wrote: > Hi Umesh, > diff --git a/drivers/gpu/drm/i915/i915_perf.c > b/drivers/gpu/drm/i915/i915_perf.c > index 6fc4f0d8fc5a..bbf1c574f393 100644 > --- a/drivers/gpu/drm/i915/i915_perf.c > +++ b/drivers/gpu/drm/i915/i915_perf.c > @@

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2)

== Series Details == Series: drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2) URL : https://patchwork.freedesktop.org/series/105975/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_105975v2_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2)

== Series Details == Series: drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm (rev2) URL : https://patchwork.freedesktop.org/series/108477/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12134 -> Patchwork_108477v2

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gem: Really move i915_gem_context.link under ref protection

On 13/09/2022 17:10, Janusz Krzysztofik wrote: From: Chris Wilson i915_perf assumes that it can use the i915_gem_context reference to protect its i915->gem.contexts.list iteration. However, this requires that we do not remove the context from the list until after we drop the final reference

Re: [Intel-gfx] [PATCH] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

Hi Anshuman, [...] > > > > +* which really disables the PCIe power savings and leaves the > > > > bridge to > > D0 > > > > +* state. > > > > +* Let's disable i915 rpm till we fix all known issue with > > > > lmem access in > > D3. > > > > +*/ > > > > +

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: A couple of if/else ladder refactors (rev2)

== Series Details == Series: drm/i915: A couple of if/else ladder refactors (rev2) URL : https://patchwork.freedesktop.org/series/108315/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12132_full -> Patchwork_108315v2_full

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gem: Really move i915_gem_context.link under ref protection

Hi Krzysztofik, if you are going to resend it, I just have a little thing if you don't mind, On Tue, Sep 13, 2022 at 06:10:39PM +0200, Janusz Krzysztofik wrote: > From: Chris Wilson > > i915_perf assumes that it can use the i915_gem_context reference to > protect its i915->gem.contexts.list

Re: [Intel-gfx] [topic/core-for-CI] Revert "iommu/dma: Fix race condition during iova_domain initialization"

On Wed, Sep 14, 2022 at 02:40:45PM +0200, Karolina Drobnik wrote: This reverts commit ac9a5d522bb80be50ea84965699e1c8257d745ce. This change introduces a regression on Alder Lake that completely blocks testing. To enable CI and avoid possible circular locking warning, revert the patch. We are

Re: [Intel-gfx] [PATCH] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

> -Original Message- > From: Andi Shyti > Sent: Wednesday, September 14, 2022 8:13 PM > To: Vivi, Rodrigo > Cc: Gupta, Anshuman ; intel- > g...@lists.freedesktop.org; joonas.lahti...@linux.intel.com; Ewins, Jon > ; andi.sh...@linux.intel.com; Auld, Matthew > > Subject: Re: [PATCH]

Re: [Intel-gfx] [PATCH] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

Hi Anshuman, On Wed, Sep 14, 2022 at 10:33:15AM -0400, Rodrigo Vivi wrote: > On Wed, Sep 14, 2022 at 07:45:53PM +0530, Anshuman Gupta wrote: > > DG1 and DG2 has lmem, and cpu can access the lmem objects > > via mmap and i915 internal i915_gem_object_pin_map() for > > i915 own usages. Both of

Re: [Intel-gfx] [PATCH] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

On Wed, Sep 14, 2022 at 07:45:53PM +0530, Anshuman Gupta wrote: > DG1 and DG2 has lmem, and cpu can access the lmem objects > via mmap and i915 internal i915_gem_object_pin_map() for > i915 own usages. Both of these methods has pre-requisite > requirement to keep GFX PCI endpoint in D0 for a

[Intel-gfx] [PATCH] drm/i915/DG{1, 2}: FIXME Temporary hammer to disable rpm

DG1 and DG2 has lmem, and cpu can access the lmem objects via mmap and i915 internal i915_gem_object_pin_map() for i915 own usages. Both of these methods has pre-requisite requirement to keep GFX PCI endpoint in D0 for a supported iomem transaction over PCI link. (Refer PCIe specs 5.3.1.4.1)

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2)

Hi, > Possible new issues > >Here are the unknown changes that may have been introduced in >Patchwork_105975v2_full: > > IGT changes > > Possible regressions > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc >: > + shard-iclb:

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gem: Flush contexts on driver release

Hi Krzysztofik, On Tue, Sep 13, 2022 at 06:10:38PM +0200, Janusz Krzysztofik wrote: > Due to i915_perf assuming that it can use the i915_gem_context reference > to protect its i915->gem.contexts.list iteration, we need to defer removal > of the context from the list until last reference to the

Re: [Intel-gfx] [PATCH] drm/i915: Fix return type of mode_valid function hook

On 13.09.2022 22:55, Nathan Huckleberry wrote: All of the functions used for intel_dvo_dev_ops.mode_valid have a return type of enum drm_mode_status, but the mode_valid field in the struct definition has a return type of int. The mismatched return type breaks forward edge kCFI since the

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "iommu/dma: Fix race condition during iova_domain initialization"

== Series Details == Series: Revert "iommu/dma: Fix race condition during iova_domain initialization" URL : https://patchwork.freedesktop.org/series/108557/ State : success == Summary == CI Bug Log - changes from CI_DRM_12134 -> Patchwork_108557v1

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev5)

On 9/14/2022 4:53 PM, Patchwork wrote: *Patch Details* *Series:* DGFX mmap with rpm (rev5) *URL:* https://patchwork.freedesktop.org/series/107400/ *State:*success *Details:*

[Intel-gfx] ✓ Fi.CI.IGT: success for Initial Meteorlake Support (rev9)

== Series Details == Series: Initial Meteorlake Support (rev9) URL : https://patchwork.freedesktop.org/series/106786/ State : success == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_106786v9_full Summary ---

[Intel-gfx] [topic/core-for-CI] Revert "iommu/dma: Fix race condition during iova_domain initialization"

This reverts commit ac9a5d522bb80be50ea84965699e1c8257d745ce. This change introduces a regression on Alder Lake that completely blocks testing. To enable CI and avoid possible circular locking warning, revert the patch. kernel log: == WARNING:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2)

== Series Details == Series: drm/i915/gem: Really move i915_gem_context.link under ref protection (rev2) URL : https://patchwork.freedesktop.org/series/105975/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_105975v2_full

Re: [Intel-gfx] [PATCH v5 0/4] lrc selftest fixes

On Tue, Sep 13, 2022 at 05:21:47PM +0200, Karolina Drobnik wrote: > Few bug fixes for lrc selftest. > > v5: > - Add Reviewed-by tag to "drm/i915/selftests: Check > for incomplete LRI from the context image" patch, as > it got reviewed in different series: >

Re: [Intel-gfx] [GIT PULL] Immutable backlight-detect-refactor branch between acpi, drm-* and pdx86

Hi Hans, On Mon, Sep 05, 2022 at 10:35:47AM +0200, Hans de Goede wrote: > Hi All, > > Now that all patches have been reviewed/acked here is an immutable > backlight-detect-refactor > branch with 6.0-rc1 + the v5 patch-set, for merging into the relevant (acpi, > drm-* and pdx86) > subsystems. >

[Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev5)

== Series Details == Series: DGFX mmap with rpm (rev5) URL : https://patchwork.freedesktop.org/series/107400/ State : success == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_107400v5_full Summary ---

Re: [Intel-gfx] [PATCH v5 0/4] lrc selftest fixes

For all the series, Reviewed-by: Andi Shyti Thanks, Andi On Tue, Sep 13, 2022 at 05:21:47PM +0200, Karolina Drobnik wrote: > Few bug fixes for lrc selftest. > > v5: > - Add Reviewed-by tag to "drm/i915/selftests: Check > for incomplete LRI from the context image" patch, as > it got

Re: [Intel-gfx] [PATCHv3] drm/i915: Support Async Flip on Linear buffers

Gentle Reminder! Any comments? Thanks and Regards, Arun R Murthy > -Original Message- > From: Intel-gfx On Behalf Of > Murthy, Arun R > Sent: Friday, September 9, 2022 9:17 AM > To: intel-gfx@lists.freedesktop.org > Cc: Syrjala, Ville > Subject: Re: [Intel-gfx]

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix return type of mode_valid function hook

== Series Details == Series: drm/i915: Fix return type of mode_valid function hook URL : https://patchwork.freedesktop.org/series/108553/ State : success == Summary == CI Bug Log - changes from CI_DRM_12133 -> Patchwork_108553v1 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for lrc selftest fixes (rev7)

== Series Details == Series: lrc selftest fixes (rev7) URL : https://patchwork.freedesktop.org/series/101353/ State : success == Summary == CI Bug Log - changes from CI_DRM_12131_full -> Patchwork_101353v7_full Summary ---

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