== Series Details ==
Series: drm/i915: Stop using flush_scheduled_work on driver remove
URL : https://patchwork.freedesktop.org/series/108970/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12175_full -> Patchwork_108970v1_full
On Thu, Sep 22, 2022 at 02:39:16PM -0700, Niranjana Vishwanathapura wrote:
> The function parameter 'exclude' in funciton
> i915_sw_fence_await_reservation() is not used.
> Remove it.
>
> Reviewed-by: Tvrtko Ursulin
> Signed-off-by: Niranjana Vishwanathapura
pushed to drm-intel-next.
Thanks
On Thu, Sep 22, 2022 at 12:51:27PM -0700, Nathan Chancellor wrote:
> [...]
> To make everything work properly, adjust certain functions to match the
> type of the ->show() and ->store() members in 'struct kobj_attribute'.
> Add a macro to generate functions for that can be called via both
>
On Fri, Sep 23, 2022 at 09:40:20AM +0100, Tvrtko Ursulin wrote:
On 21/09/2022 08:09, Niranjana Vishwanathapura wrote:
vma_lookup is tied to segment of the object instead of section
Can be, but not only that. It would be more accurate to say it is
based of gtt views.
Yah, but new code is
On Thu, Sep 22, 2022 at 12:54:09PM +0300, Jani Nikula wrote:
On Wed, 21 Sep 2022, Niranjana Vishwanathapura
wrote:
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer_common.h
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer_common.h
new file mode 100644
index ..725febfd6a53
On Fri, 23 Sep 2022 13:11:41 -0700, Umesh Nerlige Ramappa wrote:
>
Commit title probably now "Add 32 bit OAG and OAR formats for DG2"?
> Add new OA formats for DG2. Some of the newer OA formats are not
> multples of 64 bytes and are not powers of 2. For those formats, adjust
> hw_tail
On Fri, 23 Sep 2022 12:56:42 -0700, Badal Nilawar wrote:
>
> From: Ashutosh Dixit
>
> Expose power1_max_interval, that is the tau corresponding to PL1.
I think let's change the above sentence to: "Expose power1_max_interval,
that is the tau corresponding to PL1, as a custom hwmon attribute".
On Fri, 23 Sep 2022 12:56:40 -0700, Badal Nilawar wrote:
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.h
> b/drivers/gpu/drm/i915/i915_hwmon.h
> index 7ca9cf2c34c9..4e5b6c149f3a 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.h
> +++ b/drivers/gpu/drm/i915/i915_hwmon.h
> @@ -17,4 +17,5 @@
On Fri, 23 Sep 2022 12:56:37 -0700, Badal Nilawar wrote:
>
Hi Badal,
Let me add this comment on the latest version so we don't forget about it:
> +void i915_hwmon_register(struct drm_i915_private *i915)
> +{
> + struct device *dev = i915->drm.dev;
> + struct i915_hwmon *hwmon;
> +
On Wed, 21 Sep 2022 05:44:35 -0700, Andi Shyti wrote:
>
> > +void i915_hwmon_register(struct drm_i915_private *i915)
> > +{
> > + struct device *dev = i915->drm.dev;
> > + struct i915_hwmon *hwmon;
> > + struct device *hwmon_dev;
> > + struct hwm_drvdata *ddat;
> > +
> > + /* hwmon is
On Thu, Sep 22, 2022 at 11:44 PM Alan Previn
wrote:
>
> Add firmware status using a drm_warn when ARB session fails
> or else a drm_dbg when the ARB session register slot bit did
> get set.
>
> Signed-off-by: Alan Previn
> ---
> drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 1 +
>
== Series Details ==
Series: Add SLPC selftest live_slpc_power (rev2)
URL : https://patchwork.freedesktop.org/series/108900/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12174_full -> Patchwork_108900v2_full
Summary
On Fri, Sep 23, 2022 at 03:48:51PM -0700, Lucas De Marchi wrote:
> On Thu, Sep 15, 2022 at 06:46:48PM -0700, Radhakrishna Sripada wrote:
> > From: Matt Roper
> >
> > The part of the media and blitter engine contexts that we care about for
> > setting up an initial state are the same on MTL as
== Series Details ==
Series: Fixes integer overflow or integer truncation issues in page lookups,
ttm place configuration and scatterlist creation
URL : https://patchwork.freedesktop.org/series/108945/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12173_full ->
On Thu, Sep 15, 2022 at 06:46:48PM -0700, Radhakrishna Sripada wrote:
From: Matt Roper
The part of the media and blitter engine contexts that we care about for
setting up an initial state are the same on MTL as they were on DG2
(and PVC), so we need to update the driver conditions to re-use
== Series Details ==
Series: Add DG2 OA support (rev3)
URL : https://patchwork.freedesktop.org/series/107584/
State : warning
== Summary ==
Error: dim checkpatch failed
7e3d54fda966 drm/i915/perf: Fix OA filtering logic for GuC mode
cf4391110d50 drm/i915/perf: Add OAG and OAR formats for DG2
== Series Details ==
Series: drm/i915: Add HWMON support (rev7)
URL : https://patchwork.freedesktop.org/series/104278/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12176 -> Patchwork_104278v7
Summary
---
== Series Details ==
Series: drm/i915: Add HWMON support (rev7)
URL : https://patchwork.freedesktop.org/series/104278/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Add HWMON support (rev7)
URL : https://patchwork.freedesktop.org/series/104278/
State : warning
== Summary ==
Error: dim checkpatch failed
74f6e494d49e drm/i915/hwmon: Add HWMON infrastructure
Traceback (most recent call last):
File
Make perf part of gt as the OAG buffer is specific to a gt. The refactor
eventually simplifies programming the right OA buffer and the right HW
registers when supporting multiple gts.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
Reviewed-by: Ashutosh Dixit
---
Predication for batch buffer commands changed in XEHPSDV.
MI_BATCH_BUFFER_START predicates based on MI_SET_PREDICATE_RESULT
register. The MI_SET_PREDICATE_RESULT register can only be modified
with MI_SET_PREDICATE command. When configured, the MI_SET_PREDICATE
command sets MI_SET_PREDICATE_RESULT
From: Vinay Belgaumkar
On DG2, a w/a resets RCS/CCS before it goes into RC6. This breaks OA
since OA does not expect engine resets during its use. Fix it by
disabling RC6.
v2: (Ashutosh)
- Bring back slpc_unset_param helper
- Update commit msg
- Use with_intel_runtime_pm helper for set/unset
With multi-gt, user can access multiple OA buffers concurrently. Use
stream->lock instead of gt->perf.lock to serialize file operations.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/i915_perf.c | 31 --
If a drm client is killed, then hw contexts used by the client are reset
immediately. This reset clears the EU flex counter configuration. If an
OA use case is running in parallel, it would start seeing zeroed eu
counter values following the reset even if the drm client is restarted.
Save/restore
With GuC mode of submission, GuC is in control of defining the context
id field that is part of the OA reports. To filter reports, UMD and KMD
must know what sw context id was chosen by GuC. There is not interface
between KMD and GuC to determine this, so read the upper-dword of
EXECLIST_STATUS to
Earlier code used exclusive_stream to check for user passed context.
Simplify this by accessing stream->ctx.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Add new OA formats for DG2. Some of the newer OA formats are not
multples of 64 bytes and are not powers of 2. For those formats, adjust
hw_tail accordingly when checking for new reports.
v2:
- Update commit title (Ashutosh)
- Coding style fixes (Lionel)
- 64 bit OA formats need UMD changes in
DG2 introduces OA reports with 64 bit report header fields. Perf OA
would need more information about the OA format in order to process such
reports. Store all OA format info in oa_buffer instead of just the size
and format-id.
v2: Drop format_size variable (Ashutosh)
Signed-off-by: Umesh
User passes uabi engine class and instance to the perf OA interface. Use
gt corresponding to the engine to pin the buffers to the right ggtt.
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 21 +++--
1 file changed, 19
OA reports in the OA buffer contain an OA timestamp field that helps
user calculate delta between 2 OA reports. The calculation relies on the
CS timestamp frequency to convert the timestamp value to nanoseconds.
The CS timestamp frequency is a function of the CTC_SHIFT value in
RPM_CONFIG0.
In
Disable Clock gating in EU when gathering the events so that EU events
are not lost.
v2: Fix checkpatch issues
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/i915_perf.c| 23
XEHPSDV and DG2 provide a way to configure bytes per clock vs commands
per clock reporting. Enable bytes per clock setting on enabling OA.
v2:
- Fix commit msg (Ashutosh)
- Fix checkpatch issues
Signed-off-by: Umesh Nerlige Ramappa
Acked-by: Lionel Landwerlin
---
OA was disabled for DG2 as support was missing. Enable it back now.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_perf.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index
Some SKUs of same gen12 platform may have different oactxctrl
offsets. For gen12, determine oactxctrl offsets at runtime.
v2: (Lionel)
- Move MI definitions to intel_gpu_commands.h
- Ensure __find_reg_in_lri does read past context image size
Signed-off-by: Umesh Nerlige Ramappa
---
Add OA format support for DG2 and various fixes for DG2.
This series has 2 uapi changes listed below:
1) drm/i915/perf: Add OAG and OAR formats for DG2
DG2 has new OA formats defined that can be selected by the
user. The UMD changes that are consumed by GPUvis are:
From: Ashutosh Dixit
Expose power1_max_interval, that is the tau corresponding to PL1. Some bit
manipulation is needed because of the format of PKG_PWR_LIM_1_TIME in
GT0_PACKAGE_RAPL_LIMIT register (1.x * power(2,y)).
v2: Update date and kernel version in Documentation (Badal)
v3: Cleaned up
From: Dale B Stimson
Extend hwmon power/energy for XEHPSDV especially per gt level energy
usage.
v2: Update to latest HWMON spec (Ashutosh)
v3: Fix review comments (Ashutosh)
v4: Fix review comments (Anshuman)
Signed-off-by: Ashutosh Dixit
Signed-off-by: Dale B Stimson
Signed-off-by: Badal
From: Ashutosh Dixit
Expose the card reactive critical (I1) power. I1 is exposed as
power1_crit in microwatts (typically for client products) or as
curr1_crit in milliamperes (typically for server).
v2: Add curr1_crit functionality (Ashutosh)
v3: Use HWMON_CHANNEL_INFO to define power1_crit,
From: Dale B Stimson
Use i915 HWMON to display device level energy input.
v2: Updated the date and kernel version in feature description
v3:
- Cleaned up hwm_energy function and removed unused function
i915_hwmon_energy_status_get (Ashutosh)
v4: KernelVersion: 6.2, Date: February 2023 in
From: Dale B Stimson
Use i915 HWMON to display/modify dGfx power PL1 limit and TDP setting.
v2:
- Fix review comments (Ashutosh)
- Do not restore power1_max upon module unload/load sequence
because on production systems modules are always loaded
and not unloaded/reloaded (Ashutosh)
From: Riana Tauro
Use i915 HWMON subsystem to display current input voltage.
v2:
- Updated date and kernel version in feature description
- Fixed review comments (Ashutosh)
v3: Use macro HWMON_CHANNEL_INFO to define hwmon channel (Guenter)
v4:
- Fixed review comments (Ashutosh)
- Use
From: Dale B Stimson
The i915 HWMON module will be used to expose voltage, power and energy
values for dGfx. Here we set up i915 hwmon infrastructure including i915
hwmon registration, basic data structures and functions.
v2:
- Create HWMON infra patch (Ashutosh)
- Fixed review comments
This series adds the HWMON support for DGFX
Test-with: 20220919144408.251981-1-riana.ta...@intel.com
v2:
- Reorganized series. Created first patch as infrastructure patch
followed by feature patches. (Ashutosh)
- Fixed review comments (Jani)
- Fixed review comments (Ashutosh)
v3:
-
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix a potential UAF at device
unload
URL : https://patchwork.freedesktop.org/series/108944/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12171_full -> Patchwork_108944v1_full
== Series Details ==
Series: Add PXP firmware respose on ARB failure
URL : https://patchwork.freedesktop.org/series/108935/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12171_full -> Patchwork_108935v1_full
Summary
On Fri, Sep 23, 2022 at 04:56:53PM +, Srivatsa, Anusha wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Tuesday, September 20, 2022 2:59 PM
> > To: Srivatsa, Anusha
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > ; Vivi, Rodrigo
> > Subject: Re: [PATCH
== Series Details ==
Series: Delay disabling GuC scheduling of an idle context
URL : https://patchwork.freedesktop.org/series/108931/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12171_full -> Patchwork_108931v1_full
Rafael, could you please add your thoughts here?
On Thu, 2022-09-22 at 12:40 +, Gupta, Anshuman wrote:
>
>
> > -Original Message-
> > From: Gupta, Anshuman
> > Sent: Thursday, September 22, 2022 4:40 PM
> > To: Vivi, Rodrigo ; Tvrtko Ursulin
> >
> > Cc: Nikula, Jani ; intel-
> >
== Series Details ==
Series: drm/i915: Improve debug print in vm_fault_ttm (rev3)
URL : https://patchwork.freedesktop.org/series/108887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12175 -> Patchwork_108887v3
Summary
On Wed, Sep 21, 2022 at 12:19:05AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dg2: introduce Wa_22015475538
> URL : https://patchwork.freedesktop.org/series/108795/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_12161_full ->
== Series Details ==
Series: drm/i915/display: Don't use port enum as register offset (rev3)
URL : https://patchwork.freedesktop.org/series/108833/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12171_full -> Patchwork_108833v3_full
On Tue, Sep 20, 2022 at 01:43:59PM -0700, Matt Atwood wrote:
> Wa_22015475538 applies to all DG2 (and ATSM) skus. The workaround
> implementation is identical to Wa_16011620976. LSC_CHICKEN_BIT_0_UDW is
> a general render register instead of rcs so adding this move to the
> proper wa init
On Thu, Sep 15, 2022 at 06:46:47PM -0700, Radhakrishna Sripada wrote:
From: José Roberto de Souza
Expand the current stepping convention to accommodate the GMD
stepping info. Typically GMD step maps to letter stepping
by "A + step %4" and number to "A + step /4" i.e, GMD step
0 maps to
On Thu, Sep 15, 2022 at 06:46:46PM -0700, Radhakrishna Sripada wrote:
From: Matt Roper
Going forward, the hardware teams no longer consider new platforms to
have a "generation" in the way we've defined it for past platforms.
Instead, each IP block (graphics, media, display) will have their own
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual
URL : https://patchwork.freedesktop.org/series/108972/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12175 -> Patchwork_108972v1
Summary
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual
URL : https://patchwork.freedesktop.org/series/108972/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual
URL : https://patchwork.freedesktop.org/series/108972/
State : warning
== Summary ==
Error: dim checkpatch failed
09fac79aedc6 drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual
-:122: CHECK:BRACES: Blank
> -Original Message-
> From: Ville Syrjälä
> Sent: Tuesday, September 20, 2022 2:59 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> ; Vivi, Rodrigo
> Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
>
> On Tue, Sep 20, 2022 at 06:48:46PM +,
On Fri, Sep 23, 2022 at 03:29:34PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Kernel is trying to eliminate callers of flush_scheduled_work so lets
> try to accommodate.
>
> We currently call it from intel_modeset_driver_remove_noirq on the driver
> remove path but the comment next
== Series Details ==
Series: drm/i915: Stop using flush_scheduled_work on driver remove
URL : https://patchwork.freedesktop.org/series/108970/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12175 -> Patchwork_108970v1
On 22.09.2022 10:13, Andrzej Hajda wrote:
GPU occasionally can hang during saturated-hostile test. Detection of
such case and reset can take up to 5 seconds. While at it fix typo in
definition of RESET_TIMEOUT_MS.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1551
Signed-off-by:
Tests on DG2 show that context cancel can take even 350ms,
due to error state capturing in guc_handle_context_reset.
Since it happens only in debug mode and tests runs in debug mode
it should be fine to adjust the timeout.
Let's double this value, to be on safe side.
It should fix multiple test
On 9/23/2022 3:53 AM, Tvrtko Ursulin wrote:
On 22/09/2022 23:11, Daniele Ceraolo Spurio wrote:
On MTL the primary GT doesn't have any media capabilities, so no video
engines and no HuC. We must therefore skip the HuC fetch and load on
that specific case. Given that other multi-GT platforms
On 9/23/2022 2:24 AM, Jani Nikula wrote:
On Thu, 22 Sep 2022, Daniele Ceraolo Spurio
wrote:
From: Aravind Iddamsetty
With MTL standalone media architecture the wopcm layout has changed with
separate partitioning in WOPCM for GCD/GT GuC and SA Media GuC. The size
of WOPCM is 4MB with
On 23.09.2022 10:45, Nirmoy Das wrote:
Print the error code returned by __i915_ttm_migrate()
for better debuggability.
v2: Fix kernel test robot warning.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/6889
Acked-by: Matthew Auld
Signed-off-by: Nirmoy Das ---
Print the error code returned by __i915_ttm_migrate()
for better debuggability.
v2: Fix kernel test robot warning.
v3: Fix dim checkpatch warning.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/6889
Acked-by: Matthew Auld
Signed-off-by: Nirmoy Das
---
We had already grabbed the rpm wakeref at obj destruction path,
but it also required to grab the wakeref when object moves.
When i915_gem_object_release_mmap_offset() gets called by
i915_ttm_move_notify(), it will release the mmap offset without
grabbing the wakeref. We want to avoid that
From: Tvrtko Ursulin
Kernel is trying to eliminate callers of flush_scheduled_work so lets
try to accommodate.
We currently call it from intel_modeset_driver_remove_noirq on the driver
remove path but the comment next to it does not tell me what exact work it
wants to flush.
I can spot three
== Series Details ==
Series: Add SLPC selftest live_slpc_power (rev2)
URL : https://patchwork.freedesktop.org/series/108900/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12174 -> Patchwork_108900v2
Summary
---
== Series Details ==
Series: drm/i915: Improve debug print in vm_fault_ttm (rev2)
URL : https://patchwork.freedesktop.org/series/108887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12174 -> Patchwork_108887v2
Summary
On Fri, 2022-09-23 at 12:45 +, Hogander, Jouni wrote:
> On Fri, 2022-09-23 at 12:37 +, Souza, Jose wrote:
> > On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> > > On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > > > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander
== Series Details ==
Series: drm/i915: Improve debug print in vm_fault_ttm (rev2)
URL : https://patchwork.freedesktop.org/series/108887/
State : warning
== Summary ==
Error: dim checkpatch failed
751ba3d859b3 drm/i915: Improve debug print in vm_fault_ttm
-:24: WARNING:LONG_LINE: line length
On Fri, 2022-09-23 at 12:37 +, Souza, Jose wrote:
> On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> > On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> > > > Current PSR code is supposed to use TRANSCODER_EDP to
On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> > > Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift
> > > for
> > > bits in PSR_IMR/IIR registers:
>
== Series Details ==
Series: Add PXP firmware respose on ARB failure
URL : https://patchwork.freedesktop.org/series/108929/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12169_full -> Patchwork_108929v1_full
Summary
On Thu, 22 Sep 2022, Maxime Ripard wrote:
> drm_connector_pick_cmdline_mode() is in charge of finding a proper
> drm_display_mode from the definition we got in the video= command line
> argument.
>
> Let's add some unit tests to make sure we're not getting any regressions
> there.
>
>
== Series Details ==
Series: series starting with [1/1] drm/i915/pxp: Add firmware status when ARB
session fails
URL : https://patchwork.freedesktop.org/series/108928/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12169_full -> Patchwork_108928v1_full
On Fri, Sep 23, 2022 at 12:30:09PM +0200, Thomas Zimmermann wrote:
> Am 23.09.22 um 11:26 schrieb Javier Martinez Canillas:
> > On 9/23/22 11:15, Thomas Zimmermann wrote:
> > > Hi
> > >
> > > Am 22.09.22 um 16:25 schrieb Maxime Ripard:
> > > > drm_connector_pick_cmdline_mode() is in charge of
== Series Details ==
Series: Fixes integer overflow or integer truncation issues in page lookups,
ttm place configuration and scatterlist creation
URL : https://patchwork.freedesktop.org/series/108945/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12173 -> Patchwork_108945v1
On 9/23/22 12:30, Thomas Zimmermann wrote:
[...]
+
+#ifdef CONFIG_DRM_KUNIT_TEST
+#include "tests/drm_client_modeset_test.c"
+#endif
>>>
>>> I strongly dislike this style of including source files in each other.
>>> It's a recipe for all kind of build errors. Can you do
On 23/09/2022 11:32, Das, Nirmoy wrote:
Reviewed-by: Nirmoy Das
Thanks!
Pushed now. Should land with 6.2.
Regards,
Tvrtko
On 6/30/2022 2:57 PM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
There are ongoing efforts to remove usages of flush_scheduled_work() from
drivers in order to
Run slpc selftests on all tiles
Signed-off-by: Riana Tauro
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 45 -
1 file changed, 37 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c
b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index
move the power measurement and the triangle filter
to a different function. No functional changes.
Signed-off-by: Riana Tauro
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c
A fundamental assumption is that at lower frequencies,
not only do we run slower, but we save power compared to
higher frequencies.
live_slpc_power checks if running at low frequency saves power
v2: re-use code to measure power
fixed cosmetic review comments (Vinay)
Signed-off-by: Riana
live_slpc_power tests if running at low frequency saves power
Rev2 : Add multi-tile support
Riana Tauro (3):
drm/i915/guc/slpc: Run SLPC selftests on all tiles
drm/i915/selftests: Add helper function measure_power
drm/i915/guc/slpc: Add SLPC selftest live_slpc_power
On 22/09/2022 23:11, Daniele Ceraolo Spurio wrote:
On MTL the primary GT doesn't have any media capabilities, so no video
engines and no HuC. We must therefore skip the HuC fetch and load on
that specific case. Given that other multi-GT platforms might have HuC
on the primary GT, we can't just
== Series Details ==
Series: Fixes integer overflow or integer truncation issues in page lookups,
ttm place configuration and scatterlist creation
URL : https://patchwork.freedesktop.org/series/108945/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode
== Series Details ==
Series: Fixes integer overflow or integer truncation issues in page lookups,
ttm place configuration and scatterlist creation
URL : https://patchwork.freedesktop.org/series/108945/
State : warning
== Summary ==
Error: dim checkpatch failed
c7e564bf76cd overflow: Allow
Reviewed-by: Nirmoy Das
On 6/30/2022 2:57 PM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
There are ongoing efforts to remove usages of flush_scheduled_work() from
drivers in order to avoid several cases of potentential problems when
flushing is done from certain contexts.
Remove the call
Hi
Am 23.09.22 um 11:26 schrieb Javier Martinez Canillas:
On 9/23/22 11:15, Thomas Zimmermann wrote:
Hi
Am 22.09.22 um 16:25 schrieb Maxime Ripard:
drm_connector_pick_cmdline_mode() is in charge of finding a proper
drm_display_mode from the definition we got in the video= command line
On Fri, Sep 23, 2022 at 12:52:48PM +0300, Jani Nikula wrote:
> On Wed, 21 Sep 2022, Balasubramani Vivekanandan
> wrote:
> > Display DDI ports are enumerated as PORT_A,PORT_B... . The enums are
> > also used as an index to access the DDI_BUF_CTL register for the port.
> >
> > With the
Hi
Am 23.09.22 um 11:18 schrieb Jani Nikula:
On Fri, 23 Sep 2022, Thomas Zimmermann wrote:
Am 22.09.22 um 16:25 schrieb Maxime Ripard:
+ drm_dbg_kms(dev,
+ "Generating a %ux%u%c, %u-line mode with a %lu kHz clock\n",
+ hactive, vactive,
+
On Wed, 21 Sep 2022, Balasubramani Vivekanandan
wrote:
> Display DDI ports are enumerated as PORT_A,PORT_B... . The enums are
> also used as an index to access the DDI_BUF_CTL register for the port.
>
> With the introduction of TypeC ports, new enums PORT_TC1,PORT_TC2.. were
> added starting
On Thu, Sep 22, 2022 at 01:01:48PM -0700, John Harrison wrote:
> On 9/22/2022 07:26, Dan Carpenter wrote:
> > Hello Matthew Brost,
> >
> > The patch 6b540bf6f143: "drm/i915/guc: Implement multi-lrc
> > submission" from Oct 14, 2021, leads to the following Smatch static
> > checker warning:
> >
>
On 9/23/22 11:15, Thomas Zimmermann wrote:
> Hi
>
> Am 22.09.22 um 16:25 schrieb Maxime Ripard:
>> drm_connector_pick_cmdline_mode() is in charge of finding a proper
>> drm_display_mode from the definition we got in the video= command line
>> argument.
>>
>> Let's add some unit tests to make sure
On Thu, 22 Sep 2022, Daniele Ceraolo Spurio
wrote:
> From: Aravind Iddamsetty
>
> With MTL standalone media architecture the wopcm layout has changed with
> separate partitioning in WOPCM for GCD/GT GuC and SA Media GuC. The size
> of WOPCM is 4MB with lower 2MB for SA Media and upper 2MB for
== Series Details ==
Series: drm/i915: prepare for uC loading on MTL
URL : https://patchwork.freedesktop.org/series/108925/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12168_full -> Patchwork_108925v1_full
Summary
On Fri, 23 Sep 2022, Thomas Zimmermann wrote:
> Am 22.09.22 um 16:25 schrieb Maxime Ripard:
>> +drm_dbg_kms(dev,
>> +"Generating a %ux%u%c, %u-line mode with a %lu kHz clock\n",
>> +hactive, vactive,
>> +interlace ? 'i' : 'p',
>> +
Hi
Am 22.09.22 um 16:25 schrieb Maxime Ripard:
drm_connector_pick_cmdline_mode() is in charge of finding a proper
drm_display_mode from the definition we got in the video= command line
argument.
Let's add some unit tests to make sure we're not getting any regressions
there.
Signed-off-by:
Hi
Am 22.09.22 um 16:25 schrieb Maxime Ripard:
Multiple drivers (meson, vc4, sun4i) define analog TV 525-lines and
625-lines modes in their drivers.
Since those modes are fairly standard, and that we'll need to use them
in more places in the future, it makes sense to move their definition
into
1 - 100 of 140 matches
Mail list logo
