Since topology state is being added to drm_atomic_state now all
drm_modeset_lock required are being taken from core this raises
an issue when we try to loop over connector and assign vcpi id to
our streams as we did not have atomic state to derive acquire_ctx
from hence we fill in stream info if
Pass all the parameter in intel_encoder->enable()
to intel_hdcp_enable as we need intel_atomic_state
later down to get acquire_ctx.
Cc: Jani Nikula
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_ddi.c| 5 +++--
HDCP MST scenario sees modeset locking issue ever since
topology_state was added to drm_atomic_state and all modeset
locks were being taken for us causing a locking issue to occur
when we iterate over connectors to assign vcpi id, the fix
being to pass acquire_ctx to drm_modeset_lock
On Tue, 2023-05-09 at 20:14 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Modernize the DP AUX CH register definitions with REG_BIT() & co.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jouni Högander
>
> ---
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 35 +--
>
On Wed, 2023-05-10 at 11:10 +0200, Andi Shyti wrote:
> Hi Jouni,
Hi Andi, thank you for checking my patch.
>
> On Wed, May 10, 2023 at 11:50:43AM +0300, Jouni Högander wrote:
> > Fix obvious typo in intel_frontbuffer forward declaration.
> >
> > Signed-off-by: Jouni Högander
> > ---
> >
> On Thu, 04 May 2023, Suraj Kandpal wrote:
> > Since topology state is being added to drm_atomic_state now all
> > drm_modeset_lock required are being taken from core this raises an
> > issue when we try to loop over connector and assign vcpi id to our
> > streams as we did not have atomic state
== Series Details ==
Series: drm/i1915/guc: Fix probe injection CI failures after recent change
URL : https://patchwork.freedesktop.org/series/117600/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13131_full -> Patchwork_117600v1_full
== Series Details ==
Series: drm/i915/hwmon: Silence UBSAN uninitialized bool variable warning
URL : https://patchwork.freedesktop.org/series/117591/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13131_full -> Patchwork_117591v1_full
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev11)
URL : https://patchwork.freedesktop.org/series/112647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13131_full -> Patchwork_112647v11_full
Summary
== Series Details ==
Series: series starting with [1/2] drm/i915/mtl: Extend Wa_16014892111 to MTL
URL : https://patchwork.freedesktop.org/series/117607/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_117607v1
== Series Details ==
Series: drm/i915: RFC: Introduce Wa_14011282866
URL : https://patchwork.freedesktop.org/series/117604/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_117604v1
Summary
---
== Series Details ==
Series: drm/i1915/guc: Fix probe injection CI failures after recent change
URL : https://patchwork.freedesktop.org/series/117600/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_117600v1
== Series Details ==
Series: drm/i915/hwmon: Silence UBSAN uninitialized bool variable warning
URL : https://patchwork.freedesktop.org/series/117591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_117591v1
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev11)
URL : https://patchwork.freedesktop.org/series/112647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_112647v11
Summary
---
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev10)
URL : https://patchwork.freedesktop.org/series/112647/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13131 -> Patchwork_112647v10
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915/mtl: Extend Wa_16014892111 to MTL
URL : https://patchwork.freedesktop.org/series/117607/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
>
alan:snip
>
> Assuming that:
>
> 2 = PXP feature is supported but should be ready soon (pending
> initialization of non-i915 system dependencies).
>
> really means, "it'll be ready soon or there is a bug somewhere",
>
> Acked-by: Jordan Justen
>
> If Mesa finds that it can't
== Series Details ==
Series: drm/i915: RFC: Introduce Wa_14011282866
URL : https://patchwork.freedesktop.org/series/117604/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
MTL reuses the tuning parameters for DG2. Extend the dg2
performance tuning parameters to MTL.
Bspec: 68331
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff
The dg2 workaround which is used for performance tuning
is needed for Meteorlake.
Bspec: 68331
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 2023-05-10 15:00:03, Teres Alexis, Alan Previn wrote:
>
> alan:snip
>
> > This is why I asked if it was it was "basically certain that in a
> > production environment, then it will eventually return 1 meaning it's
> > ready". Alan's response was a little ambiguous on this point.
> alan: if we
Hi,
On Tue, May 09, 2023 at 09:59:42AM -0700, fei.y...@intel.com wrote:
> From: Fei Yang
>
> To comply with the design that buffer objects shall have immutable
> cache setting through out their life cycle, {set, get}_caching ioctl's
> are no longer supported from MTL onward. With that change
alan:snip
> This is why I asked if it was it was "basically certain that in a
> production environment, then it will eventually return 1 meaning it's
> ready". Alan's response was a little ambiguous on this point.
alan: if we get a '2' and never transition to '1' - thats a kernel bug or
firmware
From: Tilak Tangudu
Wa_14011282866 applies to RKL, ADL-S, ADL-P and TGL.
Allocate buffer pinned to GGTT and add WA to restore sampler power
context.
Bspec: 46247
Signed-off-by: Matt Atwood
Signed-off-by: Tilak Tangudu
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 5 ++
...fixing some Cc email addresses I somehow mangled.
On 2023-05-10 12:40:07, Souza, Jose wrote:
> On Mon, 2023-05-08 at 17:49 +, Teres Alexis, Alan Previn wrote:
> > On Fri, 2023-05-05 at 00:39 -0700, Justen, Jordan L wrote:
> > > On 2023-05-04 22:30:07, Teres Alexis, Alan Previn wrote:
> > >
On 2023-05-10 12:40:07, Souza, Jose wrote:
> On Mon, 2023-05-08 at 17:49 +, Teres Alexis, Alan Previn wrote:
> > On Fri, 2023-05-05 at 00:39 -0700, Justen, Jordan L wrote:
> > > On 2023-05-04 22:30:07, Teres Alexis, Alan Previn wrote:
> > > > On Thu, 2023-04-27 at 16:48 -0700, Teres Alexis,
From: John Harrison
A recent change bumped a 'notice' message up to 'error' level for
debug builds to help trap incorrect configurations in CI systems.
Unfortunaetly, tha error condition in question is triggered by the
error injection probe test. So change the message again to be 'probe
error'
> > > > > Because of the additional firmware, component-driver and
> > > > > initialization depedencies required on MTL platform before a
> > > > > PXP context can be created, UMD calling for PXP creation as a
> > > > > way to get-caps can take a long time. An actual real world
> > > > > customer
On Mon, 2023-05-08 at 17:49 +, Teres Alexis, Alan Previn wrote:
> On Fri, 2023-05-05 at 00:39 -0700, Justen, Jordan L wrote:
> > On 2023-05-04 22:30:07, Teres Alexis, Alan Previn wrote:
> > > On Thu, 2023-04-27 at 16:48 -0700, Teres Alexis, Alan Previn wrote:
> > > > Because of the additional
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev11)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev11)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim checkpatch failed
b96ff8f3b576 drm/i915/pxp: Add GSC-CS back-end resource init and cleanup
Traceback (most recent call last):
Hello,
On Wed, May 10, 2023 at 04:59:01PM +0200, Maarten Lankhorst wrote:
> The misc controller is not granular enough. A single computer may have any
> number of
> graphics cards, some of them with multiple regions of vram inside a single
> card.
Extending the misc controller to support
Loading i915 on UBSAN enabled kernels (CONFIG_UBSAN/CONFIG_UBSAN_BOOL)
causes the following warning:
UBSAN: invalid-load in drivers/gpu/drm/i915/gt/uc/intel_uc.c:558:2
load of value 255 is not a valid value for type '_Bool'
Call Trace:
dump_stack_lvl+0x57/0x7d
ubsan_epilogue+0x5/0x40
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev10)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev10)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim checkpatch failed
91f20ccd4603 drm/i915/pxp: Add GSC-CS back-end resource init and cleanup
Traceback (most recent call last):
Add helper functions into a new file for heci-packet-submission.
The helpers will handle generating the MTL GSC-CS Memory-Header
and submission of the Heci-Cmd-Packet instructions to the engine.
NOTE1: These common functions for heci-packet-submission will be used
by different i915 callers:
Enable PXP with MTL-GSC-CS: add the has_pxp into device info
and increase the debugfs teardown timeouts to align with
new GSC-CS + firmware specs.
Now that we have 3 places that are selecting pxp timeouts
based on tee vs gsccs back-end, let's add a helper.
Signed-off-by: Alan Previn
Because of the additional firmware, component-driver and
initialization depedencies required on MTL platform before a
PXP context can be created, UMD calling for PXP creation as a
way to get-caps can take a long time. An actual real world
customer stack has seen this happen in the 4-to-8 second
Add helper functions into a new file for heci-packet-submission.
The helpers will handle generating the MTL GSC-CS Memory-Header
and submission of the Heci-Cmd-Packet instructions to the engine.
NOTE1: These common functions for heci-packet-submission will be used
by different i915 callers:
On legacy platforms, KCR HW enabling is done at the time the mei
component interface is bound. It's also disabled during unbind.
However, for MTL onwards, we don't depend on a tee component
to start sending GSC-CS firmware messages.
Thus, immediately enable (or disable) KCR HW on PXP's init,
fini
Add MTL's function for ARB session creation using PXP firmware
version 4.3 ABI structure format.
While relooking at the ARB session creation flow in intel_pxp_start,
let's address missing UAPI documentation. Without actually changing
backward compatible behavior, update i915's drm-uapi comments
Add MTL hw-plumbing enabling for KCR operation under PXP
which includes:
1. Updating 'pick-gt' to get the media tile for
KCR interrupt handling
2. Adding MTL's KCR registers for PXP operation
(init, status-checking, etc.).
While doing #2, lets create a separate registers header file for
Add GSC engine based method for sending PXP firmware packets
to the GSC firmware for MTL (and future) products.
Use the newly added helpers to populate the GSC-CS memory
header and send the message packet to the FW by dispatching
the GSC_HECI_CMD_PKT instruction on the GSC engine.
We use
For MTL, the PXP back-end transport uses the GSC engine to submit
HECI packets through the HW to the GSC firmware for PXP arb
session management. This submission uses a non-priveleged
batch buffer, a buffer for the command packet and of course
a context targeting the GSC-CS.
Thus for MTL, we need
This series enables PXP on MTL. On ADL/TGL platforms, we rely on
the mei driver via the i915-mei PXP component interface to establish
a connection to the security firmware via the HECI device interface.
That interface is used to create and teardown the PXP ARB session.
PXP ARB session is created
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 578215f3e21c472c08d70b8796edf1ac58f88578 Add linux-next specific
files for 20230510
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202304140707.coh337ux-...@intel.com
Warning
On Wed, May 10, 2023 at 04:47:57PM +0300, Ville Syrjälä wrote:
> On Tue, May 09, 2023 at 02:14:41PM +0300, Stanislav Lisovskiy wrote:
> > There is a suspicion that we might not have all bigjoiner pipes
> > set in correspodent mask, which leads to that not all crtc are added to the
> > state,
> >
Hey,
On 2023-05-05 21:50, Tejun Heo wrote:
Hello,
On Wed, May 03, 2023 at 10:34:56AM +0200, Maarten Lankhorst wrote:
RFC as I'm looking for comments.
For long running compute, it can be beneficial to partition the GPU memory
between cgroups, so each cgroup can use its maximum amount of
On Thu, 04 May 2023, Suraj Kandpal wrote:
> Since topology state is being added to drm_atomic_state now all
> drm_modeset_lock required are being taken from core this raises
> an issue when we try to loop over connector and assign vcpi id to
> our streams as we did not have atomic state to derive
On Wed, May 10, 2023 at 05:03:17PM +0300, Ville Syrjälä wrote:
> On Wed, May 10, 2023 at 01:31:30PM +0300, Imre Deak wrote:
> > Call the TypeC port flush_work and cleanup handlers without the modeset
> > locks held. These don't require the locks, as the work takes - as it
> > should be able to at
On Wed, May 10, 2023 at 01:31:30PM +0300, Imre Deak wrote:
> Call the TypeC port flush_work and cleanup handlers without the modeset
> locks held. These don't require the locks, as the work takes - as it
> should be able to at any point in time - any locks it needs and by the
> time cleanup is
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev11)
URL : https://patchwork.freedesktop.org/series/117004/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13129_full -> Patchwork_117004v11_full
On Tue, May 09, 2023 at 02:14:41PM +0300, Stanislav Lisovskiy wrote:
> There is a suspicion that we might not have all bigjoiner pipes
> set in correspodent mask, which leads to that not all crtc are added to the
> state,
> however because we are copying for instance crtc reference from master
On Tue, 09 May 2023, Juha-Pekka Heikkila wrote:
> Add Tile4 type ccs modifiers with aux buffer needed for MTL
Please send this Cc: dri-devel too.
BR,
Jani.
>
> Signed-off-by: Juha-Pekka Heikkila
> ---
> include/uapi/drm/drm_fourcc.h | 43 +++
> 1 file changed,
Hi Lucas,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.4-rc1 next-20230510]
[cannot apply to drm-misc/drm-misc-next]
[If your patch is applied
== Series Details ==
Series: drm/i915: Fix typo in intel_frontbuffer
URL : https://patchwork.freedesktop.org/series/117567/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13129_full -> Patchwork_117567v1_full
Summary
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev11)
URL : https://patchwork.freedesktop.org/series/117004/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13129 -> Patchwork_117004v11
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev11)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev11)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim checkpatch failed
1c6ca42f5da6 drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
If the output on a DP-alt link with its sink disconnected is kept
enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout
will cause havoc on the PCI bus, at least for other GFX devices on it
which will stop powering up. Since user space is not guaranteed to do a
disabling modeset
Call the TypeC port flush_work and cleanup handlers without the modeset
locks held. These don't require the locks, as the work takes - as it
should be able to at any point in time - any locks it needs and by the
time cleanup is called and after cleanup returns the encoder is not in
use.
This is
This patch simplifying the handling of modeset locks and atomic state
for an atomic commit is based on
https://lore.kernel.org/all/20210715184954.7794-2-ville.syrj...@linux.intel.com/
adding the helper to i915. I find this approach preferrable than
open-coding the corresponding steps (fixed for
Factor out a helper used by a follow up patch to reset an active DP
link.
No functional changes.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
Add functions for printing link training debug and error messages, both
to prepare for the next patch, which downgrades an error to a debug
message if the sink is disconnected and to remove some code duplication.
v2: (Ville)
- Always print the connector prefix.
- Preserve the drm_dbg_kms() debug
Prevent downgrading the link training maximum lane count/rate if the
sink is disconnected - and so the link training failure is expected. In
such cases modeset failures due to the reduced max link params would be
just confusing for user space (instead of which the correct thing it
should act on is
If a sink is disconnected it's expected that link training actions will
fail on it, so downgrade the error messages about such actions to be a
debug message. Such - expected - link training failures are more
frequent after a follow up patch, after which an active TypeC link is
reset after the sink
Factor out a function setting the encoder and CRTC in the connector
atomic state, required by a follow up patch.
No functional changes.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_modeset_setup.c| 28 +--
1 file
During HW readout/sanitization CRTCs can be disabled only if they don't
have an attached encoder (and so the encoder disable hooks don't need to
be called). An upcoming patch will need to disable CRTCs also with an
attached encoder, so add support for this.
For bigjoiner configs the encoder
Split calling the CRTC/encoder disabling hooks and updating the CRTC and
DPLL object states from updating the CRTC and atomic state and other
global state (BW, CDCLK, DBUF) into separate functions. When disabling a
bigjoiner configuration the latter step can be done only after all the
linked pipes
Make sure that the CRTC state is reset correctly, as expected after
disabling the CRTC.
In particular this change will:
- Zero all the CSC blob pointers after intel_crtc_free_hw_state()
has freed them.
- Zero the shared DPLL and port PLL pointers and clear the
corresponding CRTC reference
Add helpers to reference/unreference a shared DPLL tracking the use of
it by a given CRTC.
This prepares for the next patch, which unreferences a DPLL during CRTC
HW-readout/sanitization.
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Imre Deak
---
During HW state readout/sanitization an up-to-date connector atomic
state will be required by a follow-up patch, which can disable CRTCs
with an encoder (and calling the correct encoder hooks happens via the
connector atomic state encoder pointer). So update the connector state
already before the
For a bigjoiner configuration display->crtc_disable() will be called
first for the slave CRTCs and then for the master CRTC. However slave
CRTCs will be actually disabled only after the master CRTC is disabled
(from the encoder disable hooks called with the master CRTC state).
Hence the slave
This is v4 of [1], addressing the review comments from Ville, Vinod and
Jani. Patch 13/14 also fixes an issue canceling the link reset work
synchronously during system suspend and driver cleanup.
Cc: Ville Syrjälä
Cc: Vinod Govindapillai
Cc: Jani Nikula
[1]
== Series Details ==
Series: drm/i915: Fix typo in intel_frontbuffer
URL : https://patchwork.freedesktop.org/series/117567/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13129 -> Patchwork_117567v1
Summary
---
== Series Details ==
Series: drm/i915: Fix typo in intel_frontbuffer
URL : https://patchwork.freedesktop.org/series/117567/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Jouni,
On Wed, May 10, 2023 at 11:50:43AM +0300, Jouni Högander wrote:
> Fix obvious typo in intel_frontbuffer forward declaration.
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
Fix obvious typo in intel_frontbuffer forward declaration.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
On Tue, 09 May 2023 10:25:16 -0700, Dixit, Ashutosh wrote:
>
> On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
> >
> > From: Tvrtko Ursulin
> >
> > We do not want to have timers per tile and waste CPU cycles and energy via
> > multiple wake-up sources, for a relatively
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