Re: [Intel-gfx] [PATCH v5 00/10] Enhance vfio PCI hot reset for vfio cdev device

2023-05-17 Thread Xu, Terrence
> -Original Message- > From: Liu, Yi L > Subject: [PATCH v5 00/10] Enhance vfio PCI hot reset for vfio cdev device > > VFIO_DEVICE_PCI_HOT_RESET requires user to pass an array of group fds to > prove that it owns all devices affected by resetting the calling device. While > for cdev

Re: [Intel-gfx] [PATCH v11 00/23] Add vfio_device cdev for iommufd support

2023-05-17 Thread Xu, Terrence
> -Original Message- > From: Liu, Yi L > Subject: [PATCH v11 00/23] Add vfio_device cdev for iommufd support > > Existing VFIO provides group-centric user APIs for userspace. Userspace > opens the /dev/vfio/$group_id first before getting device fd and hence > getting access to device.

Re: [Intel-gfx] [Intel-xe] [PATCH 2/5] drm/i915: Convert INTEL_INFO()->display to a pointer

2023-05-17 Thread Lucas De Marchi
On Wed, May 17, 2023 at 08:18:01PM -0700, Matt Roper wrote: Rather than embeddeding the display's device info within the main device info structure, just provide a pointer to the display-specific structure. This is in preparation for moving the display device info definitions into the display

Re: [Intel-gfx] [Intel-xe] [PATCH 1/5] drm/i915/display: Move display device info to header under display/

2023-05-17 Thread Lucas De Marchi
On Wed, May 17, 2023 at 08:18:00PM -0700, Matt Roper wrote: Moving display-specific substruture definitions will help keep display more self-contained and make it easier to re-use in other drivers (i.e., Xe) in the future. Signed-off-by: Matt Roper ---

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: Move display identification/probing under display/

2023-05-17 Thread Patchwork
== Series Details == Series: i915: Move display identification/probing under display/ URL : https://patchwork.freedesktop.org/series/117931/ State : success == Summary == CI Bug Log - changes from CI_DRM_13162 -> Patchwork_117931v1 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Move display identification/probing under display/

2023-05-17 Thread Patchwork
== Series Details == Series: i915: Move display identification/probing under display/ URL : https://patchwork.freedesktop.org/series/117931/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Move display identification/probing under display/

2023-05-17 Thread Patchwork
== Series Details == Series: i915: Move display identification/probing under display/ URL : https://patchwork.freedesktop.org/series/117931/ State : warning == Summary == Error: dim checkpatch failed 9c8f732467ae drm/i915/display: Move display device info to header under display/ Traceback

[Intel-gfx] [PATCH 4/5] drm/i915/display: Make display responsible for probing its own IP

2023-05-17 Thread Matt Roper
Rather than selecting the display IP and feature flags at the same time the general PCI probing happens, move this step into the display code itself so that it can be more easily re-used outside of i915 (i.e., by the Xe driver). Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/Makefile

[Intel-gfx] [PATCH 0/5] i915: Move display identification/probing under display/

2023-05-17 Thread Matt Roper
Since i915's display code will soon be shared by two DRM drivers (i915 and Xe), it makes sense for the display code itself to be responsible for recognizing the platform it's running on rather than relying on the making the top-level DRM driver handle this. This also becomes more important for

[Intel-gfx] [PATCH 1/5] drm/i915/display: Move display device info to header under display/

2023-05-17 Thread Matt Roper
Moving display-specific substruture definitions will help keep display more self-contained and make it easier to re-use in other drivers (i.e., Xe) in the future. Signed-off-by: Matt Roper --- .../drm/i915/display/intel_display_device.h | 60 +++

[Intel-gfx] [PATCH 3/5] drm/i915/display: Move display runtime info to display structure

2023-05-17 Thread Matt Roper
Move the runtime info specific to display into display-specific structures as has already been done with the constant display info. Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_crtc.c | 2 +- drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-

[Intel-gfx] [PATCH 5/5] drm/i915/display: Handle GMD_ID identification in display code

2023-05-17 Thread Matt Roper
For platforms with GMD_ID support (i.e., everything MTL and beyond), identification of the display IP present should be based on the contents of the GMD_ID register rather than a PCI devid match. Note that since GMD_ID readout requires access to the PCI BAR, a slight change to the driver init

[Intel-gfx] [PATCH 2/5] drm/i915: Convert INTEL_INFO()->display to a pointer

2023-05-17 Thread Matt Roper
Rather than embeddeding the display's device info within the main device info structure, just provide a pointer to the display-specific structure. This is in preparation for moving the display device info definitions into the display code itself and for eventually allowing the pointer to be

Re: [Intel-gfx] [PATCH v6 6/7] drm/i915/pmu: Prepare for multi-tile non-engine counters

2023-05-17 Thread Dixit, Ashutosh
On Wed, 17 May 2023 13:55:41 -0700, Umesh Nerlige Ramappa wrote: > > From: Tvrtko Ursulin > > Reserve some bits in the counter config namespace which will carry the > tile id and prepare the code to handle this. > > No per tile counters have been added yet. > > v2: > - Fix checkpatch issues > -

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/i915/mtl: Add MTL performance tuning changes

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/i915/mtl: Add MTL performance tuning changes URL : https://patchwork.freedesktop.org/series/117923/ State : success == Summary == CI Bug Log - changes from CI_DRM_13161 -> Patchwork_117923v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v5,1/2] drm/i915/mtl: Add MTL performance tuning changes

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/i915/mtl: Add MTL performance tuning changes URL : https://patchwork.freedesktop.org/series/117923/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] [PATCH v5 1/2] drm/i915/mtl: Add MTL performance tuning changes

2023-05-17 Thread Radhakrishna Sripada
MTL reuses the tuning parameters for DG2. Extend the dg2 performance tuning parameters to MTL. v2: Add DRAW_WATERMARK tuning parameter. v3: Limit DRAW_WATERMARK tuning to non A0 step. v4: Reorder platform checks. Restrict Blend fill caching optimization to Render GT. v5: Move mtl tuning

[Intel-gfx] [PATCH v5 2/2] drm/i915/mtl: Extend Wa_16014892111 to MTL A-step

2023-05-17 Thread Radhakrishna Sripada
Like DG2, MTL a-step hardware is subject to Wa_16014892111 which requires that any changes made to the DRAW_WATERMARK register be done via an INDIRECT_CTX batch buffer rather than through a regular context workaround. The bspec gives the same non-default recommended tuning value for

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8) URL : https://patchwork.freedesktop.org/series/114473/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13158_full -> Patchwork_114473v8_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Enhance vfio PCI hot reset for vfio cdev device (rev3)

2023-05-17 Thread Patchwork
== Series Details == Series: Enhance vfio PCI hot reset for vfio cdev device (rev3) URL : https://patchwork.freedesktop.org/series/116991/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/116991/revisions/3/mbox/ not applied Applying: vfio-iommufd:

Re: [Intel-gfx] [PATCH v5 09/10] vfio/pci: Extend VFIO_DEVICE_GET_PCI_HOT_RESET_INFO for vfio device cdev

2023-05-17 Thread Alex Williamson
On Sat, 13 May 2023 06:21:35 -0700 Yi Liu wrote: > This makes VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl to use the iommufd_ctx s/makes/allows/? s/to// > of the cdev device to check the ownership of the other affected devices. > > This returns devid for each of the affected devices. If it is

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add MTL PMU support for multi-gt

2023-05-17 Thread Patchwork
== Series Details == Series: Add MTL PMU support for multi-gt URL : https://patchwork.freedesktop.org/series/117913/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add MTL PMU support for multi-gt

2023-05-17 Thread Patchwork
== Series Details == Series: Add MTL PMU support for multi-gt URL : https://patchwork.freedesktop.org/series/117913/ State : warning == Summary == Error: dim checkpatch failed 210d9b13e02b drm/i915/pmu: Change bitmask of enabled events to u32 1c19f595d54a drm/i915/pmu: Support PMU for all

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mtl: do not enable render power-gating on MTL (rev2)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/mtl: do not enable render power-gating on MTL (rev2) URL : https://patchwork.freedesktop.org/series/117883/ State : success == Summary == CI Bug Log - changes from CI_DRM_13160 -> Patchwork_117883v2

Re: [Intel-gfx] [PATCH v2 2/8] drm/i915/uc: perma-pin firmwares

2023-05-17 Thread Ceraolo Spurio, Daniele
On 5/17/2023 1:59 PM, John Harrison wrote: On 4/28/2023 11:58, Daniele Ceraolo Spurio wrote: Now that each FW has its own reserved area, we can keep them always pinned and skip the pin/unpin dance on reset. This will make things easier for the 2-step HuC authentication, which requires the FW

Re: [Intel-gfx] [PATCH v2] drm/i915/huc: Parse the GSC-enabled HuC binary

2023-05-17 Thread John Harrison
On 5/2/2023 08:27, Daniele Ceraolo Spurio wrote: The new binaries that support the 2-step authentication have contain the have contain? legacy-style binary, which we can use for loading the HuC via DMA. To find out where this is located in the image, we need to parse the meu 'meu manifest'

Re: [Intel-gfx] [PATCH v2 2/8] drm/i915/uc: perma-pin firmwares

2023-05-17 Thread John Harrison
On 4/28/2023 11:58, Daniele Ceraolo Spurio wrote: Now that each FW has its own reserved area, we can keep them always pinned and skip the pin/unpin dance on reset. This will make things easier for the 2-step HuC authentication, which requires the FW to be pinned in GGTT after the xfer is

[Intel-gfx] [PATCH v6 5/7] drm/i915/pmu: Add reference counting to the sampling timer

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin We do not want to have timers per tile and waste CPU cycles and energy via multiple wake-up sources, for a relatively un-important task of PMU sampling, so keeping a single timer works well. But we also do not want the first GT which goes idle to turn off the timer. Add

[Intel-gfx] [PATCH v6 4/7] drm/i915/pmu: Transform PMU parking code to be GT based

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin Trivial prep work for full multi-tile enablement later. Signed-off-by: Tvrtko Ursulin Signed-off-by: Vinay Belgaumkar Reviewed-by: Umesh Nerlige Ramappa Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--

[Intel-gfx] [PATCH v6 6/7] drm/i915/pmu: Prepare for multi-tile non-engine counters

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin Reserve some bits in the counter config namespace which will carry the tile id and prepare the code to handle this. No per tile counters have been added yet. v2: - Fix checkpatch issues - Use 4 bits for gt id in non-engine counters. Drop FIXME. - Set MAX GTs to 4. Drop

[Intel-gfx] [PATCH v6 3/7] drm/i915/pmu: Skip sampling engines with no enabled counters

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin As we have more and more engines do not waste time sampling the ones no- one is monitoring. Signed-off-by: Tvrtko Ursulin Reviewed-by: Umesh Nerlige Ramappa Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_pmu.c | 3 +++ 1 file changed, 3 insertions(+)

[Intel-gfx] [PATCH v6 0/7] Add MTL PMU support for multi-gt

2023-05-17 Thread Umesh Nerlige Ramappa
With MTL, frequency and rc6 counters are specific to a gt. Export these counters via gt-specific events to the user space. v2: Remove aggregation support from kernel v3: Review comments (Ashutosh, Tvrtko) v4: - Include R-b for 6/6 - Add Test-with - Fix versioning info in cover letter v5: -

[Intel-gfx] [PATCH v6 1/7] drm/i915/pmu: Change bitmask of enabled events to u32

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin Having it as u64 was a confusing (but harmless) mistake. Also add some asserts to make sure the internal field does not overflow in the future. v2: Fix WARN_ON firing for INTERRUPT event (Umesh) Signed-off-by: Tvrtko Ursulin Signed-off-by: Umesh Nerlige Ramappa

[Intel-gfx] [PATCH v6 2/7] drm/i915/pmu: Support PMU for all engines

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin Given how the metrics are already exported, we also need to run sampling over engines from all GTs. Problem of GT frequencies is left for later. Signed-off-by: Tvrtko Ursulin Reviewed-by: Umesh Nerlige Ramappa Signed-off-by: Umesh Nerlige Ramappa ---

[Intel-gfx] [PATCH v6 7/7] drm/i915/pmu: Export counters from all tiles

2023-05-17 Thread Umesh Nerlige Ramappa
From: Tvrtko Ursulin Start exporting frequency and RC6 counters from all tiles. Existing counters keep their names and config values and new one use the namespace added in the previous patch, with the "-gtN" added to their names. Interrupts counter is an odd one off. Because it is the global

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL URL : https://patchwork.freedesktop.org/series/117912/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13160 -> Patchwork_117912v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL URL : https://patchwork.freedesktop.org/series/117912/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [CI,DO_NOT_MERGE,1/3] drm/i915/mtl: do not enable render power-gating on MTL URL : https://patchwork.freedesktop.org/series/117912/ State : warning == Summary == Error: dim checkpatch failed 51fd4c7e1efa drm/i915/mtl: do not enable render

Re: [Intel-gfx] [PATCH v5 1/7] drm/i915/pmu: Change bitmask of enabled events to u32

2023-05-17 Thread Dixit, Ashutosh
On Wed, 17 May 2023 13:15:14 -0700, Umesh Nerlige Ramappa wrote: > > Leaving it as is. @Ashutosh, okay to use your R-b without any changes to > this patch? Yes. Reviewed-by: Ashutosh Dixit

Re: [Intel-gfx] [PATCH v5 1/7] drm/i915/pmu: Change bitmask of enabled events to u32

2023-05-17 Thread Umesh Nerlige Ramappa
On Wed, May 17, 2023 at 09:25:03AM -0700, Dixit, Ashutosh wrote: On Wed, 17 May 2023 01:26:15 -0700, Tvrtko Ursulin wrote: On 17/05/2023 07:55, Umesh Nerlige Ramappa wrote: > On Tue, May 16, 2023 at 05:25:50PM -0700, Dixit, Ashutosh wrote: >> On Tue, 16 May 2023 16:35:28 -0700, Umesh Nerlige

Re: [Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Rodrigo Vivi
the right lineage number for 1401266. > > Besides, 1401266 is for DG2 anyway. > > > > Let's keep the way Adrzej put with the BSPec reference besides the > > lineage. > > Makes sense, didn't realize 1401266  is much older. > > Thanks! > > > > > > > > > > +

[Intel-gfx] [CI DO_NOT_MERGE 1/3] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Andrzej Hajda
Multiple CI tests fails with forcewake ack timeouts if render power gating is enabled. BSpec 52698 clearly states it should be 0 for MTL. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4983 Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_rc6.c | 5 +++-- 1 file

[Intel-gfx] [CI DO_NOT_MERGE 3/3] drm/i915/selftests: add forcewake_with_spinners tests

2023-05-17 Thread Andrzej Hajda
The test examines if running spinners do not interfere with forcewake. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/i915/selftests/intel_uncore.c | 85 +++ 1 file changed, 85 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c

[Intel-gfx] [CI DO_NOT_MERGE 2/3] drm/i915/gt: do not enable render and media power-gating on ADL

2023-05-17 Thread Andrzej Hajda
Multiple CI tests fails with forcewake timeouts. Disabling power gating for render and media solves the issue. References: https://gitlab.freedesktop.org/drm/intel/-/issues/4983 Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_rc6.c | 3 +++ 1 file changed, 3 insertions(+) diff

Re: [Intel-gfx] [PATCH v5 08/10] iommufd: Add iommufd_ctx_has_group()

2023-05-17 Thread Alex Williamson
On Sat, 13 May 2023 06:21:34 -0700 Yi Liu wrote: > to check if any device within the given iommu_group has been bound with Nit, I find these commit logs where the subject line is intended to flow into the commit log to form a complete sentence difficult to read. I expect complete thoughts

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/mtl: do not enable render power-gating on MTL URL : https://patchwork.freedesktop.org/series/117883/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13160 -> Patchwork_117883v1 Summary

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/mtl: Add MTL performance tuning changes

2023-05-17 Thread Gustavo Sousa
Quoting Radhakrishna Sripada (2023-05-16 21:40:45-03:00) >MTL reuses the tuning parameters for DG2. Extend the dg2 >performance tuning parameters to MTL. > >v2: Add DRAW_WATERMARK tuning parameter. >v3: Limit DRAW_WATERMARK tuning to non A0 step. >v4: Reorder platform checks. >Restrict Blend

Re: [Intel-gfx] [PATCH v5 07/10] vfio: Add helper to search vfio_device in a dev_set

2023-05-17 Thread Alex Williamson
On Sat, 13 May 2023 06:21:33 -0700 Yi Liu wrote: > There are drivers that need to search vfio_device within a given dev_set. > e.g. vfio-pci. So add a helper. > > Signed-off-by: Yi Liu > --- > drivers/vfio/pci/vfio_pci_core.c | 8 +++- > drivers/vfio/vfio_main.c | 15

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Allow user to set cache at BO creation

2023-05-17 Thread Yang, Fei
> On 16/05/2023 19:11, fei.y...@intel.com wrote: >> From: Fei Yang >> >> To comply with the design that buffer objects shall have immutable >> cache setting through out their life cycle, {set, get}_caching ioctl's >> are no longer supported from MTL onward. With that change caching >> policy can

[Intel-gfx] [PULL] drm-intel-fixes

2023-05-17 Thread Joonas Lahtinen
Hi Dave & Daniel, Here goes drm-intel-fixes for v6.4-rc3. Just one missing null check addition for HDCP code. Regards, Joonas *** drm-intel-fixes-2023-05-17: Add missing null check for HDCP code. The following changes since commit f1fcbaa18b28dec10281551dfe6ed3a3ed80e3d6: Linux 6.4-rc2

Re: [Intel-gfx] [PATCH v5 06/10] vfio-iommufd: Add helper to retrieve iommufd_ctx and devid for vfio_device

2023-05-17 Thread Jason Gunthorpe
On Wed, May 17, 2023 at 12:40:32PM -0600, Alex Williamson wrote: > On Wed, 17 May 2023 15:22:27 -0300 > Jason Gunthorpe wrote: > > > On Wed, May 17, 2023 at 12:15:17PM -0600, Alex Williamson wrote: > > > > > > +int vfio_iommufd_physical_devid(struct vfio_device *vdev) > > > > +{ > > > > +

Re: [Intel-gfx] [PATCH v5 06/10] vfio-iommufd: Add helper to retrieve iommufd_ctx and devid for vfio_device

2023-05-17 Thread Alex Williamson
On Wed, 17 May 2023 15:22:27 -0300 Jason Gunthorpe wrote: > On Wed, May 17, 2023 at 12:15:17PM -0600, Alex Williamson wrote: > > > > +int vfio_iommufd_physical_devid(struct vfio_device *vdev) > > > +{ > > > + if (vdev->iommufd_device) > > > + return

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Use large rings for compute contexts (rev2)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/gem: Use large rings for compute contexts (rev2) URL : https://patchwork.freedesktop.org/series/117814/ State : success == Summary == CI Bug Log - changes from CI_DRM_13160 -> Patchwork_117814v2

Re: [Intel-gfx] [PATCH v5 06/10] vfio-iommufd: Add helper to retrieve iommufd_ctx and devid for vfio_device

2023-05-17 Thread Jason Gunthorpe
On Wed, May 17, 2023 at 12:15:17PM -0600, Alex Williamson wrote: > > +int vfio_iommufd_physical_devid(struct vfio_device *vdev) > > +{ > > + if (vdev->iommufd_device) > > + return iommufd_device_to_id(vdev->iommufd_device); > > + if (vdev->noiommu_access) > > + return

Re: [Intel-gfx] [PATCH v5 01/10] vfio-iommufd: Create iommufd_access for noiommu devices

2023-05-17 Thread Jason Gunthorpe
On Wed, May 17, 2023 at 11:26:09AM -0600, Alex Williamson wrote: > It's not clear to me why we need a separate iommufd_access for > noiommu. The point was to allocate an ID for the device so we can use that ID with the other interfaces in all cases. Otherwise it is a too weird special case that

Re: [Intel-gfx] [PATCH 3/3] media: v4l2-core: Describe privacy_led field of v4l2_subdev

2023-05-17 Thread Sakari Ailus
Hi Bagas, On Fri, Feb 03, 2023 at 05:02:15PM +0700, Bagas Sanjaya wrote: > Stephen Rothwell reported htmldocs warning: > > include/media/v4l2-subdev.h:1088: warning: Function parameter or member > 'privacy_led' not described in 'v4l2_subdev' > > Describe privacy_led field to fix the warning. >

Re: [Intel-gfx] [PATCH v5 06/10] vfio-iommufd: Add helper to retrieve iommufd_ctx and devid for vfio_device

2023-05-17 Thread Alex Williamson
On Sat, 13 May 2023 06:21:32 -0700 Yi Liu wrote: > This is needed by the vfio-pci driver to report affected devices in the > hot reset for a given device. > > Signed-off-by: Yi Liu > --- > drivers/iommu/iommufd/device.c | 24 > drivers/vfio/iommufd.c | 20

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Add workaround 14016712196 (rev2)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/gt: Add workaround 14016712196 (rev2) URL : https://patchwork.freedesktop.org/series/117661/ State : success == Summary == CI Bug Log - changes from CI_DRM_13160 -> Patchwork_117661v2 Summary ---

Re: [Intel-gfx] [PATCH v5 01/10] vfio-iommufd: Create iommufd_access for noiommu devices

2023-05-17 Thread Alex Williamson
On Sat, 13 May 2023 06:21:27 -0700 Yi Liu wrote: > This binds noiommu device to iommufd and creates iommufd_access for this > bond. This is useful for adding an iommufd-based device ownership check > for VFIO_DEVICE_PCI_HOT_RESET since this model requires all the other > affected devices bound

Re: [Intel-gfx] [PULL] drm-misc-next

2023-05-17 Thread Thomas Zimmermann
Ping! This appears to be unmerged. Let me know if there's anything wrong with the PR. Am 11.05.23 um 09:28 schrieb Maxime Ripard: Hi, Here's the first drm-misc-next PR for 6.5 Please note that I'll be off for about a month starting next week, and Thomas has kindly agreed to fill in. Thanks!

Re: [Intel-gfx] [PATCH v5 1/7] drm/i915/pmu: Change bitmask of enabled events to u32

2023-05-17 Thread Dixit, Ashutosh
On Wed, 17 May 2023 01:26:15 -0700, Tvrtko Ursulin wrote: > > > On 17/05/2023 07:55, Umesh Nerlige Ramappa wrote: > > On Tue, May 16, 2023 at 05:25:50PM -0700, Dixit, Ashutosh wrote: > >> On Tue, 16 May 2023 16:35:28 -0700, Umesh Nerlige Ramappa wrote: > >>> > >> > >> Hi Umesh/Tvrtko, > >> > >>

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,DO_NOT_MERGE,1/2] drm/i915/mtl: do not enable render power-gating on MTL (rev2)

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [CI,DO_NOT_MERGE,1/2] drm/i915/mtl: do not enable render power-gating on MTL (rev2) URL : https://patchwork.freedesktop.org/series/117839/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13154_full -> Patchwork_117839v2_full

Re: [Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Das, Nirmoy
   pg_enable = GEN9_MEDIA_PG_ENABLE | --- base-commit: 01d3dd92d1b71421f6ee85e1bea829e0a917d979 change-id: 20230517-mtl_disable_render_pg-b9f9f1567f9e ^ unwanted artifacts ?   Otherwise this looks good to me. Reviewed-by: Nirmoy Das with the artifacts removed: Reviewed

Re: [Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Andrzej Hajda
red. +    if (IS_METEORLAKE(gt->i915) || +    IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||   IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))   pg_enable =   GEN9_MEDIA_PG_ENABLE | --- base-commit: 01d3dd92d1b71421f6ee85e1bea829e0a917d979 change-

Re: [Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Vivi, Rodrigo
; +   if (IS_METEORLAKE(gt->i915) || > > +   IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) > > || > >     IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0)) > > pg_enable = > > GEN9_MEDIA_PG_ENABL

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/color: register & get config abstractions

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/color: register & get config abstractions URL : https://patchwork.freedesktop.org/series/117875/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13159 -> Patchwork_117875v1 Summary

Re: [Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Das, Nirmoy
(gt->i915, G11, STEP_A0, STEP_B0)) pg_enable = GEN9_MEDIA_PG_ENABLE | --- base-commit: 01d3dd92d1b71421f6ee85e1bea829e0a917d979 change-id: 20230517-mtl_disable_render_pg-b9f9f1567f9e ^ unwanted artifacts ?   Otherwise this looks good to me. Reviewed-by

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/color: register & get config abstractions

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/color: register & get config abstractions URL : https://patchwork.freedesktop.org/series/117875/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/color: register & get config abstractions

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915/color: register & get config abstractions URL : https://patchwork.freedesktop.org/series/117875/ State : warning == Summary == Error: dim checkpatch failed 88392f9a0c53 drm/i915/regs: split out intel_color_regs.h Traceback (most recent call last): File

Re: [Intel-gfx] [PATCH v3 03/28] drm/i915/gvt: Verify hugepages are contiguous in physical address space

2023-05-17 Thread Sean Christopherson
On Tue, May 16, 2023, Yan Zhao wrote: > hi Sean > > Do you think it's necessary to double check that struct page pointers > are also contiguous? No, the virtual address space should be irrelevant. The only way it would be problematic is if something in dma_map_page() expected to be able to

[Intel-gfx] [PATCH] drm/i915/mtl: do not enable render power-gating on MTL

2023-05-17 Thread Andrzej Hajda
| --- base-commit: 01d3dd92d1b71421f6ee85e1bea829e0a917d979 change-id: 20230517-mtl_disable_render_pg-b9f9f1567f9e Best regards, -- Andrzej Hajda

[Intel-gfx] [PATCH V2] drm/i915/gem: Use large rings for compute contexts

2023-05-17 Thread Tejas Upadhyay
From: Chris Wilson Allow compute contexts to submit the maximal amount of work without blocking userspace. The original size for user LRC ring's (SZ_16K) was chosen to minimise memory consumption, without being so small as to frequently stall in the middle of workloads. With the main consumers

[Intel-gfx] [PATCH V2] drm/i915/gt: Add workaround 14016712196

2023-05-17 Thread Tejas Upadhyay
Wa_14016712196 implementation for mtl Bspec: 72197 V2: - Fix kernel test robot warnings Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202305121525.3ewdgoby-...@intel.com/ Signed-off-by: Tejas Upadhyay --- drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 41

Re: [Intel-gfx] [PATCH v3 7/8] drm/i915/mtl: Add support for PM DEMAND

2023-05-17 Thread Jani Nikula
On Thu, 27 Apr 2023, Vinod Govindapillai wrote: > From: Mika Kahola > > Display14 introduces a new way to instruct the PUnit with > power and bandwidth requirements of DE. Add the functionality > to program the registers and handle waits using interrupts. > The current wait time for timeouts is

Re: [Intel-gfx] [PATCH] drm/i915: tweak language in fastset pipe config compare logging

2023-05-17 Thread Jani Nikula
On Tue, 16 May 2023, "Kandpal, Suraj" wrote: >> >> The "fastset mismatch" debug logging has been slightly confusing, leading >> people to believe some error happened. Change it to the more informative >> "fastset requirement not met", and add a final message about this leading to >> full modeset.

[Intel-gfx] [PATCH 6/6] drm/i915/color: move pre-SKL gamma and CSC enable read to intel_color

2023-05-17 Thread Jani Nikula
Abstract the register access better. The DSPCNTR read could be moved to either i9xx_plane.c or intel_color.c. The latter feels better, even if the register is written in the former. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_color.c | 25

[Intel-gfx] [PATCH 5/6] drm/i915/color: move SKL+ gamma and CSC enable read to intel_color

2023-05-17 Thread Jani Nikula
Abstract the platform specific register access better. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_color.c | 26 +--- drivers/gpu/drm/i915/display/intel_display.c | 12 + 2 files changed, 23 insertions(+), 15 deletions(-) diff --git

[Intel-gfx] [PATCH 4/6] drm/i915: move ILK+ CSC mode read to intel_color

2023-05-17 Thread Jani Nikula
Abstract the platform specific register access better. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_color.c | 17 + drivers/gpu/drm/i915/display/intel_display.c | 6 -- 2 files changed, 17 insertions(+), 6 deletions(-) diff --git

[Intel-gfx] [PATCH 3/6] drm/i915: move HSW+ gamma mode read to intel_color

2023-05-17 Thread Jani Nikula
Abstract the platform specific register access better. The separate hsw_read_gamma_mode() will make more sense with the following changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_color.c | 20 drivers/gpu/drm/i915/display/intel_display.c | 3 ---

[Intel-gfx] [PATCH 2/6] drm/i915/color: move CHV CGM pipe mode read to intel_color

2023-05-17 Thread Jani Nikula
Add color .get_config hook to read config other than LUTs and CSCs, and start off with CHV CGM pipe mode to abstract the platform specific register access better. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_color.c | 16

[Intel-gfx] [PATCH 1/6] drm/i915/regs: split out intel_color_regs.h

2023-05-17 Thread Jani Nikula
Declutter i915_regs.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/hsw_ips.c| 1 + drivers/gpu/drm/i915/display/intel_color.c| 1 + .../gpu/drm/i915/display/intel_color_regs.h | 272 ++ drivers/gpu/drm/i915/display/intel_display.c | 1 +

[Intel-gfx] [PATCH 0/6] drm/i915/color: register & get config abstractions

2023-05-17 Thread Jani Nikula
Move the color related registers to intel_color_regs.h and move the color config reads to intel_color_get_config() to declutter i915_reg.h and intel_display.c, respectively. BR, Jani. Jani Nikula (6): drm/i915/regs: split out intel_color_regs.h drm/i915/color: move CHV CGM pipe mode read to

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/2] drm/i915/mtl: Add MTL performance tuning changes

2023-05-17 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915/mtl: Add MTL performance tuning changes URL : https://patchwork.freedesktop.org/series/117847/ State : success == Summary == CI Bug Log - changes from CI_DRM_13154_full -> Patchwork_117847v1_full

Re: [Intel-gfx] [PATCH v7 6/8] drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parameters

2023-05-17 Thread Dmitry Baryshkov
On 17/05/2023 13:42, Kandpal, Suraj wrote: The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov LGTM. Reviewed-by: Suraj Kandpal

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8) URL : https://patchwork.freedesktop.org/series/114473/ State : success == Summary == CI Bug Log - changes from CI_DRM_13158 -> Patchwork_114473v8 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915: move DSC RC tables to drm_dsc_helper.c (rev8) URL : https://patchwork.freedesktop.org/series/114473/ State : warning == Summary == Error: dim checkpatch failed eb2b41f3d443 drm/i915/dsc: change DSC param tables to follow the DSC model 8da238066157

[Intel-gfx] ✓ Fi.CI.IGT: success for Add MTL PMU support for multi-gt

2023-05-17 Thread Patchwork
== Series Details == Series: Add MTL PMU support for multi-gt URL : https://patchwork.freedesktop.org/series/117843/ State : success == Summary == CI Bug Log - changes from CI_DRM_13154_full -> Patchwork_117843v1_full Summary ---

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: create workqueue dedicated to wake references

2023-05-17 Thread Coelho, Luciano
On Fri, 2023-05-12 at 13:16 +0100, Tvrtko Ursulin wrote: > On 12/05/2023 10:54, Coelho, Luciano wrote: > > On Fri, 2023-05-12 at 10:32 +0100, Tvrtko Ursulin wrote: > > > On 12/05/2023 10:10, Coelho, Luciano wrote: > > > > On Fri, 2023-05-12 at 10:04 +0100, Tvrtko Ursulin wrote: > > > > > On

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Allow user to set cache at BO creation (rev9)

2023-05-17 Thread Patchwork
== Series Details == Series: drm/i915: Allow user to set cache at BO creation (rev9) URL : https://patchwork.freedesktop.org/series/116870/ State : success == Summary == CI Bug Log - changes from CI_DRM_13154_full -> Patchwork_116870v9_full

Re: [Intel-gfx] [PATCH v7 6/8] drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parameters

2023-05-17 Thread Kandpal, Suraj
> > The array of rc_parameters contains a mixture of parameters from DSC 1.1 > and DSC 1.2 standards. Split these tow configuration arrays in preparation to > adding more configuration data. > > Signed-off-by: Dmitry Baryshkov LGTM. Reviewed-by: Suraj Kandpal > --- >

[Intel-gfx] [PATCH v7 8/8] drm/display/dsc: add YCbCr 4:2:2 and 4:2:0 RC parameters

2023-05-17 Thread Dmitry Baryshkov
Include RC parameters for YCbCr 4:2:2 and 4:2:0 configurations. Reviewed-by: Suraj Kandpal Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/display/drm_dsc_helper.c | 450 +++ include/drm/display/drm_dsc_helper.h | 2 + 2 files changed, 452 insertions(+) diff

[Intel-gfx] [PATCH v7 3/8] drm/i915/dsc: move DSC tables to DRM DSC helper

2023-05-17 Thread Dmitry Baryshkov
Move DSC RC tables to DRM DSC helper. No additional code changes and/or cleanups are a part of this commit, it will be cleaned up in the followup commits. Reviewed-by: Jani Nikula Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/display/drm_dsc_helper.c | 372 ++

[Intel-gfx] [PATCH v7 6/8] drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parameters

2023-05-17 Thread Dmitry Baryshkov
The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/display/drm_dsc_helper.c | 139 ++

[Intel-gfx] [PATCH v7 5/8] drm/display/dsc: use flat array for rc_parameters lookup

2023-05-17 Thread Dmitry Baryshkov
Next commits are going to add support for additional RC parameter lookup tables. These tables are going to use different bpp/bpc combinations, thus it makes little sense to keep the 2d array for RC parameters. Switch to using the flat array. Reviewed-by: Jani Nikula Signed-off-by: Dmitry

[Intel-gfx] [PATCH v7 2/8] drm/i915/dsc: move rc_buf_thresh values to common helper

2023-05-17 Thread Dmitry Baryshkov
The rc_buf_thresh values are common to all DSC implementations. Move them to the common helper together with the code to propagate them to the drm_dsc_config. Reviewed-by: Jani Nikula Reviewed-by: Marijn Suijten Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/display/drm_dsc_helper.c |

[Intel-gfx] [PATCH v7 1/8] drm/i915/dsc: change DSC param tables to follow the DSC model

2023-05-17 Thread Dmitry Baryshkov
After cross-checking DSC models (20150914, 20161212, 20210623) change values in rc_parameters tables to follow config files present inside the DSC model. Handle two places, where i915 tables diverged from the model, by patching the rc values in the code. Note: I left one case uncorrected,

[Intel-gfx] [PATCH v7 4/8] drm/i915/dsc: stop using interim structure for calculated params

2023-05-17 Thread Dmitry Baryshkov
Stop using an interim structure rc_parameters for storing calculated params and then setting drm_dsc_config using that structure. Instead put calculated params into the struct drm_dsc_config directly. Reviewed-by: Jani Nikula Signed-off-by: Dmitry Baryshkov ---

[Intel-gfx] [PATCH v7 7/8] drm/display/dsc: include the rest of pre-SCR parameters

2023-05-17 Thread Dmitry Baryshkov
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations, include them here for completeness. The values were generated from the 'pre_scr_cfg_files_for_reference' files found in DSC models 20210623. The same fileset is a part of DSC model 20161212. Reviewed-by: Jessica Zhang

[Intel-gfx] [PATCH v7 0/8] drm/i915: move DSC RC tables to drm_dsc_helper.c

2023-05-17 Thread Dmitry Baryshkov
Other platforms (msm) will benefit from sharing the DSC config setup functions. This series moves parts of static DSC config data from the i915 driver to the common helpers to be used by other drivers. Note: the RC parameters were cross-checked against config files found in DSC model 2021062,

Re: [Intel-gfx] [PATCH v6 6/8] drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parameters

2023-05-17 Thread Dmitry Baryshkov
On 17/05/2023 06:10, Kandpal, Suraj wrote: The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov ---

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