> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, June 7, 2023 1:11 PM
> To: Zhang, Carl
> Cc: Andi Shyti ; Joonas Lahtinen
> ; Tvrtko Ursulin
> ; Yang, Fei ; Chris
> Wilson ; Roper, Matthew D
> ; Justen, Jordan L ;
> Gu, Lihao ; Intel GFX ;
> DRI Devel
> Subject: Re: [PATCH
Hi Carl,
On Wed, Jun 07, 2023 at 03:40:20AM +, Zhang, Carl wrote:
> Media driver reverted previous patches, and file a new PR
> https://github.com/intel/media-driver/pull/1680
> will hold this PR until the uapi changes appear in drm_next.
That's great, thanks a lot for the quick actions
== Series Details ==
Series: drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4
URL : https://patchwork.freedesktop.org/series/118925/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236_full -> Patchwork_118925v1_full
== Series Details ==
Series: drm/i915/mtl: update DP 2.0 vswing table for C20 phy
URL : https://patchwork.freedesktop.org/series/118924/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236_full -> Patchwork_118924v1_full
Media driver reverted previous patches, and file a new PR
https://github.com/intel/media-driver/pull/1680
will hold this PR until the uapi changes appear in drm_next.
besides this, ask a dumb question.
How we retrieve the pat_index from a shared resource though dma_buf fd?
maybe we need to know
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118921/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236_full -> Patchwork_118921v1_full
On 6/1/2023 12:55 PM, Andrzej Hajda wrote:
On 24.05.2023 21:19, Vinay Belgaumkar wrote:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32 +++-
1 file changed,
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118913/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13235_full -> Patchwork_118913v1_full
== Series Details ==
Series: drm/i915: Fix a NULL vs IS_ERR() bug
URL : https://patchwork.freedesktop.org/series/118907/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13235_full -> Patchwork_118907v1_full
Summary
---
== Series Details ==
Series: Avoid reading OA reports before they land (rev2)
URL : https://patchwork.freedesktop.org/series/118886/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118886v2
Summary
---
== Series Details ==
Series: Avoid reading OA reports before they land (rev2)
URL : https://patchwork.freedesktop.org/series/118886/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dp: Fix log level for "CDS interlane align done"
URL : https://patchwork.freedesktop.org/series/118977/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118977v1
== Series Details ==
Series: drm/i915/gsc: Fix error code in intel_gsc_uc_heci_cmd_submit_nonpriv()
URL : https://patchwork.freedesktop.org/series/118906/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13234_full -> Patchwork_118906v1_full
== Series Details ==
Series: drm/i915/quirk: Add quirk for devices that cannot be dimmed
URL : https://patchwork.freedesktop.org/series/118971/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118971v1
== Series Details ==
Series: drm/i915/quirk: Add quirk for devices that cannot be dimmed
URL : https://patchwork.freedesktop.org/series/118971/
State : warning
== Summary ==
Error: dim checkpatch failed
0241c698ef5c drm/i915/quirk: Add quirk for devices that cannot be dimmed
-:33:
== Series Details ==
Series: drm/i915: Fix a VMA UAF for multi-gt platform (rev2)
URL : https://patchwork.freedesktop.org/series/118887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118887v2
Summary
== Series Details ==
Series: drm/i915: GSC FW support for MTL (rev3)
URL : https://patchwork.freedesktop.org/series/117396/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13234_full -> Patchwork_117396v3_full
Summary
On 6/5/2023 1:54 PM, john.c.harri...@intel.com wrote:
From: John Harrison
If GuC hits an internal error (and survives long enough to report it
to the KMD), it is basically toast and will stop until a GT reset and
subsequent GuC reload is performed. Previously, the KMD just printed
an error
== Series Details ==
Series: drm/i915/guc: Force a reset on internal GuC error
URL : https://patchwork.freedesktop.org/series/118890/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13234_full -> Patchwork_118890v1_full
== Series Details ==
Series: mtl: add support for pmdemand (rev15)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_116949v15
Summary
---
== Series Details ==
Series: mtl: add support for pmdemand (rev15)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
595a7ad922f2 drm/i915: fix the derating percentage for MTL
6c642218f0cc drm/i915: update the QGV point frequency
== Series Details ==
Series: mtl: add support for pmdemand (rev15)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Fix a VMA UAF for multi-gt platform
URL : https://patchwork.freedesktop.org/series/118887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13233_full -> Patchwork_118887v1_full
Summary
== Series Details ==
Series: drm/i915: Load LUTs with DSB (rev2)
URL : https://patchwork.freedesktop.org/series/113042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_113042v2
Summary
---
"CDS interlane align done" is a passing condition not an error.
Before adding new macros for logs it was drm_dbg_kms.
Fixes: f48eab290287 ("drm/i915/dp: Add link training debug and error printing
helpers")
Cc: Imre Deak
CC: Jani Nikula
Signed-off-by: Khaled Almahallawy
---
== Series Details ==
Series: drm/i915: Load LUTs with DSB (rev2)
URL : https://patchwork.freedesktop.org/series/113042/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Load LUTs with DSB (rev2)
URL : https://patchwork.freedesktop.org/series/113042/
State : warning
== Summary ==
Error: dim checkpatch failed
35a5ec5257a0 drm/i915: Constify LUT entries in checker
018aa36a0ba6 drm/i915/dsb: Use non-locked register access
Hang subtest is not supported with GuC submission enabled.
Cc: Kamil Konieczny
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/i915/gem_ctx_persistence.c b/tests/i915/gem_ctx_persistence.c
index
== Series Details ==
Series: drm/i915: do not dereference dangling engine pointer on fence release
URL : https://patchwork.freedesktop.org/series/118879/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13232_full -> Patchwork_118879v1_full
== Series Details ==
Series: drm/i915/adlp+: Allow DC states along with PW2 only for PWB
functionality
URL : https://patchwork.freedesktop.org/series/118951/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118951v1
== Series Details ==
Series: drm/i915/guc: Remove some obsolete definitions (rev2)
URL : https://patchwork.freedesktop.org/series/118658/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13232_full -> Patchwork_118658v2_full
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev2)
URL : https://patchwork.freedesktop.org/series/118660/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13232_full -> Patchwork_118660v2_full
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
Hi Nirmoy,
On Tue, Jun 06, 2023 at 10:27:55PM +0200, Nirmoy Das wrote:
> Ensure correct handling of closed VMAs on multi-gt platforms to prevent
> Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
> exclusively added to GT0's closed_vma link (gt->closed_vma) and
> subsequently
Verify that SLPC API works as expected after a suspend.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/i915_pm_freq_api.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/tests/i915/i915_pm_freq_api.c b/tests/i915/i915_pm_freq_api.c
index 9005cd220..f35f1f8e0
Ensure correct handling of closed VMAs on multi-gt platforms to prevent
Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
exclusively added to GT0's closed_vma link (gt->closed_vma) and
subsequently freed by i915_vma_parked(), which assumes the entire GPU is
idle. However, on
From: Mika Kahola
MTL introduces a new way to instruct the PUnit with
power and bandwidth requirements of DE. Add the functionality
to program the registers and handle waits using interrupts.
The current wait time for timeouts is programmed for 10 msecs to
factor in the worst case scenarios.
Hi Nirmoy,
> > MTL is a
> > weird multi-gt platform and, indeed, you can't shut down GT0
> > without affecting GT1.
> >
> > For now it's OK, though, as to test it.
>
> Looking forward to that. I did test it extensively and ChromeOS team as
> well.
great job, Nirmoy! I haven't been able to
Match the subject line style:
$ git log --oneline drivers/pci/vgaarb.c
f321c35feaee PCI/VGA: Replace full MIT license text with SPDX identifier
d5109fe4d1ec PCI/VGA: Use unsigned format string to print lock counts
4e6c91847a7f PCI/VGA: Log bridge control messages when adding devices
From: Ville Syrjälä
In order to validate LUT programming more thoroughly let's
do a state check for all color management updates as well.
Not sure we really want this outside CI. It is rather heavy
and color management updates could become rather common
with all the HDR/etc. stuff happening.
From: Ville Syrjälä
With all the known issues sorted out we can start to use
DSB to load the LUTs.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
From: Ville Syrjälä
Normally we could be in a deep PkgC state all the way up to the
point when DSB starts its execution at the transcoders undelayed
vblank. The DSB will then have to wait for the hardware to
wake up before it can execute anything. This will waste a huge
chunk of the vblank time
From: Ville Syrjälä
Add a helper to convert our idea of a scanline to the hw's idea
of the same scanline (ie. apply crtc->scanline_offset in reverse).
We'll need this to tell the DSB do stuff on a specific scanline.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_vblank.c
From: Ville Syrjälä
Loading LUTs with the DSB outside of vblank doesn't really
work due to the palette anti-collision logic. Apparently the
DSB register writes don't get stalled like CPU mmio writes
do and instead we end up corrupting the LUT entries. Disabling
the anti-collision logic would
From: Ville Syrjälä
The DSB code will want to know the maximum PkgC latency
it has to contend with. Add a helper to expose that
information.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 14 ++
drivers/gpu/drm/i915/display/skl_watermark.h | 2 ++
From: Ville Syrjälä
We want to start the DSB execution from the transcoder's undelayed
vblank, so in order to guarantee atomicity with the all the other
mmio register writes we need to evade both vblanks.
Note that currently we don't add any vblank delay, so this is
effectively a nop. But in
From: Ville Syrjälä
The DSB has problems writing the legacy LUT. The two workarounds
I've discoverted are:
- write each entry twice back to back
- use non-posted writes
Let's use non-posted writes as that seems a bit more standard.
TODO: measure which is faster
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä
Using the DSB for LUT loading during full modesets would require
some actual though. Let's just use mmio for the time being.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Ville Syrjälä
Writing specific transcoder registers (and as it turns out, the
legacy LUT as well) via DSB needs a magic sequence to emit
non-posted register writes. Add a helper for this.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 20
From: Ville Syrjälä
Add a function for emitting masked register writes.
Note that the mask is implemented through bvyte enables,
so can only mask off aligned 8bit sets of bits.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 18 ++
From: Ville Syrjälä
Add a helper for emitting a number of DSB NOOPs commands.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 9 +
drivers/gpu/drm/i915/display/intel_dsb.h | 1 +
2 files changed, 10 insertions(+)
diff --git
From: Ville Syrjälä
The indexed write instruction doesn't support byte-enables, so
if the non-indexed write used those we must not convert it to
an indexed write.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 12 +---
1 file changed, 9 insertions(+), 3
From: Ville Syrjälä
i915_gem_object_create_internal() does not hand out zeroed
memory. Thus we may confuse whatever stale garbage is in
there as a previous register write and mistakenly handle the
first actual register write as an indexed write. This can
end up corrupting the instruction
From: Ville Syrjälä
Add some defines to specify what goes inside certain DSB
instructions.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
From: Ville Syrjälä
Dump the full DSB command buffers and head/tail pointers if the
the DSB hasn't completed its job in time.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 33 +---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git
From: Ville Syrjälä
Define all the DSB register bits so I don't have to look through
bspec to find them.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb_regs.h | 31 +++
1 file changed, 31 insertions(+)
diff --git
From: Ville Syrjälä
Avoid the locking overhead for DSB registers. We don't need the locks
and intel_dsb_commit() in particular needs to be called from the
vblank evade critical section and thus needs to be fast.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dsb.c | 18
From: Ville Syrjälä
The LUT checker doesn't modify the LUT entries so make them const.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
From: Ville Syrjälä
Another attempt at re-enabling DSB based LUT loads.
The main change from the last attempt is that we now
use the DSB's DEwake mechanism to combat PkgC latency
which was causing the LUT to not always load correctly
(due to the anti-collision logic not working correctly
for
== Series Details ==
Series: drm/i915: implement internal workqueues (rev2)
URL : https://patchwork.freedesktop.org/series/118947/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13237 -> Patchwork_118947v2
Summary
---
== Series Details ==
Series: drm/i915: implement internal workqueues (rev2)
URL : https://patchwork.freedesktop.org/series/118947/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: implement internal workqueues (rev2)
URL : https://patchwork.freedesktop.org/series/118947/
State : warning
== Summary ==
Error: dim checkpatch failed
7c73f73cd55c drm/i915: use pointer to i915 instead of rpm in wakeref
f7c19d8c6ca6 drm/i915: add a
That was my bad, i could have sword i'd fixed that before the final rev. Thanks
for fixing this.
nit: below function applies to MTL only which at the moment is still
force-probed, so not sure if the fixes tag is significant.
Reviewed-by: Alan Previn
On Tue, 2023-06-06 at 11:22 +0300, Dan
On Mon, Jun 05, 2023 at 05:00:56PM -, Patchwork wrote:
> == Series Details ==
>
> Series: Update various *MAX_GT* definitions
> URL : https://patchwork.freedesktop.org/series/118807/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_13225_full ->
On 6/5/2023 20:00, Zhanjun Dong wrote:
This attemps to avoid circular locing dependency between flush delayed work and
intel_gt_reset.
locing -> locking
WARNING: possible circular locking dependency detected
6.4.0-rc1-drmtip_1340-g31e3463b0edb+ #1 Not tainted
A recent bspec update added a restriction on when DC states can be enabled:
[Before enabling DC states:]
"""
PG2 can be kept enabled only because PGB requires PG2.
Do not use PG2 functions, such as type-C DDIs.
DMC will dynamically control PG1, PGA, PG2, PGB.
"""
Accordingly prevent DC states
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Jani Nikula
Cc: Ville Syrjälä
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
In order to avoid flush_scheduled_work() usage, add a dedicated
workqueue in the drm_i915_private structure. In this way, we don't
need to use the system queue anymore.
This change is mostly mechanical and based on Tetsuo's original
patch[1].
Link:
Currently a pointer to an intel_runtime_pm structure is stored in the
wake reference structures so the runtime data can be accessed. We can
save the entire device information (drm_i915_private) instead, since
we'll need to reference the new workqueue we'll add in subsequent
patches.
Reviewed-by:
Hi,
This series implements internal workqueues in the i915 driver in order
to avoid using the system queue. We add one generic workqueue in the
drm_i915_private structure, one specific for wake references and one
in a self-test.
This is based on Tetsuo's work[1] and is required to get rid of
The following changes since commit fc90c59beebd551dde5fe5eb3e76d36651ba08fb:
Merge branch 'db410c' of https://github.com/lumag/linux-firmware (2023-05-31
07:35:15 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware mtl_huc_v8.5.0
for you to fetch
== Series Details ==
Series: drm/i915: implement internal workqueues
URL : https://patchwork.freedesktop.org/series/118947/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M]
On Tue, 2023-06-06 at 14:30 +, Coelho, Luciano wrote:
> On Tue, 2023-06-06 at 14:33 +0100, Tvrtko Ursulin wrote:
> > On 06/06/2023 12:06, Coelho, Luciano wrote:
> > > On Tue, 2023-06-06 at 11:06 +0100, Tvrtko Ursulin wrote:
> > > > On 05/06/2023 16:06, Jani Nikula wrote:
> > > > > On Wed, 31
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Jani Nikula
Cc: Ville Syrjälä
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
In order to avoid flush_scheduled_work() usage, add a dedicated
workqueue in the drm_i915_private structure. In this way, we don't
need to use the system queue anymore.
This change is mostly mechanical and based on Tetsuo's original
patch[1].
Link:
Currently a pointer to an intel_runtime_pm structure is stored in the
wake reference structures so the runtime data can be accessed. We can
save the entire device information (drm_i915_private) instead, since
we'll need to reference the new workqueue we'll add in subsequent
patches.
Reviewed-by:
Hi,
This series implements internal workqueues in the i915 driver in order
to avoid using the system queue. We add one generic workqueue in the
drm_i915_private structure, one specific for wake references and one
in a self-test.
This is based on Tetsuo's work[1] and is required to get rid of
== Series Details ==
Series: drm/i915/mtl: Add new vswing table for C20 phy to support DP 1.4
URL : https://patchwork.freedesktop.org/series/118925/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236 -> Patchwork_118925v1
== Series Details ==
Series: drm/i915/mtl: update DP 2.0 vswing table for C20 phy
URL : https://patchwork.freedesktop.org/series/118924/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236 -> Patchwork_118924v1
Summary
> -Original Message-
> From: Lee, Shawn C
> Sent: Tuesday, June 6, 2023 1:43 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Lee, Shawn C ; Kahola, Mika
> ; Taylor, Clinton A
> ; Sripada, Radhakrishna
> ; Shankar, Uma
>
> Subject: [PATCH] drm/i915/mtl: Add new vswing table for C20 phy
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118921/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236 -> Patchwork_118921v1
Summary
---
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118921/
State : warning
== Summary ==
Error: dim checkpatch failed
445151c821ae drm/i915: Allow user to set cache at BO creation
-:23: WARNING:COMMIT_LOG_LONG_LINE:
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118921/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, May 25, 2023 at 03:03:54AM +, Liu, Yi L wrote:
> vIOMMU may introduce some performance deduction if there
> are frequent map/unmap.
DPDK doesn't do that.
And once you turn on the HW IOMMU you negate alot of the micro
performance wins of bypassing. Maybe there is still some argument
On Wed, May 24, 2023 at 09:31:42AM -0600, Alex Williamson wrote:
> If a user creates an ioas within an iommufd, attaches a device to that
> ioas and populates it with mappings, wouldn't the user expect the
> device to have access to and honor those mappings? I think that's the
> path we're
== Series Details ==
Series: mtl: add support for pmdemand (rev14)
URL : https://patchwork.freedesktop.org/series/116949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13236 -> Patchwork_116949v14
Summary
---
On Tue, 2023-06-06 at 14:33 +0100, Tvrtko Ursulin wrote:
> On 06/06/2023 12:06, Coelho, Luciano wrote:
> > On Tue, 2023-06-06 at 11:06 +0100, Tvrtko Ursulin wrote:
> > > On 05/06/2023 16:06, Jani Nikula wrote:
> > > > On Wed, 31 May 2023, Patchwork wrote:
> > > > > Possible regressions
== Series Details ==
Series: mtl: add support for pmdemand (rev14)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: mtl: add support for pmdemand (rev14)
URL : https://patchwork.freedesktop.org/series/116949/
State : warning
== Summary ==
Error: dim checkpatch failed
8bf8cd20b5c7 drm/i915: fix the derating percentage for MTL
0e53e38b6107 drm/i915: update the QGV point frequency
On Tue, Jun 06, 2023 at 12:35:09PM +0300, Vinod Govindapillai wrote:
> From: Mika Kahola
>
> MTL introduces a new way to instruct the PUnit with
> power and bandwidth requirements of DE. Add the functionality
> to program the registers and handle waits using interrupts.
> The current wait time
On 06/06/2023 12:06, Coelho, Luciano wrote:
On Tue, 2023-06-06 at 11:06 +0100, Tvrtko Ursulin wrote:
On 05/06/2023 16:06, Jani Nikula wrote:
On Wed, 31 May 2023, Patchwork wrote:
Possible regressions
* igt@gem_close_race@basic-process:
- fi-blb-e6850: [PASS][1]
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118913/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13235 -> Patchwork_118913v1
Summary
---
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118913/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation
URL : https://patchwork.freedesktop.org/series/118913/
State : warning
== Summary ==
Error: dim checkpatch failed
61d84b10017c drm/i915: Allow user to set cache at BO creation
-:23: WARNING:COMMIT_LOG_LONG_LINE:
== Series Details ==
Series: drm/i915: Fix a NULL vs IS_ERR() bug
URL : https://patchwork.freedesktop.org/series/118907/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13235 -> Patchwork_118907v1
Summary
---
> -Original Message-
> From: Lee, Shawn C
> Sent: Tuesday, June 6, 2023 1:43 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Lee, Shawn C ; Kahola, Mika
> ; Taylor, Clinton A
> ; Sripada, Radhakrishna
> ; Shankar, Uma
>
> Subject: [PATCH] drm/i915/mtl: update DP 2.0 vswing table for C20
== Series Details ==
Series: drm/i915/selftests: Add some missing error propagation
URL : https://patchwork.freedesktop.org/series/118867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13230_full -> Patchwork_118867v1_full
> > > > To comply with the design that buffer objects shall have immutable
> > > > cache setting through out their life cycle, {set, get}_caching ioctl's
> > > > are no longer supported from MTL onward. With that change caching
> > > > policy can only be set at object creation time. The current
Quoting Andi Shyti (2023-06-06 13:18:06)
> On Tue, Jun 06, 2023 at 11:10:04AM +0100, Tvrtko Ursulin wrote:
> >
> > On 06/06/2023 11:00, Andi Shyti wrote:
> > > From: Fei Yang
> > >
> > > To comply with the design that buffer objects shall have immutable
> > > cache setting through out their
On 06/06/2023 10:47, Tvrtko Ursulin wrote:
On 05/06/2023 23:22, Andi Shyti wrote:
Hi Tvrtko,
On Mon, Jun 05, 2023 at 03:37:20PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver
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