Extract a common soc_gpio_exec() helper that may be used by a few SoCs.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 49 +++-
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
DSI code for VBT has a set of ugly GPIO hacks, one of which is direct
talking to GPIO IP behind the actual driver's back. An attempt to fix
that is here.
If I understood correctly, my approach should work in the similar way as
the current IOSF GPIO.
Hans, I believe you have some devices that
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 40ecab551232 ("pinctrl:
baytrail: Really serialize all register accesses") for the details.
Taking all this into
Hi,
> Meteor Lake has demonstrated consistent stability for some time.
> All user-space API modifications tide to its core platform
> functions are operational.
>
> The necessary firmware components are set up and comprehensive
> testing has been condused over a period.
>
> Given the recent
Hi Jonathan,
merged in drm-intel-gt-next.
Thanks for your persistence :-)
Andi
On Tue, Oct 17, 2023 at 11:07:59AM -0700, Jonathan Cavitt wrote:
> Implement GuC-based TLB invalidations and use them on MTL.
>
> Some complexity in the implementation was introduced early on
> and will be required
Hi Vinay,
On Tue, Oct 17, 2023 at 12:53:09PM -0700, Vinay Belgaumkar wrote:
> This bit does not cause an explicit L3 flush. We already use
> PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
>
> v2: Use FLUSH_L3 only pre-MTL since spec will likely remain
> the same going forward.
>
> Cc: Nirmoy
> > Possible regressions
> >
> > • igt@gem_exec_parallel@fds@vcs0:
> >
> > □ shard-tglu: PASS -> INCOMPLETE
> > • igt@gem_exec_parallel@fds@vcs1:
> >
> > □ shard-dg2: PASS -> INCOMPLETE +1 other test incomplete
> > • igt@gem_mmap_offset@clear@lmem0:
> >
> > □ shard-dg1:
Hi,
...
> Possible regressions
>
> • igt@gem_exec_parallel@fds@vcs0:
>
> □ shard-tglu: PASS -> INCOMPLETE
> • igt@gem_exec_parallel@fds@vcs1:
>
> □ shard-dg2: PASS -> INCOMPLETE +1 other test incomplete
> • igt@gem_mmap_offset@clear@lmem0:
>
> □ shard-dg1: PASS ->
Hi all,
On Fri, 13 Oct 2023 11:46:02 +1100 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm-misc tree got a conflict in:
>
> arch/ia64/include/asm/fb.h
>
> between commit:
>
> cf8e8658100d ("arch: Remove Itanium (IA-64) architecture")
>
> from the asm-generic tree and
== Series Details ==
Series: display device info as a separate debugfs entry (rev5)
URL : https://patchwork.freedesktop.org/series/125222/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125222v5
Summary
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3)
URL : https://patchwork.freedesktop.org/series/125245/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125245v3
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3)
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3)
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim checkpatch failed
294bb55ab089 drm/i915: Add GuC TLB Invalidation device info flags
b90350749b1d
Hi Swati,
Realized that I cannot remove the display runtime info from i915_capabilties
until IGT start using
this new created entry.
So excluded the patch to remove the redundant info from i915_capabilties from
this series
A new version is sent! Sorry for the confusion!
BR
vinod
On Tue,
Create a separate debugfs entry to list the display capabilities
IGT can rely on this debugfs entry for tests that depend on
display device and display runtime info for both xe and i915
drivers.
v2: rename the entry to i915_display_capabilities (Chaitanya)
Signed-off-by: Vinod Govindapillai
---
Expose the display device info as a separate debugfs entry to list out
display device info and remove the same from i915_capabilities
v2: rename the debugs entry to i915_display_capabilities and patch
description changes
v3: Exclude the patch to remove display device and runtime info from
== Series Details ==
Series: drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3 (rev5)
URL : https://patchwork.freedesktop.org/series/125205/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125205v5
Summary
Create a separate debugfs entry to list the display capabilities
IGT can rely on this debugfs entry for tests that depend on
display device and display runtime info for both xe and i915
drivers.
v2: rename the entry to i915_display_capabilities (Chaitanya)
Signed-off-by: Vinod Govindapillai
---
Display device and display runtime info is exposed as part of
i915_display_capabilities debugfs entry. Remove this information
from i915_ capabilities as it is now reduntant.
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 -
1 file changed, 1 deletion(-)
diff
Expose the display device info as a separate debugfs entry to list out
display device info and remove the same from i915_capabilities
v2: rename the debugs entry to i915_display_capabilities and patch
description changes
Vinod Govindapillai (2):
drm/i915/display: debugfs entry to list
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2)
URL : https://patchwork.freedesktop.org/series/125245/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125245v2
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2)
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2)
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim checkpatch failed
2e48c1bdcb64 drm/i915: Add GuC TLB Invalidation device info flags
da9cde16c8ee
This bit does not cause an explicit L3 flush. We already use
PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
v2: Use FLUSH_L3 only pre-MTL since spec will likely remain
the same going forward.
Cc: Nirmoy Das
Cc: Mika Kuoppala
Acked-by: Mika Kuoppala
Reviewed-by: Nirmoy Das
Signed-off-by:
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines
URL : https://patchwork.freedesktop.org/series/125245/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125245v1
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines
URL : https://patchwork.freedesktop.org/series/125245/
State : warning
== Summary ==
Error: dim checkpatch failed
dd44690689f9 drm/i915: Add GuC TLB Invalidation device info flags
7048e93ca310
== Series Details ==
Series: drm/i915/quirk: Add quirk for devices with incorrect PWM frequency
URL : https://patchwork.freedesktop.org/series/125243/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13766 -> Patchwork_125243v1
On 10/17/2023 4:42 PM, Andi Shyti wrote:
Hi Vinay,
This bit does not cause an explicit L3 flush. We already use
At all? Or only on newer hardware? And as a genuine spec change or as a
bug / workaround?
If the hardware has re-purposed the bit then it is probably worth at
least adding a
On 10/17/2023 2:23 AM, Belgaumkar, Vinay wrote:
On 10/16/2023 4:24 PM, John Harrison wrote:
On 10/16/2023 15:55, Vinay Belgaumkar wrote:
This bit does not cause an explicit L3 flush. We already use
At all? Or only on newer hardware? And as a genuine spec change or as
a bug / workaround?
Add device info flags for if GuC TLB Invalidation is enabled.
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andi Shyti
Acked-by: Tvrtko Ursulin
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 3
It is not an error for GuC TLB invalidations to fail when the GT is
wedged or disabled, so do not process a wait failure as one in
guc_send_invalidate_tlb.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
Reviewed-by: Andi Shyti
Acked-by: Tvrtko Ursulin
Acked-by:
For the gt_tlb live selftest, when operating on the GSC engine,
increase the timeout from 10 ms to 200 ms because the GSC
engine is a bit slower than the rest.
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andi Shyti
Acked-by: Tvrtko Ursulin
Reviewed-by: Nirmoy Das
---
Enable GuC TLB invalidations for MTL. Though more platforms than just
MTL support GuC TLB invalidations, MTL is presently the only platform
that requires it for any purpose, so only enable it there for now to
minimize cross-platform impact.
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andi Shyti
From: Prathap Kumar Valsan
The GuC firmware had defined the interface for Translation Look-Aside
Buffer (TLB) invalidation. We should use this interface when
invalidating the engine and GuC TLBs.
Add additional functionality to intel_gt_invalidate_tlb, invalidating
the GuC TLBs and falling back
In case of GT is suspended, don't allow submission of new TLB invalidation
request and cancel all pending requests. The TLB entries will be
invalidated either during GuC reload or on system resume.
Signed-off-by: Fei Yang
Signed-off-by: Jonathan Cavitt
CC: John Harrison
Reviewed-by: Andi Shyti
As of now, there is no mechanism for tracking a given request's
progress through the queue. Instead, add a helper that returns
an estimated maximum time the queue should take to drain if
completely full.
Suggested-by: John Harrison
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andi Shyti
Implement GuC-based TLB invalidations and use them on MTL.
Some complexity in the implementation was introduced early on
and will be required for range-based TLB invalidations.
RFC: https://patchwork.freedesktop.org/series/124922/
v2:
- Add missing supporting patches.
v3:
- Split suspend/resume
Cyernet T10C has a bad default PWM frequency causing the display to
strobe when the brightness is less than 100%. Create a new quirk to use
the value from the BIOS rather than the default register value.
Signed-off-by: Allen Ballway
---
.../gpu/drm/i915/display/intel_backlight.c| 3 ++-
== Series Details ==
Series: drm/i915: DPLL code cleanups (rev4)
URL : https://patchwork.freedesktop.org/series/125052/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125052v4
Summary
---
== Series Details ==
Series: drm/i915: DPLL code cleanups (rev4)
URL : https://patchwork.freedesktop.org/series/125052/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/display: Reset message bus after each read/write operation
(rev4)
URL : https://patchwork.freedesktop.org/series/124602/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13763_full -> Patchwork_124602v4_full
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev8)
URL : https://patchwork.freedesktop.org/series/125177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125177v8
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev8)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev8)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim checkpatch failed
0b222f67d3e4 drm/i915: Add GuC TLB Invalidation device info flags
acc6e20fa326
Hi Alexander,
alexander.usys...@intel.com wrote on Tue, 17 Oct 2023 14:20:32 +:
> > > > > + spi->mtd.writesize = SZ_1; /* 1 byte granularity */
> > > >
> > > > You say writesize should be aligned with 4 in your next patch?
> > >
> > > We support unaligned write by reading aligned
Hi Vinay,
> > > This bit does not cause an explicit L3 flush. We already use
> > At all? Or only on newer hardware? And as a genuine spec change or as a
> > bug / workaround?
> >
> > If the hardware has re-purposed the bit then it is probably worth at
> > least adding a comment to the bit
> > > > + spi->mtd.writesize = SZ_1; /* 1 byte granularity */
> > >
> > > You say writesize should be aligned with 4 in your next patch?
> >
> > We support unaligned write by reading aligned 4bytes,
> > replacing changed bytes there and writing whole 4bytes back.
> > Is there any problem
Hi Alexander,
alexander.usys...@intel.com wrote on Tue, 17 Oct 2023 11:54:41 +:
> Hi Miquel,
>
> > > +static int i915_spi_init_mtd(struct i915_spi *spi, struct device *device,
> > > + unsigned int nparts)
> > > +{
> > > + unsigned int i;
> > > + unsigned int n;
> > > +
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev5)
URL : https://patchwork.freedesktop.org/series/124011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_124011v5
Summary
---
== Series Details ==
Series: drm/i915/display: Reset message bus after each read/write operation
(rev4)
URL : https://patchwork.freedesktop.org/series/124602/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13763 -> Patchwork_124602v4
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev5)
URL : https://patchwork.freedesktop.org/series/124011/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Apply Wa_16018031267 / Wa_16018063123 (rev5)
URL : https://patchwork.freedesktop.org/series/124011/
State : warning
== Summary ==
Error: dim checkpatch failed
bc3713e70e50 drm/i915: Enable NULL PTE support for vm scratch
-:8: WARNING:TYPO_SPELLING: 'teh' may be
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev7)
URL : https://patchwork.freedesktop.org/series/125177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125177v7
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev7)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev7)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim checkpatch failed
7b7a660699ff drm/i915: Add GuC TLB Invalidation device info flags
cc4c97e1fe57
== Series Details ==
Series: display device info as a separate debugfs entry (rev3)
URL : https://patchwork.freedesktop.org/series/125222/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125222v3
Summary
== Series Details ==
Series: display device info as a separate debugfs entry (rev3)
URL : https://patchwork.freedesktop.org/series/125222/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Miquel,
> > +static int i915_spi_init_mtd(struct i915_spi *spi, struct device *device,
> > +unsigned int nparts)
> > +{
> > + unsigned int i;
> > + unsigned int n;
> > + struct mtd_partition *parts = NULL;
> > + int ret;
> > +
> > + dev_dbg(device,
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev6)
URL : https://patchwork.freedesktop.org/series/125177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125177v6
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev6)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev6)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim checkpatch failed
a44a48ef96e6 drm/i915: Add GuC TLB Invalidation device info flags
6dfb0c28700b
== Series Details ==
Series: drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3 (rev4)
URL : https://patchwork.freedesktop.org/series/125205/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125205v4
Summary
Vinay Belgaumkar writes:
> This bit does not cause an explicit L3 flush. We already use
> PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
>
> Cc: Nirmoy Das
> Cc: Mikka Kuoppala
s/kk/k
> Signed-off-by: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 8 ++--
> 1 file
Hello Vinod,
> -Original Message-
> From: Intel-gfx On Behalf Of Vinod
> Govindapillai
> Sent: Tuesday, October 17, 2023 1:25 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v1 1/2] drm/i915/display: display device info
> debugfs entry
>
> Have a common debugfs
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev5)
URL : https://patchwork.freedesktop.org/series/125177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13765 -> Patchwork_125177v5
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev5)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev5)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim checkpatch failed
70c9db1162ef drm/i915: Add GuC TLB Invalidation device info flags
b8faf1e5cfc4
Hi Stanislav,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Stanislav-Lisovskiy/drm-i915-Add-bigjoiner-force-enable-option-to-debugfs/20231017-105841
base: git
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev4)
URL : https://patchwork.freedesktop.org/series/125177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13764 -> Patchwork_125177v4
> -Original Message-
> From: Murthy, Arun R
> Sent: Monday, October 16, 2023 9:56 AM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Hogander, Jouni
> ; Nikula, Jani
> Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev4)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Define and use GuC and CTB TLB invalidation routines (rev4)
URL : https://patchwork.freedesktop.org/series/125177/
State : warning
== Summary ==
Error: dim checkpatch failed
9507a37728c4 drm/i915: Add GuC TLB Invalidation device info flags
f80bfd09843d
Display device info is exposed as a separate debugfs entry. So
remove the duplicate entries from i915_capabilities debugfs
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
Have a common debugfs entry to get the display device info for
both xe and i915 drivers.
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
Expose the display device info as a separate debugfs entry to list out
display device info and remove the same from i915_capabilities
Vinod Govindapillai (2):
drm/i915/display: display device info debugfs entry
drm/i915: remove display device info from i915 capabilities
From: Patchwork
Sent: Tuesday, October 17, 2023 5:28 AM
To: Kahola, Mika
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/display: Reset message bus after
each read/write operation (rev4)
Patch Details
Series:
drm/i915/display: Reset message bus after each
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