On Thu, 2024-05-09 at 15:13 +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Friday, May 3, 2024 12:04 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh ; Hogander, Jouni
> >
> > Subject: [PATCH v9 08/12] drm/i915/psr: Panel
[Public]
> -Original Message-
> From: Limonciello, Mario
> Sent: Friday, May 10, 2024 3:18 AM
> To: Linux regressions mailing list ; Wentland,
> Harry
> ; Lin, Wayne
> Cc: ly...@redhat.com; imre.d...@intel.com; Leon Weiß bochum.de>; sta...@vger.kernel.org;
On Wed, May 08, 2024 at 06:47:56PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VSYNC register macro.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 9
On Wed, May 08, 2024 at 06:47:55PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_PUSH register macro.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 9
On Wed, May 08, 2024 at 06:47:54PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_STATUS2 register macro.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+),
On Wed, May 08, 2024 at 06:47:53PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_FLIPLINE register macro.
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c |
On Wed, May 08, 2024 at 06:47:52PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VTOTAL_PREV register macro.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1
On Wed, May 08, 2024 at 06:47:51PM +0300, Jani Nikula wrote:
61;7600;1c> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_STATUS register macro.
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
>
On Wed, May 08, 2024 at 06:47:50PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VMAXSHIFT register macro.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1
On Wed, May 08, 2024 at 06:47:49PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VMIN register macro.
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 6
On Wed, May 08, 2024 at 06:47:48PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VMAX register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 6
On Wed, May 08, 2024 at 06:47:47PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_CTL register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 13
On Mon, May 06, 2024 at 12:36:02PM +0200, Maarten Lankhorst wrote:
> The DPT bo should not be allocated when pinning, but in advance when
> creating the framebuffer.
why is that? (just trying to understand to see if I'm able to help
with this review)
> Split allocation from bo pinning and GGTT
On Mon, May 06, 2024 at 12:36:01PM +0200, Maarten Lankhorst wrote:
> This is invalid with display code when reworking DPT pinning.
> The only reason we added it, was because originally all display
> allocations also had the bit set.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Rodrigo Vivi
The following changes since commit 93f329774542b9b7d57abb18ea8b6542f2d8feac:
Merge branch 'robot/pr-0-1709214990' into 'main' (2024-02-29 14:10:53 +)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/firmware.git tags/intel-2024-05-09
for you to fetch changes
Hi Dave and Sima,
Please pull the drm-xe-fixes for this week targeting v6.9.
thanks
Lucas De Marchi
drm-xe-fixes-2024-05-09:
- Fix use zero-length element array
- Move more from system wq to ordered private wq
- Do not ignore return for drmm_mutex_init
The following changes since commit
On 5/9/2024 07:43, Linux regression tracking (Thorsten Leemhuis) wrote:
On 18.04.24 21:43, Harry Wentland wrote:
On 2024-03-07 01:29, Wayne Lin wrote:
[Why]
Commit:
- commit 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload
allocation/removement")
accidently overwrite the commit
- commit
== Series Details ==
Series: drm/i915/gt: Disarm breadcrumbs if engines are already idle (rev4)
URL : https://patchwork.freedesktop.org/series/132786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14738 -> Patchwork_132786v4
== Series Details ==
Series: drm/i915/gt: Disarm breadcrumbs if engines are already idle (rev4)
URL : https://patchwork.freedesktop.org/series/132786/
State : warning
== Summary ==
Error: dim checkpatch failed
7812d0b52666 drm/i915/gt: Disarm breadcrumbs if engines are already idle
-:15:
>-Original Message-
>From: Zanoni, Paulo R
>Sent: Tuesday, May 7, 2024 11:07 PM
>To: Vivi, Rodrigo ; Kumar, Naveen1
>; Souza, Jose
>Cc: Shankar, Uma ; Kulkarni, Vandita
>; Nikula, Jani ; intel-
>g...@lists.freedesktop.org; Belgaumkar, Vinay ;
>Borah, Chaitanya Kumar
>Subject: Re:
Hi, Dave & Sima
This weeks -next-fixes. Two fixes breifly described below.
Driver Changes:
- Use ordered WQ for G2H handler. (Matthew Brost)
- Use flexible-array rather than zero-sized (Lucas De Marchi)
Thanks,
Thomas
The following changes since commit 3bc8848bb7f7478e6806e4522b06b63f40a53e1e:
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
> ; Joshi, Kunal1
> Subject: [PATCH v9 12/12] drm/i915/psr: Add panel replay sel update
> support to debugfs interface
>
> Add
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 11/12] drm/i915/psr: Split intel_psr2_config_valid for
> panel replay
>
> Part of
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 09/12] drm/i915/psr: Do not apply workarounds in case
> of panel replay
>
> There are some workarounds
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 08/12] drm/i915/psr: Panel replay uses SRD_STATUS to
> track it's status
>
> DP Panel replay uses
On Mon, Apr 29, 2024 at 1:32 PM Jim Cromie wrote:
>
> hi Greg, Jason, DRM-folk,
>
> This patchset fixes the CONFIG_DRM_USE_DYNAMIC_DEBUG=y regression,
> Fixes: bb2ff6c27bc9 ("drm: Disable dynamic debug as broken")
>
> this is v8.
> Its also here:
>
On Tue, May 7, 2024 at 2:04 PM Thomas Zimmermann wrote:
>
> Implement struct drm_client_funcs with the respective helpers and
> remove the custom code from the emulation. The generic helpers are
> equivalent in functionality.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Patrik Jakobsson
>
Hello!
We're delighted to announce that the 2024 X.Org Developers Conference
(XDC) will be taking place on October 9 to 11 in Montréal, Canada, co-
located with the GStreamer Conference & Hackfest 2024 which will be
running from October 7 to 10. Join us for a freedesktop week in
Montréal!
XDC is
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 07/12] drm/i915/psr: Modify intel_dp_get_su_granularity
> to support panel replay
>
> Currently
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 06/12] drm/i915/psr: Detect panel replay selective update
> support
>
> Add new boolean to store panel
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 03/12] drm/i915/dp: Use always vsc revision 0x6 for Panel
> Replay
>
> We are about to enable Panel
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 02/12] drm/i915/display: Do not print "psr: enabled" for
> on Panel Replay
>
> After setting has_psr
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, May 3, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
>
> Subject: [PATCH v9 01/12] drm/i915/psr: Rename has_psr2 as
> has_sel_update
>
> We are going to reuse has_psr2 for
On 18.04.24 21:43, Harry Wentland wrote:
> On 2024-03-07 01:29, Wayne Lin wrote:
>> [Why]
>> Commit:
>> - commit 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload
>> allocation/removement")
>> accidently overwrite the commit
>> - commit 54d217406afe ("drm: use mgr->dev in drm_dbg_kms in
>>
On 23.04.2024 18:23, Janusz Krzysztofik wrote:
From: Chris Wilson
The breadcrumbs use a GT wakeref for guarding the interrupt, but are
disarmed during release of the engine wakeref. This leaves a hole where
we may attach a breadcrumb just as the engine is parking (after it has
parked its
On Thu, May 09, 2024 at 08:59:23AM +0530, Suraj Kandpal wrote:
> Disable bit 29 of SCLKGATE_DIS register around pps sequence
> when we turn panel power on.
>
> --v2
> -Squash two commit together [Jani]
> -Use IS_DISPLAY_VER [Jani]
> -Fix multiline comment [Jani]
>
> --v3
> -Define register in a
== Series Details ==
Series: Implement CMRR Support (rev8)
URL : https://patchwork.freedesktop.org/series/126443/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14737 -> Patchwork_126443v8
Summary
---
**SUCCESS**
== Series Details ==
Series: Implement CMRR Support (rev8)
URL : https://patchwork.freedesktop.org/series/126443/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Implement CMRR Support (rev8)
URL : https://patchwork.freedesktop.org/series/126443/
State : warning
== Summary ==
Error: dim checkpatch failed
92bb97f71e5a drm/i915: Define and compute Transcoder CMRR registers
-:45: CHECK:MACRO_ARG_REUSE: Macro argument reuse
Compute vrr vsync params in case of FAVT as well instead of
only to AVT mode of operation.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
Compute params for Adaptive Sync SDP when Fixed Average Vtotal
mode is enabled.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
Add target_rr_divider to structure representing AS SDP.
It is valid only in FAVT mode, sink device ignores the bit in AVT
mode.
Signed-off-by: Mitul Golani
---
include/drm/display/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/display/drm_dp_helper.h
Add support of pack and unpack for target_rr_divider.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index
Add CMRR/Fixed Average Vtotal mode enable and disable
functions based on change in VRR mode of operation.
When Adaptive Sync Vtotal is enabled, Fixed Average Vtotal
mode is disabled and vice versa. With this commit setting
the stage for subsequent CMRR enablement.
--v2:
- Check pipe active state
Compute Fixed Average Vtotal/CMRR with resepect to
userspace VRR enablement. Also calculate required
parameters in case of CMRR is enabled. During
intel_vrr_compute_config, CMRR is getting enabled
based on userspace has enabled Adaptive Sync Vtotal
mode (Legacy VRR) or not. Make CMRR as small
Add register definitions for Transcoder Fixed Average
Vtotal mode/CMRR function, with the necessary bitfields.
Compute these registers when CMRR is enabled, extending
Adaptive refresh rate capabilities.
--v2:
- Use intel_de_read64_2x32 in intel_vrr_get_config. [Jani]
- Fix indent and order based
CMRR is a display feature that uses adaptive sync
framework to vary Vtotal slightly to match the
content rate exactly without frame drops. This
feature is a variation of VRR where it varies Vtotal
slightly (between additional 0 and 1 Vtotal scanlines)
to match content rate exactly without frame
== Series Details ==
Series: Link off between frames for edp (rev4)
URL : https://patchwork.freedesktop.org/series/130650/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14737 -> Patchwork_130650v4
Summary
---
== Series Details ==
Series: Link off between frames for edp (rev4)
URL : https://patchwork.freedesktop.org/series/130650/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Link off between frames for edp (rev4)
URL : https://patchwork.freedesktop.org/series/130650/
State : warning
== Summary ==
Error: dim checkpatch failed
d3914a86b340 drm/i915/alpm: Move alpm parameters from intel_psr
54e487fb67c5 drm/i915/alpm: Move alpm related
== Series Details ==
Series: drm/i915: Implement Audio WA_14020863754 (rev4)
URL : https://patchwork.freedesktop.org/series/132255/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14737 -> Patchwork_132255v4
Summary
---
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