On 9/2/2025 1:11 AM, Peter Zijlstra wrote:
On Tue, Sep 02, 2025 at 12:26:04AM +0530, Arunpravin Paneer Selvam wrote:
Replace the freelist (O(n)) used for free block management with a
red-black tree, providing more efficient O(log n) search, insert,
and delete operations. This improves scalabil
Add a check during atomic crtc check phase to ensure the programmed VRR
guardband is sufficient to cover latencies introduced by enabled features
such as DSC, PSR/PR, scalers, and DP SDPs.
Currently, the guardband is programmed to match the vblank length, so
existing checks in skl_is_vblank_too_sh
Instead of setting vrr.guardband to vblank, use optimal guardband that
works for most of the cases. This will help in avoiding need of change
in guardband and fix the LRR feature that needs seamless switching to
a lower refresh rate.
First few patches fix/refactor and extract common functions requ
With VRR timing generator always on, the fixed refresh rate is achieved
by setting vrr.flipline and vrr.vmax as the vtotal for the desired mode.
This creates a problem for seamless_mn drrs feature, where user can
seamlessly set a lower mode on the supporting panels. With VRR timing
generator, the
Refactor intel_panel_highest_mode() to return the fixed mode with the
highest pixel clock, removing the fallback to the adjusted mode. This makes
the function semantics clearer and better suited for future use cases where
fallback is not desirable.
Update the caller in intel_dp_mode_clock() to han
In the current VRR implementation, vrr.vmin and vrr.guardband are set such
that they do not need to change when switching from fixed refresh rate to
variable refresh rate. Specifically, vrr.guardband is always set to match
the vblank length. This approach works for most cases, but not for LRR,
wher
For 444 to 420 output format conversion, scaler uses 2x downscaling in
each direction. Introduce skl_scaler_chroma_downscale_factor() to
encapsulate the chroma subsampling adjustment used in scaler/dsc
pre-fill latency calculations.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Mitul Golani
---
dr
Drop DSC and scaler prefill latency checks from skl_is_vblank_too_short().
These are now covered by the guardband validation added during the atomic
CRTC check phase.
This cleanup prepares for future changes where the guardband will be
optimized independently of vblank length, making vblank-based
For variable refresh rate case, we wait for send push event and so the
flipdone via dsb interrupt and vblank are aligned.
Currently the guardband is same as vblank length and undelayed vblank
and the vblank and the flipdone with dsb interrupt are already aligned
for the fixed refresh rate case.
As
Add a helper to compute vblank time needed for transmitting specific
DisplayPort SDPs like PPS, GAMUT_METADATA, and VSC_EXT. Latency is
based on line count per packet type and current line time.
Used to ensure adequate vblank when features like DSC/HDR are enabled.
Bspec: 70151
Signed-off-by: Ank
Introduce a helper to compute the max link wake latency when using
Auxless/Aux wake mechanism for PSR/Panel Replay/LOBF features.
This will be used to compute the minimum guardband so that the link wake
latencies are accounted and these features work smoothly for higher
refresh rate panels.
Bspec
The Bspec:70151, mentions Chroma subsampling is a 2x downscale
operation. This means that the downscale factor is 2 in each direction.
So correct the downscaling factor to 4.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Mitul Golani
---
drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++--
1 fil
Currently dsc/scaler prefill latencies are handled during watermark
calculations. With the optimized guardband, we need to compute the
latencies to find the minimum guardband that works for most cases.
Extract the helpers to compute these latencies, so that they can be used
while computing vrr guar
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Acked-by: Ulf Hansson
Reviewed-by: Lorenzo Stoakes
Cc: Maxim Levitsky
Cc: Alex Dubov
Signed-off-by: David Hildenbrand
---
drivers/memstick/host/jmb38x_ms.c | 3 +--
dr
There is no reason in debugfs why PSR has been disabled. Currently,
without this information, IGT tests cannot decide whether PSR has
been disabled on purpose or was it abnormal behavior. Because of it,
the status of the test cannot be decided correctly.
Add no_psr_reason field into struct intel_p
Maintain two separate RB trees per order - one for clear (zeroed) blocks
and another for dirty (uncleared) blocks. This separation improves
code clarity and makes it more obvious which tree is being searched
during allocation. It also improves scalability and efficiency when
searching for a specifi
== Series Details ==
Series: drm/i915/display: Add no_psr_reason to PSR debugfs
URL : https://patchwork.freedesktop.org/series/153806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17105 -> Patchwork_153806v1
Summary
--
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Reviewed-by: Bart Van Assche
Reviewed-by: Lorenzo Stoakes
Reviewed-by: Martin K. Petersen
Cc: Doug Gilbert
Cc: "James E.J. Bottomley"
Signed-off-by: David Hildenbrand
== Series Details ==
Series: series starting with [v2,01/37] mm: stop making SPARSEMEM_VMEMMAP
user-selectable
URL : https://patchwork.freedesktop.org/series/153803/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17105 -> Patchwork_153803v1
The expectation is that there is currently no user that would pass in
non-contigous page ranges: no allocator, not even VMA, will hand these
out.
The only problematic part would be if someone would provide a range
obtained directly from memblock, or manually merge problematic ranges.
If we find su
We can just cleanup the code by calculating the #refs earlier,
so we can just inline what remains of record_subpages().
Calculate the number of references/pages ahead of times, and record them
only once all our tests passed.
Signed-off-by: David Hildenbrand
---
mm/gup.c | 25 ---
Now that a single folio/compound page can no longer span memory sections
in problematic kernel configurations, we can stop using nth_page() in
folio_page() and folio_page_idx().
While at it, turn both macros into static inline functions and add
kernel doc for folio_page_idx().
Reviewed-by: Zi Yan
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Acked-by: Damien Le Moal
Reviewed-by: Lorenzo Stoakes
Cc: Niklas Cassel
Signed-off-by: David Hildenbrand
---
drivers/ata/libata-sff.c | 6 +++---
1 file changed, 3 inse
Ever since commit 858c708d9efb ("block: move the bi_size update out of
__bio_try_merge_page"), page_is_mergeable() no longer exists, and the
logic in bvec_try_merge_page() is now a simple page pointer
comparison.
Reviewed-by: Lorenzo Stoakes
Signed-off-by: David Hildenbrand
---
include/linux/bv
There is the concern that unpin_user_page_range_dirty_lock() might do
some weird merging of PFN ranges -- either now or in the future -- such
that PFN range is contiguous but the page range might not be.
Let's sanity-check for that and drop the nth_page() usage.
Reviewed-by: Lorenzo Stoakes
Sign
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Reviewed-by: Lorenzo Stoakes
Acked-by: Herbert Xu
Cc: "David S. Miller"
Signed-off-by: David Hildenbrand
---
crypto/ahash.c | 4 ++--
crypto/scompress.c
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Reviewed-by: Lorenzo Stoakes
Reviewed-by: Alex Williamson
Reviewed-by: Brett Creeley
Cc: Jason Gunthorpe
Cc: Yishai Hadas
Cc: Shameer Kolothum
Cc: Kevin Tian
Signed-o
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Reviewed-by: Bart Van Assche
Reviewed-by: Lorenzo Stoakes
Reviewed-by: Martin K. Petersen
Cc: "James E.J. Bottomley"
Signed-off-by: David Hildenbrand
---
drivers/scsi/
It's no longer required to use nth_page() when iterating pages within a
single SG entry, so let's drop the nth_page() usage.
Reviewed-by: Lorenzo Stoakes
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: David Airlie
Cc: Simona Vetter
Signed-off-by: David Hildenbra
dma_common_contiguous_remap() is used to remap an "allocated contiguous
region". Within a single allocation, there is no need to use nth_page()
anymore.
Neither the buddy, nor hugetlb, nor CMA will hand out problematic page
ranges.
Acked-by: Marek Szyprowski
Reviewed-by: Lorenzo Stoakes
Cc: Rob
Let's disallow handing out PFN ranges with non-contiguous pages, so we
can remove the nth-page usage in __cma_alloc(), and so any callers don't
have to worry about that either when wanting to blindly iterate pages.
This is really only a problem in configs with SPARSEMEM but without
SPARSEMEM_VMEMM
Let's make it clearer that we are operating within a single folio by
providing both the folio and the page.
This implies that for flush_dcache_folio() we'll now avoid one more
page->folio lookup, and that we can safely drop the "nth_page" usage.
While at it, drop the "extern" from the function de
Within a folio/compound page, nth_page() is no longer required.
Given that we call folio_test_partial_kmap()+kmap_local_page(), the code
would already be problematic if the pages would span multiple folios.
So let's just assume that all src pages belong to a single
folio/compound page and can be i
Let's cleanup and simplify the function a bit.
Reviewed-by: Zi Yan
Reviewed-by: Lorenzo Stoakes
Signed-off-by: David Hildenbrand
---
fs/hugetlbfs/inode.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlb
We're allocating a higher-order page from the buddy. For these pages
(that are guaranteed to not exceed a single memory section) there is no
need to use nth_page().
Reviewed-by: Lorenzo Stoakes
Acked-by: Liam R. Howlett
Signed-off-by: David Hildenbrand
---
mm/percpu-km.c | 2 +-
1 file changed
Let's check that no hstate that corresponds to an unreasonable folio size
is registered by an architecture. If we were to succeed registering, we
could later try allocating an unsupported gigantic folio size.
Further, let's add a BUILD_BUG_ON() for checking that HUGETLB_PAGE_ORDER
is sane at build
Let's reject them early, which in turn makes folio_alloc_gigantic() reject
them properly.
To avoid converting from order to nr_pages, let's just add MAX_FOLIO_ORDER
and calculate MAX_FOLIO_NR_PAGES based on that.
While at it, let's just make the order a "const unsigned order".
Reviewed-by: Zi Ya
It's no longer user-selectable (and the default was already "y"), so
let's just drop it.
It was never really relevant to the wireguard selftests either way.
Acked-by: Mike Rapoport (Microsoft)
Reviewed-by: Lorenzo Stoakes
Reviewed-by: Liam R. Howlett
Cc: "Jason A. Donenfeld"
Cc: Shuah Khan
S
Now handled by the core automatically once SPARSEMEM_VMEMMAP_ENABLE
is selected.
Reviewed-by: Mike Rapoport (Microsoft)
Acked-by: Catalin Marinas
Reviewed-by: Lorenzo Stoakes
Reviewed-by: Liam R. Howlett
Cc: Will Deacon
Signed-off-by: David Hildenbrand
---
arch/arm64/Kconfig | 1 -
1 file c
== Series Details ==
Series: drm/i915/bios: Remove unnecessary checks of PSR idle frames in VBT
binary
URL : https://patchwork.freedesktop.org/series/153792/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17104 -> Patchwork_153792v1
== Series Details ==
Series: mm: remove nth_page() (rev4)
URL : https://patchwork.freedesktop.org/series/153593/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/153593/revisions/4/mbox/ not
applied
Applying: mm: stop making SPARSEMEM_VMEMMAP user-s
On Mon, 01 Sep 2025, Jouni Högander wrote:
> PSR idle frames in VBT binary is a 4 bits wide bitfield. Checking if it's
> below 0 or over 15 doesn't make sense. Remove these checks.
>
> Signed-off-by: Jouni Högander
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 5
PSR idle frames in VBT binary is a 4 bits wide bitfield. Checking if it's
below 0 or over 15 doesn't make sense. Remove these checks.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_bios.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/dr
== Series Details ==
Series: drm/i915/hdmi: add debugfs to contorl HDMI bpc (rev7)
URL : https://patchwork.freedesktop.org/series/152562/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17098 -> Patchwork_152562v7
Summary
---
*** BLURB HERE ***
Lee Shawn C (2):
drm/i915/hdmi: add debugfs to contorl HDMI bpc
drm/i915: compute pipe bpp from link bandwidth management
drivers/gpu/drm/i915/display/g4x_hdmi.c | 6 +---
drivers/gpu/drm/i915/display/intel_crt.c | 5 +--
drivers/gpu/drm/i915/display/intel_fdi.c
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