functions
insert and clear entries.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 60 -
drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++-
drivers/gpu/drm/i915/i915_reg.h | 1 +
3 files changed, 57 insertions(+), 8 deletions
Words
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
intel/intel_bufmgr.h | 8
intel/intel_bufmgr_gem.c | 102 +++
2 files changed, 102 insertions(+), 8 deletions(-)
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index 9383c72
needs libdrm
---
tests/Makefile.am| 4 +-
tests/Makefile.sources | 1 +
tests/gem_exec_noreloc.c | 172 +++
3 files changed, 175 insertions(+), 2 deletions(-)
create mode 100644 tests/gem_exec_noreloc.c
diff --git a/tests/Makefile.am
not the first time I've written this patch.
XXX: This patch was never tested pre-GEN8. After rebase it was compile
tested only on GEN8.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 78 +
drivers/gpu/drm/i915/i915_gem_gtt.h
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ---
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d46993..00d9ab3 100644
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
intel/intel_bufmgr_gem.c | 69
1 file changed, 40 insertions(+), 29 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 0e1cb0d..d7d3769 100644
--- a/intel
-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 398 +---
drivers/gpu/drm/i915/i915_gem_gtt.h | 23 +--
2 files changed, 147 insertions(+), 274 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915
This patch is a proof of concept hack which repurposes the MSB of the
size field in created. Userptr already has the gup code, and all we need
to do is reuse it.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 12 -
drivers/gpu/drm/i915
sentences were perfectly succinct in describing the problem.
v2: Revamp and resend to ease future patches.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Daniel Vetter daniel.vet...@ffwll.ch
I didn't read the patch closely, but the problem
: There was a bug in the original patch where the ring-last_context
was set too early. I am not sure how this wasn't being hit when I sent
this previously. Perhaps I tested the wrong patch previously.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 24
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On Mon, Aug 04, 2014 at 11:15:13AM -0700, Rodrigo Vivi wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
The PDPs seem to get screwed up otherwise, specifically PDP0. I am not
really clear why this is required, it just works with full PPGTT.
v2: Only do it for gen8, to limit regression
On Mon, Aug 04, 2014 at 11:15:15AM -0700, Rodrigo Vivi wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
The actual post sync op is Write Immediate Data QWord. It is therefore
arguable that we should have always done a qword write.
The actual impetus for this patch is our decoder
On Wed, Jul 30, 2014 at 07:15:05AM +0100, Chris Wilson wrote:
On Tue, Jul 29, 2014 at 01:14:29PM -0700, Ben Widawsky wrote:
So don't bother checking it again.
This was introduced:
commit b361237bcc7cea1d99f770490120d8bc2aed
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Fri
On Wed, Jul 30, 2014 at 07:19:26AM +0100, Chris Wilson wrote:
On Tue, Jul 29, 2014 at 01:14:30PM -0700, Ben Widawsky wrote:
This adds two new data points to the trace event, wait time, and whether
or not the event slept. Both of these should already be obtainable
through various means
;
+
+ dev_priv-mm.aliasing_ppgtt = ppgtt;
+ }
+
return 0;
}
--
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On Wed, Jul 30, 2014 at 08:46:11PM -0700, Ben Widawsky wrote:
1386367941-7131-76-git-send-email-benjamin.widaw...@intel.com
and
1386367941-7131-81-git-send-email-benjamin.widaw...@intel.com
On Wed, Jul 30, 2014 at 09:42:02PM +0200, Daniel Vetter wrote:
Stuffing this into the context setup
On Wed, Jul 30, 2014 at 08:47:03PM -0700, Ben Widawsky wrote:
On Wed, Jul 30, 2014 at 08:46:11PM -0700, Ben Widawsky wrote:
1386367941-7131-76-git-send-email-benjamin.widaw...@intel.com
and
1386367941-7131-81-git-send-email-benjamin.widaw...@intel.com
Oops, was looking at the wrong
as it is.
With the first fix (I didn't verify that's the real workaround name),
Reviewed-by: Ben Widawsky b...@bwidawsk.net
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: Ville Syrjälä ville.syrj...@linux.intel.com
Cc: Ben Widawsky b...@bwidawsk.net
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
I don't quite understand the motivation for a get() other than debugging
the interface itself (if your set is broken
will explode loudly if you overflow it.
For future safety, I'd recommend dropping vm-ctx at this point. It
shouldn't be hard at all to get rid of (quick grep shows only debugfs).
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On Tue, Jul 29, 2014 at 11:32:07AM -0700, Ben Widawsky wrote:
On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote:
VMAs should take a reference of the address space they use.
Now, when the fd is closed, it will release the ref that the context was
holding, but it will still
exist where it won't
sleep).
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem.c | 12 +++-
drivers/gpu/drm/i915/i915_trace.h | 29 ++---
2 files changed, 33 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ac349ff..17f7ac9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915
the true callers of mutex_lock(). Unless we
provide a means for the wrapper to pass that information down.
It also appears that i915 is unique in this manner of wrapping
mutex_lock().
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
With the one
,
Alistair.
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Monday, July 28, 2014 10:27 AM
To: Ben Widawsky
Cc: Mcaulay, Alistair; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence
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on
the BDW version because of the public QA data which showed it was a win
for power without hurting performance.
I'd suggest you get Tom O'Rourke to review this.
Thanks
Deepak
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On Sun, Jul 20, 2014 at 09:29:55AM +0100, Chris Wilson wrote:
On Tue, Jul 15, 2014 at 08:30:33PM -0700, Ben Widawsky wrote:
On Tue, Jul 15, 2014 at 04:15:08PM +0200, Daniel Vetter wrote:
On Thu, Apr 24, 2014 at 02:47:48PM -0700, Ben Widawsky wrote:
On Wed, Feb 12, 2014 at 07:18:40PM
On Thu, Jul 17, 2014 at 10:51:23AM +0200, Daniel Vetter wrote:
On Fri, Jul 04, 2014 at 09:56:54AM -0700, Ben Widawsky wrote:
On Fri, Jul 04, 2014 at 08:57:08AM +0100, Chris Wilson wrote:
On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote:
Some of the original PPGTT patches
== to (Damien).
use ring == to instead of ring-id == to-id (Damien).
use continue instead of return (Rodrigo).
v4: avoid all unecessary computation (Damien).
reduce idx to loop scope (Damien).
Cc: Damien Lespiau damien.lesp...@intel.com
Cc: Ben Widawsky benjamin.widaw...@intel.com
Signed
, 2 = vecs, 3 = vcs2;
* vcs - 0 = bcs, 1 = vecs, 2 = vcs2, 3 = rcs;
* bcs - 0 = vecs, 1 = vcs2. 2 = rcs, 3 = vcs;
* vecs - 0 = vcs2, 1 = rcs, 2 = vcs, 3 = bcs;
* vcs2 - 0 = rcs, 1 = vcs, 2 = bcs, 3 = vecs;
*/
Cc: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Rodrigo Vivi
,
PCI_DMA_BIDIRECTIONAL);
- undo_idling(dev_priv, interruptible);
+ undo_idling(dev_priv, interruptible);
+ }
}
static void i915_gtt_color_adjust(struct drm_mm_node *node,
Note that this doesn't do much on platforms you care about.
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Ben Widawsky, Intel Open
the dma_unmap. Therefore I assume everything in that
list_empty() condition is a temporary hack.
This patch is:
Reviewed-by: Ben Widawsky b...@bwidawsk.net
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On Thu, Jul 17, 2014 at 04:45:02PM -0700, Ben Widawsky wrote:
On Fri, Jul 11, 2014 at 10:20:07AM -0700, armin.c.re...@intel.com wrote:
From: Armin Reese armin.c.re...@intel.com
Signed-off-by: Armin Reese armin.c.re...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c | 6 +++---
1 file
On Thu, Jul 17, 2014 at 09:39:55AM -0700, Rodrigo Vivi wrote:
With the increasing number of rings,
we probably have more information to print than we were printing.
After our discussion were you going to send a new patch?
[snip]
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more information to print than we were printing.
After our discussion were you going to send a new patch?
[snip]
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On Thu, Jul 17, 2014 at 10:58:17AM -0700, Rodrigo Vivi wrote:
With the increasing number of rings,
we probably have more information to print than we were printing.
v2: Loop only over active rings and print info with ring names.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Signed-off
Oops, meant to reply-to-all
On Thu, Jul 17, 2014 at 07:44:25PM -0700, Ben Widawsky wrote:
On Thu, Jul 17, 2014 at 10:42:20AM +0200, Daniel Vetter wrote:
On Thu, Jul 17, 2014 at 02:21:14PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
This was fumbled
On Mon, 14 Jul 2014 05:18:44 -0700
Rodrigo Vivi rodrigo.v...@intel.com wrote:
From: Bob Beckett robert.beck...@intel.com
Create a scratch page for the two unused PDPs and set all the PTEs
for them to point to it.
This patch addresses a page fault, and subsequent hang in pipe
control
On Tue, Jul 15, 2014 at 04:15:08PM +0200, Daniel Vetter wrote:
On Thu, Apr 24, 2014 at 02:47:48PM -0700, Ben Widawsky wrote:
On Wed, Feb 12, 2014 at 07:18:40PM +, Chris Wilson wrote:
For stolen pages, since it is verboten to access them directly on many
architectures, we have to read
).
--
Damien
Dan Carpenter has already reported this to us. I was expecting a patch
from Rodrigo.
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didn't follow any of the PM mails, so feel
free to ignore if this has been discussed and addressed already.
Testcase: igt/pm_rpm/debugfs-read
Cc: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm
binding.
FWIW, I remain in favor of the relocation idea unless someone already
expressed why we need multiple processes to have the relocation info.
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On Thu, Jul 03, 2014 at 10:10:48AM -0700, Ben Widawsky wrote:
On Thu, Jul 03, 2014 at 08:17:32AM +0100, Damien Lespiau wrote:
On Wed, Jul 02, 2014 at 02:19:42PM +0100, Rutkowski, Adam J wrote:
Having said all this, how about restoring the pin_ioctl? At least for
some time? We do have
On Thu, Jul 03, 2014 at 05:33:05PM -0400, Rodrigo Vivi wrote:
From: Ben Widawsky benjamin.widaw...@intel.com
The PDPs seem to get screwed up otherwise, specifically PDP0. I am not
really clear why this is required, it just works with full PPGTT.
v2: Only do it for gen8, to limit regression
This is a spec requirement for all rings.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5b4a9a0..1ac648f
the active list because of the missing retire seqno for a VMA.
Like some of the other fixes I've submitted recently, this should be
fixed by the eventual work Daniel will do.
This is pretty easy to reproduce whenever mesa uses the blit engine.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers
this should be a pretty reasonable thing to
accomplish. I think we can just give a flag for the reloc that it needs
to be in the GGTT, and then pass a check to the command scanner that
only that one offset is allowed, and only for OA.
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Ben Widawsky, Intel Open Source Technology Center
results of performance counters, shown by tools such as GPA/ Vtune.
Thanks,
Tomasz
-Original Message-
From: Mateo Lozano, Oscar
Sent: Wednesday, July 02, 2014 10:50 AM
To: Chris Wilson; Ben Widawsky
Cc: Intel-gfx@lists.freedesktop.org; Madajczak, Tomasz; Rutkowski, Adam J
kill ${pid[*]}
done
Ben Widawsky (16):
drm/i915: Split up do_switch
drm/i915: Extract l3 remapping out of ctx switch
drm/i915/ppgtt: Load address space after mi_set_context
drm/i915: Fix another another use-after-free in do_switch
drm/i915/ctx: Return earlier on failure
drm/i915/error
.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 601a58f..0e6e743 100644
--- a/drivers/gpu
to fix up the error state).
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gpu_error.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 66cf417..550ba38 100644
--- a/drivers/gpu/drm
This is just a cosmetic change to try to put do_switch_rcs on a diet. As
it stands, the function was quite complex, and error prone.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 32
1 file changed, 20 insertions
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_evict.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c
b/drivers/gpu/drm/i915/i915_gem_evict.c
index bbf4b12..38297d3 100644
--- a/drivers/gpu/drm/i915
: Rafael Barbalho rafael.barba...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 0e6e743..cf7cf81
whatever we chose later.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gpu_error.c | 53 +++
2 files changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b
commit message that addresses the requests
Ville made for v1
Only load PDPs for initial context load (Ville)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git
There are no users of this yet, but the idea is presented and split out
to find bugs.
Also, while here, return -ERESTARTSYS to the caller, in case they want
to do something with it.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu
makes
debugging a bit easier if we're tracking object lifetimes for the
context vs ppgtt
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b
to keep reset enabled but still get error state.
Since I found the patch pretty useful, I decided to clean it up and
submit it. It was mostly meant as a one-off hack originally though.
If a maintainer decides it's useful, then here it is.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu
Broadwell is perfectly capable of full PPGTT. I've been using it for
some time, and seen no especially ill effects.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1
Rename some variables, and clean up the code a bit to make things
clearer in our error capture.
There isn't an intentional functional change here.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gpu_error.c | 55 ---
1 file changed, 32
, and know
all the VMAs we want to capture are valid.
I could have probably figured out a way to reuse mm_list. As we've had
bugs here before in the shrinker, I think the best way forward is to get
it working, and then optimize it later.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers
investigating any corner cases, in particular, cases where I need
to cleanup the wq. If this patch does head in the merge direction, I
will take a closer look at that.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 10 +++
drivers/gpu/drm/i915/i915_gem.c
the need for the yet unmerged patch from Chris
(and an identical patch from me, which was first!!):
drm/i915: Prevent signals from interrupting close()
I have a followup patch to implement deferred free, before you complain.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915
Cc: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
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On Mon, Jun 30, 2014 at 09:53:44AM -0700, Rodrigo Vivi wrote:
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
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On Mon, Jun 30, 2014 at 09:51:09AM -0700, Rodrigo Vivi wrote:
It just fix a typo.
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
[snip]
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On Thu, Jun 19, 2014 at 08:28:11PM +0100, Chris Wilson wrote:
On Thu, Jun 19, 2014 at 12:06:13PM -0700, Ben Widawsky wrote:
This is one part in a few fixes needed to make FBC work with limited
stolen memory and large resolution displays. It is not the full
solution, but one (easy) step
On Sat, Jun 28, 2014 at 07:20:38AM +0100, Chris Wilson wrote:
On Fri, Jun 27, 2014 at 03:21:20PM -0700, Rodrigo Vivi wrote:
Reviewed-by: Rodrigo Vivi [1]rodrigo.v...@intel.com
On Fri, Jun 27, 2014 at 3:09 PM, Ben Widawsky
[2]benjamin.widaw...@intel.com wrote
On Sat, Jun 28, 2014 at 08:28:55PM +0100, Chris Wilson wrote:
On Sat, Jun 28, 2014 at 08:26:15AM -0700, Ben Widawsky wrote:
On Sat, Jun 28, 2014 at 07:20:38AM +0100, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
on this, except I think all the issues have been around
for multiple releases without bug reports.
Compile tested only for now.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 6 +++---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
drivers/gpu/drm/i915
On Fri, Jun 27, 2014 at 03:21:20PM -0700, Rodrigo Vivi wrote:
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
I have a couple of spots that I think are important to add, all in error
state. I'll repost v2 after I can actually test it.
[snip]
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On Wed, Jun 25, 2014 at 12:00:35PM +1000, Dave Airlie wrote:
On 25 June 2014 11:30, Ben Widawsky b...@bwidawsk.net wrote:
On Wed, Jun 18, 2014 at 12:04:46AM +0200, Daniel Vetter wrote:
On Tue, Jun 17, 2014 at 10:34:38PM +0200, Daniel Vetter wrote:
A WARN_ON is perfectly fine.
The BUG
Lespiau damien.lesp...@intel.com
Cc: Mika Kuoppala mika.kuopp...@intel.com
Cc: Ben Widawsky b...@bwidawsk.net
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79108
Daniel put his IRC r-b on this on IIRC.
[snip]
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place to be (I know from much experience). If Daniel is not okay
with that, then he needs to find a different reviewer.
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Broadwell is perfectly capable of full PPGTT. I've been using it for
some time, and seen no especially ill effects.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1
as initialised after it is
saved by the hardware during a SET_CONTEXT operation.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Cc: Ville Syrjälä ville.syrj...@linux.intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
Cc: Mika Kuoppala mika.kuopp
commit message that addresses the requests
Ville made for v1
Only load PDPs for initial context load (Ville)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git
proper live tracking of vma and contexts under full-ppgtt,
but this is useful piece of defensive programming enforcing our
userspace API contract.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_dma.c | 9 +
1
This is just a cosmetic change to try to put do_switch_rcs on a diet. As
it stands, the function was quite complex, and error prone.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 32
1 file changed, 20 insertions
Rodrigo, when you're ready, can you pull in Art's requests?
On Fri, Jun 20, 2014 at 03:56:08PM +, Runyan, Arthur J wrote:
You give me too much credit. I just gave you an explanation of what the
hardware does, then you ran with it.
On Thu, Jun 19, 2014 at 12:06:13PM -0700, Ben Widawsky
simpler, which benefits the look of an upcoming
patch.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 27 ++-
2 files changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu
.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_stolen.c | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 642fd36..a86b331 100644
-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_fbdev.c | 37 +++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index 27975c3..ca83af8 100644
--- a/drivers/gpu
is Art's. The bugs are mine.
Cc: Art Runyan arthur.j.run...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 3 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 54 +-
drivers/gpu/drm/i915/intel_pm.c| 28
On Thu, Jun 19, 2014 at 08:28:11PM +0100, Chris Wilson wrote:
On Thu, Jun 19, 2014 at 12:06:13PM -0700, Ben Widawsky wrote:
This is one part in a few fixes needed to make FBC work with limited
stolen memory and large resolution displays. It is not the full
solution, but one (easy) step
@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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to revert your
patch as was stated in the commit message. I am not sure how Daniel got
the impression that I thought this was in order.
Can you please resubmit the patch based on the latest intel-gpu-tools?
--
Ben Widawsky, Intel Open Source Technology Center
to bar's context
// load foos PDPs
LRI PDPs 1
MI_SET_CONTEXT bar // save PDPs 1 to foo's context
It's all wacky. This should allow full PPGTT on Broadwell to work.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 24
Broadwell is perfectly capable of full PPGTT. I've been using it for
some time, and seen no especially ill effects.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1
On Thu, Jun 12, 2014 at 07:16:48PM +0300, Ville Syrjälä wrote:
On Thu, Jun 12, 2014 at 08:25:52AM -0700, Ben Widawsky wrote:
On GEN8 the PDPs are saved and restored with context, which means we
must set them after the context switch has occurred. If we do not do
this, we end up saving
accelaration
weren't
enabled.
v2: Reserved IDs doesn't have GT defined. So, creating a separated list. (Ben)
Cc: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
include/drm/i915_pciids.h | 16 ++--
1 file changed, 14 insertions(+), 2 deletions
On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
+Ben Widawsky Daniel Vetter
On 06/09/2014 03:38 PM, Lewis Toohey wrote:
On 3 June 2014 02:22, Aaron Lu aaron...@intel.com wrote:
On 05/30/2014 09:12 PM, Lewis Toohey wrote:
Aaron
I am in the process of performing
On Tue, Jun 10, 2014 at 08:59:32PM +0100, Lewis Toohey wrote:
On 10 June 2014 17:58, Ben Widawsky b...@bwidawsk.net wrote:
On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
+Ben Widawsky Daniel Vetter
On 06/09/2014 03:38 PM, Lewis Toohey wrote:
On 3 June 2014 02:22, Aaron Lu
) \
INTEL_VGA_DEVICE(0x22b0, info), \
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sign-off in mail
added unnecessary whitespace
replace assert with open coded abort
So I've merged it with all those warts (except I fixed the
signed-off-by). Please keep these things in mind next patch, and feel
free to submit patches to fix these issues as well.
[snip]
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Ben Widawsky, Intel
is only needed for BDW E,F step.
Issue: APDEV-3096
Signed-off-by: Michel Thierry michel.thie...@intel.com
Docs say Gt3 only.
Otherwise, it's
Reviewed-by: Ben Widawsky b...@bwidawsk.net
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.
Signed-off-by: Rodrigo Vivi rodrigo.v...@gmail.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Should be cc: stable IMO
[snip]
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