-wilson.co.uk
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 40 +++-
1 file changed, 23 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 51ff40e..ed45143 100644
are outside the
norms given in the programming guide (ie. early silicon)
v2: Use RP1 instead of RPn
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ed45143..9728c2c 100644
},
{i915_inttoext_table, i915_inttoext_table, 0},
{i915_drpc_info, i915_drpc_info, 0},
--
1.8.5.2
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The same register exists for querying and programming eDRAM AKA eLLC. So
we can simply use it. For now, use all the same defaults as we had
for Haswell, since like Haswell, I have no further details.
I do not actually have a part with eDRAM, so I cannot test this.
Signed-off-by: Ben Widawsky b
-uninitialized]
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 11 ++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915
On Sat, Mar 29, 2014 at 03:56:41PM -0700, Ben Widawsky wrote:
I don't have any insight on what parts can do what. The docs do seem to
suggest WT caching works in at least the same manner as it doesn't on
Haswell.
That's a freudian slip... s/doesn't/does/
The addr = 0 is to shut up GCC
On Thu, Mar 27, 2014 at 11:39:36AM -0300, Paulo Zanoni wrote:
2014-03-18 17:29 GMT-03:00 Ben Widawsky b...@bwidawsk.net:
On Fri, Mar 07, 2014 at 08:10:30PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
On the preinstall stage we should just disable all
On Wed, Mar 26, 2014 at 08:04:38AM +0100, Daniel Vetter wrote:
On Wed, Mar 26, 2014 at 07:24:16AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 07:01:50PM -0700, Ben Widawsky wrote:
While the context is not being used, we can make the PTEs invalid, so
nothing can accidentally
On Wed, Mar 26, 2014 at 08:06:00AM -0700, Ben Widawsky wrote:
On Wed, Mar 26, 2014 at 08:04:38AM +0100, Daniel Vetter wrote:
On Wed, Mar 26, 2014 at 07:24:16AM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 07:01:50PM -0700, Ben Widawsky wrote:
While the context is not being used
On Wed, Mar 26, 2014 at 06:41:51PM +, Damien Lespiau wrote:
Not implementing this W/A can lead to hangs.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Rafael Barbalho rafael.barba...@intel.com
Cc: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp
On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
On Wed, Mar 26, 2014 at 06:41:51PM +, Damien Lespiau wrote:
Not implementing this W/A can lead to hangs.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Rafael Barbalho rafael.barba...@intel.com
Cc: Ville Syrjälä
On Wed, Mar 26, 2014 at 05:33:20PM -0300, Paulo Zanoni wrote:
2014-03-19 14:25 GMT-03:00 Ben Widawsky b...@bwidawsk.net:
On Wed, Mar 19, 2014 at 09:36:04AM +0100, Daniel Vetter wrote:
On Tue, Mar 18, 2014 at 01:53:53PM -0700, Ben Widawsky wrote:
On Fri, Mar 07, 2014 at 08:10:16PM -0300
On Wed, Mar 26, 2014 at 10:39:21PM +0100, Daniel Vetter wrote:
On Wed, Mar 26, 2014 at 12:10:41PM -0700, Ben Widawsky wrote:
On Wed, Mar 26, 2014 at 12:08:44PM -0700, Ben Widawsky wrote:
On Wed, Mar 26, 2014 at 06:41:51PM +, Damien Lespiau wrote:
Not implementing this W/A can lead
a WARN_ON rather than loop indefinitely on an unstable
register read.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Timo Aaltonen tjaal...@ubuntu.com
Cc: Tvrtko Ursulin tvrtko.ursu...@linux.intel.com
---
drivers/gpu/drm/i915
On Tue, Mar 25, 2014 at 10:42:09AM +0100, Daniel Vetter wrote:
On Mon, Mar 24, 2014 at 03:37:12PM -0700, Ben Widawsky wrote:
On Sat, Mar 22, 2014 at 06:52:25PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 07:33:59PM +0200, Mika Kuoppala wrote:
Hi,
Daniel Vetter daniel.vet
intel_ring_valid(ring) ? -EIO : -EINVAL;
}
mode = args-flags I915_EXEC_CONSTANTS_MASK;
--
1.9.1
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On Tue, Mar 25, 2014 at 10:46:12AM +0100, Daniel Vetter wrote:
On Mon, Mar 24, 2014 at 06:06:00PM -0700, Ben Widawsky wrote:
When PPGTT was disabled by default, the patch also prevented the user
from overriding this behavior via module parameter. Being able to test
this on arbitrary kernels
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/Makefile.am | 2 ++
tools/quick_dump/chipset.i| 5 +++--
tools/quick_dump/chipset_macro_wrap.c | 14 ++
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/tools/quick_dump/Makefile.am b
On Tue, Mar 25, 2014 at 08:47:47PM +0100, Daniel Vetter wrote:
On Tue, Mar 25, 2014 at 11:38:51AM -0700, Ben Widawsky wrote:
quick_dump built fine, but it could actually run, since a lot of the
linking happens at run time. There is one hack where we redefine the
environment stuff, since
/show_bug.cgi?id=75724
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 56 +
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 57 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
On Sat, Mar 22, 2014 at 09:06:00PM +, Chris Wilson wrote:
On Sat, Mar 22, 2014 at 11:42:17AM -0700, Ben Widawsky wrote:
On Thu, Mar 20, 2014 at 07:24:38AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 06:31:14PM -0700, Ben Widawsky wrote:
Programming it outside of the rp0-rp1
Deepak, this patch can use review. If you have time, can you please take
a look.
There were some rebase conflicts from the last version, so please make
sure to recheck carefully (since I think you did look before).
Thanks.
On Wed, Mar 19, 2014 at 06:31:17PM -0700, Ben Widawsky wrote:
Almost
On Thu, Mar 20, 2014 at 11:10:13AM +, Chris Wilson wrote:
On Fri, Dec 06, 2013 at 02:11:55PM -0800, Ben Widawsky wrote:
static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
{
+#define GEN6_PD_ALIGN (PAGE_SIZE * 16)
+#define GEN6_PD_SIZE (GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE
On Mon, Mar 24, 2014 at 07:45:56PM +, Chris Wilson wrote:
On Mon, Mar 24, 2014 at 12:36:23PM -0700, Ben Widawsky wrote:
On Thu, Mar 20, 2014 at 11:10:13AM +, Chris Wilson wrote:
On Fri, Dec 06, 2013 at 02:11:55PM -0800, Ben Widawsky wrote:
static int gen6_ppgtt_init(struct
is still
pending, but the symptoms match.
Cc: Mika Kuoppala mika.kuopp...@intel.com
Cc: Ben Widawsky b...@bwidawsk.net
Cc: Chris Wilson ch...@chris-wilson.co.uk
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74100
The hard hangs are not so frequent with this patch
On Mon, Mar 24, 2014 at 04:14:32PM -0700, Ausmus, James wrote:
On Sat, Mar 22, 2014 at 4:34 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Fri, Mar 21, 2014 at 05:51:01PM -0700, Ben Widawsky wrote:
Let's try this again. I've pushed a branch here:
http://cgit.freedesktop.org/~bwidawsk/drm-intel
93a25a9e2d67765c3092bfaac9b855d95e39df97
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Thu Mar 6 09:40:43 2014 +0100
drm/i915: Disable full ppgtt by default
By default PPGTT is set to -1. 0 means off, 1 means aliasing only, 2
means full, all other values are reserved.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
On Mon, Mar 24, 2014 at 06:41:47PM -0700, Stéphane Marchesin wrote:
On Mon, Mar 24, 2014 at 6:21 PM, Ben Widawsky
benjamin.widaw...@linux.intel.com wrote:
I am not clear why we've never enabled it by default for GEN7. Looking
at the git hostiry, it seems Rodrigo disabled it by default
compile tested.
Cc: Stéphane Marchesin marc...@chromium.org
Cc: Rodrigo Vivi rodrigo.v...@gmail.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b
On Mon, Mar 24, 2014 at 06:53:47PM +, Damien Lespiau wrote:
Using uint64_t in that second member makes it aligned to 64bits, while
the first member is only 32bits. We then had a 32bits hole in there!
Found-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw
.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Timo Aaltonen tjaal...@ubuntu.com
Cc: Tvrtko Ursulin tvrtko.ursu...@linux.intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 13 -
drivers/gpu/drm/i915/i915_gpu_error.c
On Mon, Mar 24, 2014 at 07:41:17PM -0700, Ben Widawsky wrote:
On Fri, Mar 21, 2014 at 12:41:53PM +, Chris Wilson wrote:
As Broadwell has an increased virtual address size, it requires more
than 32 bits to store offsets into its address space. This includes the
debug registers to track
On Sat, Mar 22, 2014 at 08:58:29PM +, Chris Wilson wrote:
On Sat, Mar 22, 2014 at 12:43:28PM -0700, Ben Widawsky wrote:
On Tue, Mar 18, 2014 at 08:44:28AM +, Chris Wilson wrote:
On Mon, Mar 17, 2014 at 10:48:39PM -0700, Ben Widawsky wrote:
The old code (I'm having trouble finding
On Sun, Mar 23, 2014 at 04:22:35PM +0100, Daniel Vetter wrote:
On Sat, Mar 22, 2014 at 10:47:21PM -0700, Ben Widawsky wrote:
This file contains all necessary defines, prototypes and typesdefs for
manipulating GEN graphics address translation (this does not include the
legacy AGP driver
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http
, vma-obj-pages, vma-node.start,
cache_level);
}
--
1.8.3.2
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to play
a game of whack-a-mole).
Also add a library testcase for all the different variants to make
sure it really works.
Cc: Thomas Wood thomas.w...@intel.com
Cc: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
You do realize you've just
on the end result)? I can do that
if you prefer it. It seems pointless to me though.
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On Thu, Mar 20, 2014 at 07:24:38AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 06:31:14PM -0700, Ben Widawsky wrote:
Programming it outside of the rp0-rp1 range is considered a programming
error. Since we do not know that the previous value would actually be in
the range, program
On Thu, Mar 20, 2014 at 07:28:29AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 06:31:15PM -0700, Ben Widawsky wrote:
We have a need for duplicated parsing of the RP_STATE_CAPS register (and
the setting of the associated fields). To reuse some code, we can
extract the function
On Tue, Mar 18, 2014 at 08:44:28AM +, Chris Wilson wrote:
On Mon, Mar 17, 2014 at 10:48:39PM -0700, Ben Widawsky wrote:
The old code (I'm having trouble finding the commit) had a reason for
doing things when there was an error, and would continue on, thus the
!ret. For the newer code
On Tue, Mar 18, 2014 at 10:15:56AM +0100, Daniel Vetter wrote:
On Mon, Mar 17, 2014 at 10:48:41PM -0700, Ben Widawsky wrote:
TODO: Do header files need a copyright?
Yup ;-)
I like this though, especially since finer-grained files will make
kerneldoc inclusion (well, grouped into sensible
On Tue, Mar 18, 2014 at 09:09:45AM +, Chris Wilson wrote:
On Mon, Mar 17, 2014 at 10:48:46PM -0700, Ben Widawsky wrote:
Move the remaining members over to the new page table structures.
This can be squashed with the previous commit if desire. The reasoning
is the same as that patch
On Tue, Mar 18, 2014 at 09:14:09AM +, Chris Wilson wrote:
On Mon, Mar 17, 2014 at 10:48:47PM -0700, Ben Widawsky wrote:
As we move toward dynamic page table allocation, it becomes much easier
to manage our data structures if break do things less coarsely by
breaking up all of our
for some time. This exact
patch though has only been compile tested.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 178 +--
drivers/gpu/drm/i915/i915_gem_gtt.c | 69 -
drivers/gpu/drm/i915/i915_gem_gtt.h | 283
On Tue, Feb 04, 2014 at 12:11:03PM +0100, Daniel Vetter wrote:
On Fri, Jan 31, 2014 at 05:14:02PM +0200, Mika Kuoppala wrote:
Found with smatch.
Signed-off-by: Mika Kuoppala mika.kuopp...@intel.com
Both smatch patches merged to dinq, thanks.
-Daniel
CC stable?
--
Ben Widawsky
...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_uncore.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 87df68f..6df5ec4 100644
From: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
From: Ben Widawsky benjamin.widaw...@intel.com
I'm not clear if the hardware is still subject to the same prefetching
issues that made us use a scratch page in the first place. In either
case, we're using garbage with the current code (we will end up using
offset 0).
This may be the cause of our
From: Jani Nikula jani.nik...@intel.com
BDW is no longer flagged as preliminary hw, but without
i915.preliminary_hw_support module param set the logs are filled with
WARNs about it.
Just make semaphores off the BDW per-chip default for now.
CC: Ben Widawsky b...@bwidawsk.net
Reported
From: Kenneth Graunke kenn...@whitecape.org
I believe this will be necessary on production hardware.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
[danvet: Fix whitespace fail spotted
Kuoppala mika.kuopp...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_uncore.c | 10 +-
1 file changed, 5
From: Ben Widawsky benjamin.widaw...@intel.com
Apparently it is wiped out from under us, and we get some really fun
caching artifacts upon resume (it seems to be WB for all types by
default).
Reported-by: James Ausmus james.aus...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Tested
From: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 10
mailing list
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: Ben Widawsky b...@bwidawsk.net
Reported-by: Sebastien Dufour sebastien.duf...@intel.com
Signed-off-by: Jani Nikula jani.nik...@intel.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
[BDW 3.14 backport]
Cc: sta...@vger.kernel.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Conflicts
On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
benjamin.widaw...@linux.intel.com wrote:
The following patches are the backported simple fixes for 3.14. Some
of these already had Cc: stable on them, but required conflict
On Fri, Mar 21, 2014 at 04:47:05PM -0700, Greg KH wrote:
On Fri, Mar 21, 2014 at 03:14:48PM -0700, Ben Widawsky wrote:
On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 7:48 PM, Ben Widawsky
benjamin.widaw...@linux.intel.com wrote:
The following
On Fri, Mar 21, 2014 at 05:06:06PM -0700, Ben Widawsky wrote:
On Fri, Mar 21, 2014 at 04:47:05PM -0700, Greg KH wrote:
On Fri, Mar 21, 2014 at 03:14:48PM -0700, Ben Widawsky wrote:
On Fri, Mar 21, 2014 at 08:49:35PM +0100, Daniel Vetter wrote:
On Fri, Mar 21, 2014 at 7:48 PM, Ben
want Cc: stable tags.
James: please test this as soon as possible.
Thanks.
On Fri, Mar 21, 2014 at 11:48:09AM -0700, Ben Widawsky wrote:
The following patches are the backported simple fixes for 3.14. Some
of these already had Cc: stable on them, but required conflict
resolution which I've
Cc: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
into the global GTT.
v2: Restore the non-full-ppgtt path for simplicity as we may not even
create vma with older hardware.
v3: Tweak handling of global entries and default context entries.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
On Wed, Mar 19, 2014 at 09:36:04AM +0100, Daniel Vetter wrote:
On Tue, Mar 18, 2014 at 01:53:53PM -0700, Ben Widawsky wrote:
On Fri, Mar 07, 2014 at 08:10:16PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Hi
This is basically a rebase of [PATCH 00/19
On Wed, Mar 19, 2014 at 09:28:32AM +0100, Daniel Vetter wrote:
On Tue, Mar 18, 2014 at 11:20:09AM -0700, Ben Widawsky wrote:
On Fri, Mar 07, 2014 at 08:10:24PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Instead of trying to clear it again. It should already
within the per-process address spaces. In order to find
the full location, we need to read the high bits from a second register.
We then also need to expand our storage to keep track of the larger
address.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw
On Tue, Mar 04, 2014 at 03:30:14PM +0100, Daniel Vetter wrote:
On Wed, Feb 19, 2014 at 10:27:20PM -0800, Ben Widawsky wrote:
RC6 works a lot like HW contexts in that when the GPU enters RC6 it
saves away the state to a context, and loads it upon wake.
It's to be somewhat expected
, I wanted to make it a separate patch for
the bisectable 'just-in-case'
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_sysfs.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu
Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ab9e992..9486396 100644
fails, the later is likely invalid.
Having a bit more confidence in my understanding of how things work, I
now feel it's better to have clear, readable, code than to try to skip
over this one operation in an unusual case.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915
jeff.mc...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_sysfs.c | 36 ---
drivers/gpu/drm/i915/intel_pm.c | 40 ---
2 files changed, 33 insertions(+), 43 deletions(-)
diff --git
. min_freq and max_freq (which may be equal to rp0, or
rp1 depending on the platform) represent the actual HW min and max.
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c | 26
drivers/gpu/drm/i915/i915_drv.h
are outside the
norms given in the programming guide (ie. early silicon)
v2: Use RP1 instead of RPn
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu
this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 2 +-
2 files changed, 2 insertions
)
+ tests[i].fn();
+ }
+
+ igt_fixture
+ close(fd);
+}
--
lgtm. Put the commit message in the test description and call it
Reviewed-by: Ben Widawsky b...@bwidawsk.net
I'm pretty impressed you used all the igt_*_foo.
--
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-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 4e1787ee8f37..9cc1c9360238 100644
--- a/drivers/gpu/drm
);
ibx_irq_preinstall(dev);
--
1.8.5.3
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))
I915_WRITE(SERR_INT, I915_READ(SERR_INT));
}
--
1.8.5.3
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Ben Widawsky, Intel Open Source Technology Center
On Fri, Mar 07, 2014 at 08:10:21PM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
It's the only thihg missing, apparently.
s/thihg/thing
There is a potential fixup in patch 3, but with or without,
everything up through here is:
Reviewed-by: Ben Widawsky b
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IIR registers. For this
one, there's no need to double-clear since it can't store more than
one interrupt.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Without the assert that I don't like, this is
Reviewed-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_irq.c | 8
Zanoni paulo.r.zan...@intel.com
This one just like patch 9 is:
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Like that, I'd prefer to get rid of the IIR assertion
---
drivers/gpu/drm/i915/i915_irq.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
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().
}
static void valleyview_irq_uninstall(struct drm_device *dev)
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the POSTING_READ calls to the macros
makes the code safer, and the additional useless register reads
shouldn't be noticeable. So move the POSTING_READ calls to the
callers.
Can you just squash this into the earlier patch? Either way,
Reviewed-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Paulo
stuff you combined, I'm really glad you did it this way. I'm
sure I've missed something silly though, since every patch looks so
similar :P
1-5: Reviewed-by: Ben Widawsky b...@bwidawsk.net (with possible comment
improvement on #3)
7: I don't like. Can we drop? I guess doing this would make
Apparently it is wiped out from under us, and we get some really fun
caching artifacts upon resume (it seems to be WB for all types by
default).
Reported-by: James Ausmus james.aus...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +-
1
, rather than just whether it
is bound into the global GTT.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Ben Widawsky benjamin.widaw...@intel.com
Signed-off-by: Rodrigo Vivi rodrigo.v...@gmail.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 34
in the
driver load call. This way we avoid calling setup_timer again in the
resume code (where we also call sanitize_early).
Cc: Chris Wilson ch...@chris-wilson.co.uk
Cc: Mika Kuoppala mika.kuopp...@intel.com
Cc: Ben Widawsky benjamin.widaw...@intel.com
Tested-by: Rodrigo Vivi rodrigo.v
On Tue, Mar 18, 2014 at 11:29:58AM -0700, Jesse Barnes wrote:
On Tue, 18 Mar 2014 09:05:58 +
Chris Wilson ch...@chris-wilson.co.uk wrote:
On Mon, Mar 17, 2014 at 10:48:44PM -0700, Ben Widawsky wrote:
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915
On Sat, Feb 22, 2014 at 01:37:16PM +, Chris Wilson wrote:
On Mon, Feb 17, 2014 at 07:01:44PM -0800, Ben Widawsky wrote:
The names of the struct members for RPS are stupid. Every time I need to
do anything in this code I have to spend a significant amount of time to
remember what it all
with the i915. :-/
Below is the fix. I'll repost a v2 of the original patch.
Sorry about that.
I was about to send out the same fix when I saw this.
Reviewed-by: Ben Widawsky b...@bwidawsk.net
-- Steve
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace.h
On Tue, Mar 18, 2014 at 06:27:03PM -0700, Ben Widawsky wrote:
On Sat, Feb 22, 2014 at 01:37:16PM +, Chris Wilson wrote:
On Mon, Feb 17, 2014 at 07:01:44PM -0800, Ben Widawsky wrote:
The names of the struct members for RPS are stupid. Every time I need to
do anything in this code I
Therefore we can do it from our general init function. Eventually, I
hope to have a lot more commonality like this. It won't arrive yet, but
this was a nice easy one.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +
1 file changed, 1 insertion
trivial.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b3e31fd..084e82f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
it's more
reusable.
I'd really like to get ppgtt info into our error state, but I found it too
difficult to make work in the limited time I have. Maybe Mika can find a way.
Cc: Mika Kuoppala mika.kuopp...@linux.intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915
This patch existed for another reason which no longer exists. I liked
it, so I kept it in the series. It can skipped if undesirable.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +-
2 files changed, 3 insertions
The current code will both potentially print a WARN, and setup part of
the PPGTT structure. Neither of these harm the current code, it is
simply for clarity, and to perhaps prevent later bugs, or weird
debug messages.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915
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