Re: [Intel-gfx] [PATCH v3 2/2] drivers: i915: Default max backlight brightness value

2011-11-08 Thread Bryan Freed
On Tue, Nov 8, 2011 at 5:49 PM, Olof Johansson o...@lixom.net wrote: Hi, On Tue, Nov 8, 2011 at 3:11 PM, Matthew Garrett mj...@srcf.ucam.org wrote: On Tue, Nov 08, 2011 at 03:02:00PM -0800, Olof Johansson wrote: How about a DMI table check that overrides whatever is setup (or not setup)

Re: [Intel-gfx] [PATCH] CHROMIUM: i915: Select non-alternate SSC frequency for some systems

2011-10-14 Thread Bryan Freed
On Thu, Oct 6, 2011 at 8:09 AM, Jesse Barnes jbar...@virtuousgeek.orgwrote: On Wed, 5 Oct 2011 22:45:55 -0700 Simon Que s...@chromium.org wrote: Hi, Here's a patch to introduce a DMI-based SSC frequency selection in intel_bios.c. Instead of always selecting the alternate SSC

Re: [Intel-gfx] How does i915 CRT hotplug detection work?

2011-01-08 Thread Bryan Freed
Hi intel-gfx folks. This issue is coming up for me again. Can anyone comment on where I can go for an answer? bryan. On Fri, Dec 10, 2010 at 10:15 AM, Bryan Freed bfr...@chromium.org wrote: The only additional information I have is that the irq occurs on a regular 6.47s interval. Can

Re: [Intel-gfx] of the LVDS panel registers, and it just inherits the values. If the

2010-12-14 Thread Bryan Freed
Sorry, bad patch email. Working on it... bryan. On Tue, Dec 14, 2010 at 11:23 AM, bfr...@chromium.org wrote: intel_display.c: ensures the sync polarity to the panel is correct and issues a message if the driver changes it. If these are not correct then although the panel looks ok, output

Re: [Intel-gfx] How does i915 CRT hotplug detection work?

2010-12-10 Thread Bryan Freed
The only additional information I have is that the irq occurs on a regular 6.47s interval. Can anyone comment on the mechanism? bryan. On Tue, Dec 7, 2010 at 5:08 PM, Bryan Freed bfr...@chromium.org wrote: I have a pineview system with VGA output that takes anywhere from 1 to 5 seconds

[Intel-gfx] [PATCH] i915: Modify for pineview clock source and lvds sync polarity

2010-12-08 Thread Bryan Freed
The i915 driver normally assumes the video bios has configured several of the LVDS panel registers, and it just inherits the values. If the vbios has not run, several of these will need to be setup. intel_bios.c: default clock source selection on pineview to use the SSC source intel_display.c:

Re: [Intel-gfx] xrandr crashes X with a GPU hung in the i915 driver

2010-11-05 Thread Bryan Freed
, and who knows what else. bryan. On Fri, Nov 5, 2010 at 2:16 AM, Chris Wilson ch...@chris-wilson.co.ukwrote: On Thu, 4 Nov 2010 17:12:31 -0700, Bryan Freed bfr...@chromium.org wrote: I have a situation where unplugging an external monitor and running an xrandr sequence to return the screen

[Intel-gfx] xrandr crashes X with a GPU hung in the i915 driver

2010-11-04 Thread Bryan Freed
I have a situation where unplugging an external monitor and running an xrandr sequence to return the screen to the internal display sometimes causes the i915 driver to wig out. In perusing the intel-gfx archives, I see http://lists.freedesktop.org/archives/intel-gfx/2010-May/006957.html makes a

Re: [Intel-gfx] [PATCH] i915: Initialize panel timing registers if VBIOS did not.

2010-10-08 Thread Bryan Freed
. On Fri, Oct 8, 2010 at 2:58 AM, Chris Wilson ch...@chris-wilson.co.ukwrote: On Thu, 7 Oct 2010 17:05:46 -0700, Bryan Freed bfr...@chromium.org wrote: The time between start of the pixel clock and backlight enable is a basic panel timing constraint. If the Panel Power On/Off registers are found

[Intel-gfx] Does the i915 driver (and hardware) properly handle DPMS on/off?

2010-10-08 Thread Bryan Freed
I will accept a redirect to another list if this is the wrong one. When I run a loop of xset dpms force off; sleep 1; xset dpms force on; sleep 1 to repeatedly turn on and off the panel (connected through i915 LVDS), it does not come back on after a while. The backlight comes on, but the

Re: [Intel-gfx] [PATCH] CHROMIUM: i915: Initialize panel timing registers if VBIOS did not.

2010-10-07 Thread Bryan Freed
no problem moving the check to init_vbt_default(). bryan. On Thu, Oct 7, 2010 at 3:55 PM, Chris Wilson ch...@chris-wilson.co.ukwrote: On Thu, 7 Oct 2010 15:48:14 -0700, Bryan Freed bfr...@chromium.org wrote: The time between start of the pixel clock and backlight enable is a basic panel timing

[Intel-gfx] [PATCH] i915: Initialize panel timing registers if VBIOS did not.

2010-10-07 Thread Bryan Freed
: Ibed6cc10d46bf52fd92e0beb25ae3525b5eef99d Signed-off-by: Bryan Freed bfr...@chromium.org --- drivers/gpu/drm/i915/intel_bios.c |9 + 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index ad030ff..943bbad 100644 --- a/drivers/gpu/drm