Re: [Intel-gfx] [PATCH v5 3/5] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

On Sat, 2019-03-30 at 09:01 +, Chris Wilson wrote: > Quoting Carlos Santa (2019-03-22 23:41:16) > > From: Michel Thierry > > > > Emit the required commands into the ring buffer for starting and > > stopping the watchdog timer before/after batch buffer start during

Re: [Intel-gfx] [PATCH v5 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Mon, 2019-03-25 at 10:00 +, Tvrtko Ursulin wrote: > On 22/03/2019 23:41, Carlos Santa wrote: > > From: Michel Thierry > > > > *** General *** > > > > Watchdog timeout (or "media engine reset") is a feature that allows > > userland applicat

[Intel-gfx] [PATCH v5 3/5] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

Tvrtko) Replace flag watchdog_running with enable_watchdog (Tvrtko) Emit a single MI_NOOP by conditionally checking whether the # of emitted OPs is odd (Tvrtko) v8: Rebase Cc: Chris Wilson Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos

[Intel-gfx] [PATCH v5 1/5] drm/i915: Add engine reset count in get-reset-stats ioctl

: Keep rejecting attempts to use pad as input (Antonio) v4: Rebased. v5: Rebased. Get rid of the union to store pad/engine count (Chris) Cc: Chris Wilson Cc: Mika Kuoppala Cc: Antonio Argenziano Cc: Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers

[Intel-gfx] [PATCH v5 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

p checking for the guilty seqno in the tasklet (Tvrtko) Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++ drivers/gpu/drm/i915/i915_irq.c | 14 -- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v5 5/5] drm/i915: Watchdog timeout: Include threshold value in error state

off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gpu_error.c | 14 ++ drivers/gpu/drm/i915/i915_gpu_error.h | 1 + 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.

[Intel-gfx] [PATCH v5 0/5] GEN8+ GPU Watchdog Reset Support

This is a rebased on the original patch series from Michel Thierry: https://patchwork.freedesktop.org/series/21868 Note that this series is only limited to the GPU Watchdog timeout for execlists as it leaves out support for GuC based submissions for later. PATCH v5 of this series was tested from

[Intel-gfx] [PATCH v5 4/5] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

rtko) Let the compiler takes care of inlines (Tvrtko) Make watchdog_to_clock_counts more robust (Tvrtko) Cc: Antonio Argenziano Cc: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 3 +

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Tue, 2019-03-19 at 12:46 +, Tvrtko Ursulin wrote: > On 19/03/2019 12:39, Tvrtko Ursulin wrote: > > > > On 18/03/2019 00:15, Carlos Santa wrote: > > > On Mon, 2019-03-11 at 10:39 +, Tvrtko Ursulin wrote: > > > > On 08/03/2019 03:16, Carlos Santa wrote

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Mon, 2019-03-11 at 10:39 +, Tvrtko Ursulin wrote: > On 08/03/2019 03:16, Carlos Santa wrote: > > On Fri, 2019-03-01 at 09:36 +, Chris Wilson wrote: > > > > > > > > > > Quoting Carlos Santa (2019-02-21 02:58:16) > &g

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Fri, 2019-03-01 at 09:36 +, Chris Wilson wrote: > > > Quoting Carlos Santa (2019-02-21 02:58:16) > > +#define GEN8_WATCHDOG_1000US(dev_priv) > > watchdog_to_clock_counts(dev_priv, 1000) > > +static void gen8_watchdog_irq_handler(unsigned long data) > > +{ &

Re: [Intel-gfx] [PATCH v4 1/5] drm/i915: Add engine reset count in get-reset-stats ioctl

On Mon, 2019-02-25 at 13:34 +, Tvrtko Ursulin wrote: > On 21/02/2019 02:58, Carlos Santa wrote: > > From: Michel Thierry > > > > Users/tests relying on the total reset count will start seeing a > > smaller > > number since most of the hangs can be

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Fri, 2019-03-01 at 09:36 +, Chris Wilson wrote: > Quoting Carlos Santa (2019-02-21 02:58:16) > > +#define GEN8_WATCHDOG_1000US(dev_priv) > > watchdog_to_clock_counts(dev_priv, 1000) > > +static void gen8_watchdog_irq_handler(unsigned long data) > > +{ > &g

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Thu, 2019-02-28 at 17:38 +, Tvrtko Ursulin wrote: > On 21/02/2019 02:58, Carlos Santa wrote: > > From: Michel Thierry > > > > *** General *** > > > > Watchdog timeout (or "media engine reset") is a feature that allows > > userland applicat

[Intel-gfx] [PATCH v4 5/5] drm/i915: Watchdog timeout: Include threshold value in error state

From: Michel Thierry Save the watchdog threshold (in us) as part of the engine state. v2: Only do it for gen8+ (and prevent a missing-case warn). v3: use ctx->__engine. v4: Rebase. v5: Rebase. Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Car

[Intel-gfx] [PATCH v4 0/5] GEN8+ GPU Watchdog Reset Support

This is a rebased on the original patch series from Michel Thierry that can be found here: https://patchwork.freedesktop.org/series/21868 Note that this series is only limited to the GPU Watchdog timeout for execlists as it leaves out support for GuC based submission for a later time. PATCH v4

[Intel-gfx] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

From: Chris Wilson To determine whether an engine has 'stuck', we simply check whether or not is still on the same seqno for several seconds. To keep this simple mechanism intact over the loss of a global seqno, we can simply add a new global heartbeat seqno instead. As we cannot know the

[Intel-gfx] [PATCH v4 4/5] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

o Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 50 +- drivers/gpu/drm/i915/i915_gem_context.c | 91 + include/uapi/drm/i915_drm.h | 1 + 3 files changed, 141 insertions(+), 1 deletion(-) diff --

[Intel-gfx] [PATCH v4 1/5] drm/i915: Add engine reset count in get-reset-stats ioctl

: Keep rejecting attempts to use pad as input (Antonio) v4: Rebased. v5: Rebased. Cc: Chris Wilson Cc: Mika Kuoppala Cc: Antonio Argenziano Cc: Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- include

[Intel-gfx] [PATCH v4 2/5] drm/i915: Watchdog timeout: IRQ handler for gen8+

checks all class based checks (Tvrtko) Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++ drivers/gpu/drm/i915/i915_irq.c | 12 - d

[Intel-gfx] [PATCH v4 3/5] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

Tvrtko) Replace flag watchdog_running with enable_watchdog (Tvrtko) Emit a single MI_NOOP by conditionally checking whether the # of emitted OPs is odd (Tvrtko) Cc: Chris Wilson Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos

[Intel-gfx] [PATCH v3 4/6] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

o Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 50 +- drivers/gpu/drm/i915/i915_gem_context.c | 91 + include/uapi/drm/i915_drm.h | 1 + 3 files changed, 141 insertions(+), 1 deletion(-) diff --

[Intel-gfx] [PATCH v3 3/6] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

Tvrtko) Replace flag watchdog_running with enable_watchdog (Tvrtko) Emit a single MI_NOOP by conditionally checking whether the # of emitted OPs is odd (Tvrtko) Cc: Chris Wilson Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos

[Intel-gfx] [PATCH v3 2/6] drm/i915: Watchdog timeout: IRQ handler for gen8+

checks all class based checks (Tvrtko) Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++ drivers/gpu/drm/i915/i915_irq.c | 12 +++- d

[Intel-gfx] [PATCH v3 6/6] drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?

the hang by itself later on (I'm inclined to this). But the other option is to blindly trust the HW, which is what this patch does... v1: Rebase. CC: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/intel_hangcheck.c | 3

[Intel-gfx] [PATCH v3 0/6] GEN8+ GPU Watchdog Reset Support

This is a rebased on the original patch series from Michel Thierry that can be found here: https://patchwork.freedesktop.org/series/21868 Note that this series is only limited to the GPU Watchdog timeout for execlists as it leaves out support for GuC based submission for a later time. PATCH v3

[Intel-gfx] [PATCH v3 1/6] drm/i915: Add engine reset count in get-reset-stats ioctl

: Keep rejecting attempts to use pad as input (Antonio) v4: Rebased. v5: Rebased. Cc: Chris Wilson Cc: Mika Kuoppala Cc: Antonio Argenziano Cc: Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- include

[Intel-gfx] [PATCH v3 5/6] drm/i915: Watchdog timeout: Include threshold value in error state

From: Michel Thierry Save the watchdog threshold (in us) as part of the engine state. v2: Only do it for gen8+ (and prevent a missing-case warn). v3: use ctx->__engine. v4: Rebase. v5: Rebase. Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Car

[Intel-gfx] [PATCH v2 3/6] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

Tvrtko) Replace flag watchdog_running with enable_watchdog (Tvrtko) Cc: Chris Wilson Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.h | 4 ++ drivers/gpu/drm/i915/intel_engine_cs.c | 2 + d

[Intel-gfx] [PATCH v2 5/6] drm/i915: Watchdog timeout: Include threshold value in error state

From: Michel Thierry Save the watchdog threshold (in us) as part of the engine state. v2: Only do it for gen8+ (and prevent a missing-case warn). v3: use ctx->__engine. v4: Rebase. v5: Rebase. Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Car

[Intel-gfx] [PATCH v2 4/6] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

o Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 50 +- drivers/gpu/drm/i915/i915_gem_context.c | 91 + include/uapi/drm/i915_drm.h | 1 + 3 files changed, 141 insertions(+), 1 deletion(-) diff --

[Intel-gfx] [PATCH v2 0/6] Gen8+ GPU Watchdog Reset Support

This is a rebased on the original patch series from Michel Thierry that can be found here: https://patchwork.freedesktop.org/series/21868 Note that this series is only limited to the GPU Watchdog timeout for execlists as it leaves out support for GuC based submission for a later time. PATCH v2

[Intel-gfx] [PATCH v2 6/6] drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?

the hang by itself later on (I'm inclined to this). But the other option is to blindly trust the HW, which is what this patch does... v1: Rebase. CC: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/intel_hangcheck.c | 3

[Intel-gfx] [PATCH v2 1/6] drm/i915: Add engine reset count in get-reset-stats ioctl

: Keep rejecting attempts to use pad as input (Antonio) v4: Rebased. v5: Rebased. Cc: Chris Wilson Cc: Mika Kuoppala Cc: Antonio Argenziano Cc: Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- include

[Intel-gfx] [PATCH v2 2/6] drm/i915: Watchdog timeout: IRQ handler for gen8+

nziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++ drivers/gpu/drm/i915/i915_irq.c | 12 +++- drivers/gpu/drm/i915/i915_reg.h | 6 ++ drivers/gp

Re: [Intel-gfx] drm/i915: Only process VCS2 only when supported

On Mon, 2019-01-07 at 12:40 +, Tvrtko Ursulin wrote: > On 05/01/2019 02:39, Carlos Santa wrote: > > Not checking for BSD2 causes a segfault on GPU revs > > with no h/w support for the extra media engines. > > > > Segfault on ULX GT2 (0x591e) follows: > > &

Re: [Intel-gfx] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Mon, 2019-01-07 at 11:58 +, Tvrtko Ursulin wrote: [snip] > > > > > > static void gen8_gt_irq_ack(struct drm_i915_private *i915, > > @@ -3329,7 +3332,7 @@ void i915_handle_error(struct > > drm_i915_private *dev_priv, > > if (intel_has_reset_engine(dev_priv) && > >

Re: [Intel-gfx] drm/i915: Watchdog timeout: IRQ handler for gen8+

On Mon, 2019-01-07 at 16:58 +, Tvrtko Ursulin wrote: > On 07/01/2019 13:57, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-01-07 13:43:29) > > > > > > On 07/01/2019 11:58, Tvrtko Ursulin wrote: > > > > > > [snip] > > > > > > > > Note about future interaction with preemption:

Re: [Intel-gfx] drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands

On Mon, 2019-01-07 at 12:50 +, Tvrtko Ursulin wrote: > On 05/01/2019 02:40, Carlos Santa wrote: > > From: Michel Thierry > > > > On command streams that could potentially hang the GPU after a last > > flush command, it's best not to cancel the watchdog > &

[Intel-gfx] drm/i915: Only process VCS2 only when supported

: 02c0 [ 468.628088] ---[ end trace a7a497ddeb44bcf8 ]--- Tested-by: Carlos Santa Cc: Tvrtko Ursulin Cc: Antonio Argenziano Cc: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[Intel-gfx] drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset?

the hang by itself later on (I'm inclined to this). But the other option is to blindly trust the HW, which is what this patch does... CC: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/intel_hangcheck.c | 3 ++- 1 file

[Intel-gfx] drm/i915: Watchdog timeout: Include threshold value in error state

From: Michel Thierry Save the watchdog threshold (in us) as part of the engine state. v2: Only do it for gen8+ (and prevent a missing-case warn). v3: use ctx->__engine. v4: Rebase. Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Sa

[Intel-gfx] drm/i915: Watchdog timeout: IRQ handler for gen8+

execlists struct). v10: Rebase. Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++ drivers/gpu/drm/i915/i915_irq.c | 14 +++- drivers/gpu/drm/i915/i915_reg.h | 6 ++ drive

[Intel-gfx] drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+

cmd size in emit_stop_watchdog. (Chris) v4: Rebase. v5: use to_intel_context instead of ctx->engine. v6: Rebase. Cc: Chris Wilson Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.h | 4 ++ drivers/g

[Intel-gfx] drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands

From: Michel Thierry On command streams that could potentially hang the GPU after a last flush command, it's best not to cancel the watchdog until after all commands have executed. Patch shared by Michel Thierry through IIRC after reproduction on my local setup. Tested-by: Carlos Santa CC

[Intel-gfx] drm/i915: Add engine reset count in get-reset-stats ioctl

: Keep rejecting attempts to use pad as input (Antonio) v4: Rebased. Cc: Chris Wilson Cc: Mika Kuoppala Cc: Antonio Argenziano Cc: Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- include/uapi/drm

[Intel-gfx] Gen8+ engine-reset

/pull/429/files The testbed used on this series included a SKL-based NUC with 2 BSD rings as well as a KBL-based Chromebook with a 1 BSD ring. Carlos Santa (1): drm/i915: Only process VCS2 only when supported Michel Thierry (7): drm/i915: Add engine reset count in get-reset-stats ioctl

[Intel-gfx] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

API to use engine class while keeping thresholds per engine class (Michel). Cc: Antonio Argenziano Cc: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 56 +++ drivers/gp

Re: [Intel-gfx] [PATCH 4/8] drm/i915/huc: Add debugfs for HuC loading status check

Tested with HuC version 1.07.1398 on SKL. Reviewed-by: Carlos Santa <carlos.sa...@intel.com> Tested-by: Carlos Santa <carlos.sa...@intel.com> On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine <peter.anto...@intel.com> > > Add debugfs e

Re: [Intel-gfx] [PATCH 5/8] drm/i915/huc: Support HuC authentication

On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine > > The HuC authentication is done by host2guc call. The HuC RSA keys > are sent to GuC for authentication. > > v2: rebased on top of drm-intel-nightly. > changed name format and upped

Re: [Intel-gfx] [PATCH 5/8] drm/i915/huc: Support HuC authentication

On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine > > The HuC authentication is done by host2guc call. The HuC RSA keys > are sent to GuC for authentication. > > v2: rebased on top of drm-intel-nightly. > changed name format and upped

Re: [Intel-gfx] [PATCH 4/8] drm/i915/huc: Add debugfs for HuC loading status check

Tested with HuC version 1.07.1398 on SKL. Reviewed-by: Carlos Santa <carlos.sa...@intel.com> Tested-by: Carlos Santa <carlos.sa...@intel.com> On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine <peter.anto...@intel.com> > > Add debugfs e

Re: [Intel-gfx] [PATCH 2/8] drm/i915/huc: Unified css_header struct for GuC and HuC

On Mon, 2016-10-03 at 11:42 -0700, Anusha Srivatsa wrote: > From: Peter Antoine > > HuC firmware css header has almost exactly same definition as GuC > firmware except for the sw_version. Also, add a new member fw_type > into intel_uc_fw to indicate what kind of fw it

Re: [Intel-gfx] [PATCH 3/8] drm/i915/huc: Add HuC fw loading support

On Thu, 2016-10-13 at 13:54 -0700, Jeff McGee wrote: > On Thu, Oct 13, 2016 at 10:42:42AM -0700, Jeff McGee wrote: > > > > On Mon, Oct 03, 2016 at 11:42:57AM -0700, Anusha Srivatsa wrote: > > > > > > From: Peter Antoine > > > > > > The HuC loading process is similar to

Re: [Intel-gfx] [PATCH v2] drm/i915/bxt: Broxton decoupled MMIO

;  i915_reg_t reg, unsigned int op); > > > > @@ -2854,6 +2864,7 @@ struct drm_i915_cmd_table { > > > >   #define GT_FREQUENCY_MULTIPLIER 50 > > > >   #define GEN9_FREQ_SCALER 3 > > > >   +#define HAS_DECOUPLED_MMIO(dev_priv) (IS

Re: [Intel-gfx] [PATCH 01/10] drm: Move a few macros away from drm_crtc.h

fb = list_next_entry(fb, head)) >  #endif > diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h > index 011f199d3bcf..986ed6ff635a 100644 > --- a/include/drm/drm_modes.h > +++ b/include/drm/drm_modes.h > @@ -403,6 +403,8 @@ struct drm_display_mode { >   enum hd

[Intel-gfx] [PATCH v2] x86, build: Set -fno-pic for 32/64-bit kernels

Now that 64-bit build configurations are common in both kernel and user space, let's make the -fno-pic compiler flag common for both 32 and 64 bit kernels. Avoid build breakages on build systems enabling -fpic by default (i.e., Android). Signed-off-by: Carlos Santa <carlos.sa...@intel.

Re: [Intel-gfx] [PATCH] x86, build: Set -fno-pic for 32/64-bit kernels

On Fri, 2016-08-19 at 16:23 -0700, Carlos Santa wrote: > Make the -fno-pic compiler flag common for both 32 and 64 bit kernels. > The GCC toolchain in Android still enables -fpic by default > causing the build to break. > > Signed-off-by: Carlos Santa <carlos.sa...@intel.c

[Intel-gfx] [PATCH] x86, build: Set -fno-pic for 32/64-bit kernels

Make the -fno-pic compiler flag common for both 32 and 64 bit kernels. The GCC toolchain in Android still enables -fpic by default causing the build to break. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- arch/x86/Makefile | 8 1 file changed, 4 insertions(+), 4 del

[Intel-gfx] [PATCH v4 19/22] drm/i915: Move HAS_L3_DPF definition to platform definition

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrig

[Intel-gfx] [PATCH v4 15/22] drm/i915: Introduce GEN3_FEATURES for device info

ed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 42 ++--- 1 file changed, 18 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/dr

[Intel-gfx] [PATCH v4 21/22] drm/i915: Make HWS_NEEDS_PHYSICAL the exception

Make the .hws_needs_physical the exception by switching the flag on earlier platforms since they are fewer to support. Remove the flag on later GPUs hardware since they all use GTT hws by default. Switch the logic as well in the driver to reflect this change Signed-off-by: Carlos Santa

[Intel-gfx] [PATCH v4 14/22] drm/i915: Introduce GEN4_FEATURES for device info

Introducing a GEN4_FEATURES macro to simplify the struct definitions by platforms given that most of the features are common. Inspired by the GEN7_FEATURES macro done by Ben W. and others. Use it for i965g, i965gm, g45 and gm45. CC: Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Carlos

[Intel-gfx] [PATCH v4 13/22] drm/i915: Move HAS_GMBUS_IRQ definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 09/22] drm/i915: Move HAS_RC6 definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 04/22] drm/i915: Move HAS_RUNTIME_PM definition to platform

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 12/22] drm/i915: Introduce GEN5_FEATURES for device info

Introducing a GEN5_FEATURES macro to simplify the struct definitions by platforms given that most of the features are common. Inspired by the GEN7_FEATURES macro done by Ben W. and others. Use it for ilk. CC: Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Carlos Santa <carlos.sa...@

[Intel-gfx] [PATCH v4 01/22] drm/i915: Move HAS_PSR definition to platform struct definition

[patch series] Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definition Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 18/22] drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrig

[Intel-gfx] [PATCH v4 02/22] drm/i915: Remove .is_mobile field from platform struct

As recommended by Ville Syrjala removing .is_mobile field from the platform struct definition for vlv and hsw+ GPUs as there's no need to make the distinction in later hardware anymore. Keep it for older GPUs as it is still needed for ilk-ivb. Signed-off-by: Carlos Santa <carlos.sa...@intel.

[Intel-gfx] [PATCH v4 16/22] drm/i915: Introduce GEN2_FEATURES for device info

Introducing a GEN2_FEATURES macro to simplify the struct definitions by platforms given that most of the features are common. Inspired by the GEN7_FEATURES macro done by Ben W. and others. Use it for 830, 845g, i85x, i865g. CC: Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Carlos

[Intel-gfx] [PATCH v4 07/22] drm/i915 Move HAS_CSR definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 10/22] drm/i915: Move HAS_RC6p definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drive

[Intel-gfx] [PATCH v4 06/22] drm/i915: Get rid of HAS_CORE_RING_FREQ

No need for HAS_CORE_RING_FREQ as that flag is actually the same as .has_llc. Feedback from V. Syrjala. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 4 2 files changed, 1 insertion(+), 5 del

[Intel-gfx] [PATCH v4 22/22] drm/i915: Move HAS_GUC definition to platform definition

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platform - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrig

[Intel-gfx] [PATCH v4 05/22] drm/i915: Remove runtime PM for SNB

Remove runtime PM support for SNB as it breaks hotplug support. Feedback from V. Syrjala. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v4 03/22] drm/i915: Introduce GEN6_FEATURES for device info

Introducing a GEN6_FEAUTRES macro to simplify the struct definitions by platforms given that most of the features are common. Inspired by the GEN7_FEATURES macro done by Ben W. and others. Use it for snb. CC: Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Carlos Santa <carlos.sa...@

[Intel-gfx] [PATCH v4 20/22] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrig

[Intel-gfx] [PATCH v4 17/22] drm/i915: Move HAS_HW_CONTEXTS definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Reviewed-by: Rodrig

[Intel-gfx] [PATCH v4 00/22] drm/i915: Organize most GPU features by platform

* Split removal of runtime PM for SNB into a separate patch in case it needs to be reverted - drm/i915: Remove runtime PM for SNB * Fix the way HAS_LLC() was getting invoked - Get rid of HAS_CORE_RING_FREQ Carlos Santa (22): drm/i915: Move HAS_PSR definition

[Intel-gfx] [PATCH v4 11/22] drm/i915: Move HAS_DP_MST definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v4 08/22] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

Re: [Intel-gfx] [PATCH 03/23] drm/i915: Move HAS_RUNTIME_PM definition to platform

On Tue, 2016-08-09 at 16:49 +0300, Ville Syrjälä wrote: > On Thu, Jul 21, 2016 at 04:34:28PM +0300, Imre Deak wrote: > > On ke, 2016-07-20 at 13:25 -0700, Rodrigo Vivi wrote: > > > On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa wrote: > > > > Moving all GPU f

[Intel-gfx] [PATCH v3 09/21] drm/i915: Move HAS_RC6p definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drive

[Intel-gfx] [PATCH v3 17/21] drm/i915: Move HAS_LOGICAL_RING_CONTEXTS definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH v3 16/21] drm/i915: Move HAS_HW_CONTEXTS definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH v3 04/21] drm/i915: Move HAS_RUNTIME_PM definition to platform

hotplug support. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/i915_pci.c | 6 +- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v3 00/21] drm/i915: Organize most GPU features by platform

No need for this flag anymore as this flag == .has_llc. - Patch 20: "drm/i915: Make HWS_NEEDS_PHYSICAL the exception" - .hws_needs_physical should the exception, invert the logic so now older GPU h/w enables that since they are fewer to support. Remove support of .need_gfx_hws fo

[Intel-gfx] [PATCH v3 13/21] drm/i915: Introduce GEN4_FEATURES for device info

Based on the GEN7_FEATURES changes from Ben W. Use it for i965g, i965gm, g45 and gm45. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 36 ++-- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drive

[Intel-gfx] [PATCH v3 10/21] drm/i915: Move HAS_DP_MST definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drive

[Intel-gfx] [PATCH v3 11/21] drm/i915: Introduce GEN5_FEATURES for device info

Based on the GEN7_FEATURES changes from Ben w. Use it for ilk. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 21 ++--- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/g

[Intel-gfx] [PATCH v3 14/21] drm/i915: Introduce GEN3_FEATURES for device info

Based on the GEN7_FEATURES from Ben W. Use it for i915g, i915gm, i945g, i945gm, g33 and pnv. Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 30 ++ 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/drive

[Intel-gfx] [PATCH v3 21/21] drm/i915: Move HAS_GUC definition to platform definition

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platform - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH v3 02/21] drm/i915: Remove .is_mobile field from platform struct

As recommended by Ville Syrjala removing .is_mobile field from the platform struct definition for vlv and hsw+ GPUs as there's no need to make the distinction in later hardware anymore. Keep it for older GPUs as it is still needed for ilk-ivb. Signed-off-by: Carlos Santa <carlos.sa...@intel.

[Intel-gfx] [PATCH v3 19/21] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH v3 18/21] drm/i915: Move HAS_L3_DPF definition to platform definition

Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH v3 01/21] drm/i915: Move HAS_PSR definition to platform struct definition

[patch series] Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definition Signed-off-by: Carlos Santa <carlos.sa...@intel.com> Re

[Intel-gfx] [PATCH v3 20/21] drm/i915: Make HWS_NEEDS_PHYSICAL the exception

Make the .hws_needs_physical the exception by switching the flag on earlier platforms since they are fewer to support. Remove the flag on later GPUs hardware since they all use GTT hws by default. Switch the logic as well in the driver to reflect this change. Signed-off-by: Carlos Santa

[Intel-gfx] [PATCH v3 08/21] drm/i915: Move HAS_RC6 definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drive

[Intel-gfx] [PATCH v3 07/21] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.sa...@intel.com> --- drive

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