Re: [Intel-gfx] [PATCH i-g-t v3] lib/igt_kms: Force outputs to use full range RGB

On Tue, 2017-05-09 at 13:22 +0300, Mika Kahola wrote: > On Tue, 2017-04-18 at 16:04 +0300, Ander Conselvan de Oliveira wrote: > > In at least SKL and GLK (possibly other devices too), using a cursor > > plane to scan out an fb might result in a different pipe crc than > > when > > using a regular

Re: [Intel-gfx] [PATCH v2 4/5] drm/i915/glk: Program pipe gamma and degamma tables

On Thu, 2017-01-26 at 16:21 +0200, Ville Syrjälä wrote: > On Thu, Jan 26, 2017 at 01:24:24PM +0200, Ander Conselvan de Oliveira wrote: > > The gamma tables in Geminilake were changed. There is no split-gamma > > mode. Instead, there is a dedicated degamma table that is enabled > > whenever pipe

Re: [Intel-gfx] [PATCH] drm/i915: Use IS_GEN9 and IS_LP to put Skylake and Kabylake in the same bucket.

On Fri, 2017-01-20 at 08:22 -0800, Rodrigo Vivi wrote: > On Thu, Jan 19, 2017 at 10:56 PM, Jani Nikula wrote: > > > > On Fri, 20 Jan 2017, Anusha Srivatsa wrote: > > > > > > With GLK was introduced IS_LP. > > > With this, we can use IS_GEN9 and

Re: [Intel-gfx] [PATCH] drm/i915: Initialize num_scalers for skl and glk too

On Tue, 2017-01-03 at 15:35 +0200, Ville Syrjälä wrote: > On Mon, Jan 02, 2017 at 03:54:41PM +0200, Ander Conselvan de Oliveira wrote: > > > > After commit 1c74eeaf16b8 ("drm/i915: Move number of scalers initialization > > to > > runtime init"), scalers are not initialized properly for skl and

Re: [Intel-gfx] [PATCH 7/7] drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.c

On Fri, 2016-12-30 at 20:04 +0100, Daniel Vetter wrote: > On Thu, Dec 29, 2016 at 05:22:13PM +0200, Ander Conselvan de Oliveira wrote: > > > > The function intel_atomic_get_shared_dpll_state() is only called from > > intel_dpll_mgr.c and it concerns the same data structures as the other > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix intel_psr_init() kerneldoc

On Tue, 2016-11-29 at 13:48 +0200, Ander Conselvan de Oliveira wrote: > In commit c39055b072f8 ("drm/i915: Pass dev_priv to > intel_setup_outputs()"), I forgot to update the kerneldoc for > intel_psr_init() init, leading to warnings when building the > documentation: > >

Re: [Intel-gfx] [Regression report] Weekly regression report WW40

On Thu, 2016-10-06 at 13:11 +0300, Jani Nikula wrote: > On Wed, 05 Oct 2016, "Argotti, Yann" wrote: > > > > > > > > > > > > > On Mon, 03 Oct 2016, Jairo Miramontes > > > > wrote: > > > > > > > > > > This week regressions

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/3] drm/i915: Remove intel_clock_t typedef

On Thu, 2016-05-12 at 15:12 +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915: Remove intel_clock_t typedef > URL   : https://patchwork.freedesktop.org/series/6718/ > State : failure > > == Summary == > > Series 6718v1 Series without cover letter >

Re: [Intel-gfx] [PATCH v2 07/10] drm/i915: Undiplicate VLV signal level code

On Tue, 2016-04-19 at 13:37 -0700, Jim Bride wrote: > On Wed, Apr 13, 2016 at 08:47:50PM +0300, Ander Conselvan de Oliveira wrote: > > The logic for setting signal levels is used for both HDMI and DP with > > small variations. But it is similar enough to put behind a function > > called from the

Re: [Intel-gfx] [PATCHv3 2/4] drm/i915: Store the dpll config in crtc_state->shared_dpll

On Wed, 2016-04-06 at 17:23 +0530, Durgadoss R wrote: > Currently, the required shared dpll is saved in the crtc_state. > Similarly, this patch saves the dpll config values also, so that > these values (through crtc_state->shared_dpll->config.hw_state) > can be used for upfront link training. > >

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Merge ironlake_get_refclk() into its only caller

On Mon, 2016-03-14 at 15:55 +0200, Ville Syrjälä wrote: > On Mon, Mar 14, 2016 at 10:55:41AM +0200, Ander Conselvan de Oliveira wrote: > > A previous patche made ironlake_get_refclk() very simple, so merge > > it into its only caller. > > Again I'd like to keep the pch and gmch code as similar as

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code

On Mon, 2016-03-14 at 15:51 +0200, Ville Syrjälä wrote: > On Mon, Mar 14, 2016 at 10:55:40AM +0200, Ander Conselvan de Oliveira wrote: > > LVDS is not cloneable, so the check is unnecessary. Removing it makes > > the surrouding code a bit simpler. > > > > Signed-off-by: Ander Conselvan de

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for Shared pll improvements (rev4)

On Tue, 2016-03-08 at 16:01 +, Patchwork wrote: > == Series Details == > > Series: Shared pll improvements (rev4) > URL : https://patchwork.freedesktop.org/series/3850/ > State : warning > > == Summary == > > Series 3850v4 Shared pll improvements >

Re: [Intel-gfx] [PATCH 12/13] drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface

On Tue, 2016-03-08 at 12:05 +0100, Maarten Lankhorst wrote: > Op 26-02-16 om 14:54 schreef Ander Conselvan de Oliveira: > > Manage the LCPLLs used with DisplayPort, so that all the HSW/BDW DPLLs > > are managed by the shared dpll code. > > > > Signed-off-by: Ander Conselvan de Oliveira < > >

Re: [Intel-gfx] [PATCH] drm/i915: Fall back to zero vswing/preemph if the sink doesn't like the last good values

On Fri, 2015-10-30 at 18:47 +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > My Lenovo STM STDP3100 miniDP->VGA dongle doesn't seem to like it when > we try to start link training with non-zero vswing/preemphasis. So when > the initial link

Re: [Intel-gfx] [PATCH 02/15] drm/i915: Don't pass *DP around to link training functions

On Mon, 2015-10-19 at 10:15 +0530, Thulasimani, Sivakumar wrote: > > On 10/5/2015 12:31 PM, Ander Conselvan de Oliveira wrote: > > It just makes the code more confusing, so just reference intel_dp_>DP > > directly. The old behavior of not updating the value in intel_dp if link > > training fail

Re: [Intel-gfx] [PATCH 01/13] drm/i915: Eliminate usage of plane_wm_parameters from ILK-style WM code

On Thu, 2015-08-20 at 18:11 -0700, Matt Roper wrote: Just pull the info out of the plane state structure rather than staging it in an additional structure. Signed-off-by: Matt Roper matthew.d.ro...@intel.com Reviewed-by: Ander Conselvan de Oliveira conselv...@gmail.com ---

Re: [Intel-gfx] [PATCH] drm/i915: Don't check modeset state in the hw state force restore path

On Mon, 2015-06-01 at 15:41 +0300, Ander Conselvan de Oliveira wrote: Since the force restore logic will restore the CRTCs state one at a time, it is possible that the state will be inconsistent until the whole operation finishes. A call to intel_modeset_check_state() is done once it's over,

Re: [Intel-gfx] [PATCH 16/19] drm/i915: Check lane sharing between pipes B C using atomic state

On Thu, 2015-03-19 at 20:58 +, Konduru, Chandra wrote: -Original Message- From: Conselvan De Oliveira, Ander Sent: Friday, March 13, 2015 2:49 AM To: intel-gfx@lists.freedesktop.org Cc: Konduru, Chandra; Conselvan De Oliveira, Ander Subject: [PATCH 16/19] drm/i915: Check

Re: [Intel-gfx] [PATCH] drm/i915: Simplify the way BC bifurcation state consistency is kept

On Wed, 2015-03-11 at 13:35 +0200, Ander Conselvan de Oliveira wrote: Remove the global modeset resource function that would disable the bifurcation bit, and instead enable/disable it when enabling the pch transcoder. The mode set consistency check should prevent us from disabling the bit if

Re: [Intel-gfx] [PATCH] drm/i915: Simplify the way BC bifurcation state consistency is kept

On Wed, 2015-03-11 at 15:10 +0200, Ville Syrjälä wrote: On Wed, Mar 11, 2015 at 01:35:43PM +0200, Ander Conselvan de Oliveira wrote: Remove the global modeset resource function that would disable the bifurcation bit, and instead enable/disable it when enabling the pch transcoder. The mode

Re: [Intel-gfx] [PATCH 21/23] drm/i915: Convert intel_pipe_will_have_type() to using atomic state

On Wed, 2015-03-04 at 17:03 +0100, Daniel Vetter wrote: On Tue, Mar 03, 2015 at 03:22:15PM +0200, Ander Conselvan de Oliveira wrote: Pass a crtc_state to it and find whether the pipe has an encoder of a given type by looking at the drm_atomic_state the crtc_state points to. Note that is

Re: [Intel-gfx] [PATCH 11/23] drm/i915: Copy the staged connector config to the legacy atomic state

On Wed, 2015-03-04 at 16:46 +0100, Daniel Vetter wrote: On Tue, Mar 03, 2015 at 03:22:05PM +0200, Ander Conselvan de Oliveira wrote: With this in place, we can start converting pieces of the modeset code to look at the connector atomic state instead of the staged config. Signed-off-by: