The datasheet specifies that programming the base_unit part of the
ctrl register to 0 results in a contineous low signal.
Adjust the get_state method to reflect this by setting pwm_state.period
to 1 and duty_cycle to 0.
Suggested-by: Uwe Kleine-König
Signed-off-by: Hans de Goede
---
Changes
it again on re-enable.
Acked-by: Uwe Kleine-König
Signed-off-by: Hans de Goede
---
Changes in v3:
- Remove paragraph about tri-stating the output from the commit message,
we don't have a datasheet so this was just an unfounded guess
---
drivers/pwm/pwm-crc.c | 4
1 file changed, 4
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
Changes in v3:
- Introduce crc_pwm_calc_clk_div() here instead of later in the patch-set
to reduce the amount of churn in the patch-set a bit
---
drivers/pwm/pwm-crc.c | 17 ++---
1 file changed, 14
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Acked-by: Rafael J. Wysocki
Signed-off-by: Hans de Goede
---
wm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko
Acked-by: Uwe Kleine-König
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
drivers/pwm/pwm-lpss.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Hi All,
Here is v4 of my patch series converting the i915 driver's code for
controlling the panel's backlight with an external PWM controller to
use the atomic PWM API. See below for the changelog.
Initially the plan was for this series to consist of 2 parts:
1. convert the pwm-crc driver to
_ONCE flag and setting that for the CHT PWM controllers.
Acked-by: Rafael J. Wysocki
Signed-off-by: Hans de Goede
---
Changes in v2:
- Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX
---
drivers/acpi/acpi_lpss.c | 21 +
1 file changed, 17 insertions(+), 4
- 1).
Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Signed-off-by: Hans de Goede
---
Changes in v3:
- Change upper limit of clamp to (base_unit_range - 1)
- Add Fixes tag
---
drivers/pwm/pwm-lpss.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Use NSEC_PER_USEC instead of adding a new (non-sensical) NSEC_PER_MHZ define
---
drivers/pwm/pwm-crc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
of duplicating this inside the resume
handler, this commit makes the resume handler use pwm_lpss_apply() to
restore the settings when necessary. This fixes the output-freq and
duty-cycle being reset to their defaults on resume.
Signed-off-by: Hans de Goede
---
Changes in v3:
- This replaces
Hi,
On 7/8/20 6:58 PM, Patchwork wrote:
== Series Details ==
Series: drm: Add privacy-screen class and connector properties
URL : https://patchwork.freedesktop.org/series/79259/
State : failure
== Summary ==
Applying: drm/connector: Fix kerneldoc warning
Using index info to reconstruct a
der operations.
Since no GPU poking is involved having this as a separate step of the
commit process actually is the logical thing to do.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++
drivers/
de Goede
---
drivers/platform/x86/Kconfig | 1 +
drivers/platform/x86/thinkpad_acpi.c | 76 +++-
2 files changed, 52 insertions(+), 25 deletions(-)
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 318e083f38b3..db427ab86292 100644
Hi All,
Here is the privacy-screen related code which we discussed a while ago.
This series consists of a number of different parts:
1. A new version of Rajat's privacy-screen connector properties patch,
this adds new userspace API in the form of new properties
2. Since on most devices the
Fix the following kerneldoc warning:
drivers/gpu/drm/drm_connector.c:2189:
warning: missing initial short description on line
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_connector.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c
Add support for privacy-screen consumers to register a notifier to
be notified of external (e.g. done by the hw itself on a hotkey press)
state changes.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_privacy_screen.c | 67 +++
include/drm
Get the privacy-screen / lcdshadow ACPI handles once and cache them,
instead of retrieving them every time we need them.
Signed-off-by: Hans de Goede
---
drivers/platform/x86/thinkpad_acpi.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/platform
.
+ *
+ * Authors:
+ * Hans de Goede
+ */
+
+#include
+#include
+
+static struct drm_privacy_screen_lookup arch_lookup;
+
+struct arch_init_data {
+ struct drm_privacy_screen_lookup lookup;
+ bool (*detect)(void);
+};
+
+static acpi_status __init acpi_set_handle(acpi_handle handle, u32
status.
2. drm_connector_update_privacy_screen(), Check if the passed in atomic
state contains a privacy-screen sw_state change for the connector and if
it does, call drm_privacy_screen_set_sw_state() with the new sw_state.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_connector.c | 113
the driver for these
other devices to register themselves as a privacy-screen provider; and
allowing the drm/kms code to get a privacy-screen provider associated
with a specific GPU/connector combo.
Signed-off-by: Hans de Goede
---
Documentation/gpu/drm-kms-helpers.rst | 15 +
MAINTAINERS
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties, "privacy-screen sw-state" and
"privacy-screen hw-state", to deal with device
Hi,
On 7/7/20 9:09 PM, Uwe Kleine-König wrote:
Hello Hans,
On Tue, Jul 07, 2020 at 07:31:29PM +0200, Hans de Goede wrote:
On 7/7/20 9:34 AM, Uwe Kleine-König wrote:
On Mon, Jul 06, 2020 at 10:53:08PM +0200, Hans de Goede wrote:
But if we do then I think closest to the truth would
Hi Uwe,
On 7/7/20 9:50 AM, Uwe Kleine-König wrote:
Hello Hans,
On Sat, Jun 20, 2020 at 02:17:58PM +0200, Hans de Goede wrote:
Now that the PWM drivers which we use have been converted to the atomic
PWM API, we can move the i915 panel code over to using the atomic PWM API.
Note
Hi,
On 7/7/20 9:34 AM, Uwe Kleine-König wrote:
On Mon, Jul 06, 2020 at 10:53:08PM +0200, Hans de Goede wrote:
Hi,
Thank you for your review and sorry for the slow reply.
No problem for me, I didn't hold my breath :-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index
Hi,
On 7/7/20 9:34 AM, Uwe Kleine-König wrote:
On Mon, Jul 06, 2020 at 10:53:08PM +0200, Hans de Goede wrote:
Hi,
Thank you for your review and sorry for the slow reply.
No problem for me, I didn't hold my breath :-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index
Hi,
On 6/22/20 9:57 AM, Uwe Kleine-König wrote:
On Sat, Jun 20, 2020 at 02:17:54PM +0200, Hans de Goede wrote:
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Reviewed-by: Andy Shevchenko
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add
Hi,
On 6/22/20 9:55 AM, Uwe Kleine-König wrote:
Hello,
[adding Shobhit Kumar to Cc who is the author
of this driver according to the comment on the top of the driver]
On Sat, Jun 20, 2020 at 02:17:52PM +0200, Hans de Goede wrote:
The pwm-crc code is using 2 different enable bits:
1. bit 7
Hi,
On 6/30/20 3:51 PM, Jani Nikula wrote:
On Sat, 20 Jun 2020, Hans de Goede wrote:
Hi All,
Here is v3 of my patch series converting the i915 driver's code for
controlling the panel's backlight with an external PWM controller to
use the atomic PWM API. See below for the changelog
Hi,
Thank you for your review and sorry for the slow reply.
I would like to get this series upstream this cycle, so
I will do my best to be a lot faster with responding from
now on.
On 6/22/20 9:35 AM, Uwe Kleine-König wrote:
On Sat, Jun 20, 2020 at 02:17:47PM +0200, Hans de Goede wrote
Hi,
On 3/12/20 7:56 PM, Rajat Jain wrote:
Add support for an ACPI based integrated privacy screen that is
available on some systems.
Signed-off-by: Rajat Jain
So as discussed a while ago I'm working on adding support for the
privacy-screen on Lenovo Thinkpads, introducing a small new
- 1).
Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Signed-off-by: Hans de Goede
---
Changes in v3:
- Change upper limit of clamp to (base_unit_range - 1)
- Add Fixes tag
---
drivers/pwm/pwm-lpss.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Reviewed-by: Andy Shevchenko
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add Andy's Reviewed-by tag
- Remove extra whitespace to align some code after assignments (requested by
Uwe Kleine-König
it again on re-enable.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Remove paragraph about tri-stating the output from the commit message,
we don't have a datasheet so this was just an unfounded guess
---
drivers/pwm/pwm-crc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
Changes in v3:
- Introduce crc_pwm_calc_clk_div() here instead of later in the patch-set
to reduce the amount of churn in the patch-set a bit
---
drivers/pwm/pwm-crc.c | 17 ++---
1 file changed, 14
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX
---
drivers/acpi/acpi_lpss.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/dr
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
of duplicating this inside the resume
handler, this commit makes the resume handler use pwm_lpss_apply() to
restore the settings when necessary. This fixes the output-freq and
duty-cycle being reset to their defaults on resume.
Signed-off-by: Hans de Goede
---
Changes in v3:
- This replaces
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Use NSEC_PER_USEC instead of adding a new (non-sensical) NSEC_PER_MHZ define
---
drivers/pwm/pwm-crc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Keep crc_pwm_calc_clk_div() helper to avoid needless churn
---
drivers/pwm/pwm-crc.c | 89 ++-
1 file
wm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
drivers/pwm/pwm-lpss.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 44ec7d5b63e1..81232da0c767 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -82,14
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
Hi All,
Here is v3 of my patch series converting the i915 driver's code for
controlling the panel's backlight with an external PWM controller to
use the atomic PWM API. See below for the changelog.
Initially the plan was for this series to consist of 2 parts:
1. convert the pwm-crc driver to
Hi,
On 6/11/20 11:21 PM, Uwe Kleine-König wrote:
Hello,
On Mon, Jun 08, 2020 at 04:35:00PM +0200, Daniel Vetter wrote:
On Sat, Jun 06, 2020 at 10:25:45PM +0200, Hans de Goede wrote:
Hi All,
This patch series converts the i915 driver's cpde for controlling the
panel's backlight
Hi,
On 6/11/20 11:37 PM, Uwe Kleine-König wrote:
Hello,
On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote:
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29
Hi,
On 6/12/20 12:20 AM, Uwe Kleine-König wrote:
On Sun, Jun 07, 2020 at 08:18:34PM +0200, Hans de Goede wrote:
The pwm-crc code is using 2 different enable bits:
1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
2. bit 0 of the BACKLIGHT_EN register
So far we've kept the PWM_OUTPUT_ENABLE
Hi,
On 6/9/20 1:29 PM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:31PM +0200, Hans de Goede wrote:
While looking into adding atomic-pwm support to the pwm-crc driver I
noticed something odd, there is a PWM_BASE_CLK define of 6 MHz and
there is a clock-divider which divides
Hi,
On 6/9/20 1:32 PM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:35PM +0200, Hans de Goede wrote:
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
...
-static int crc_pwm_calc_clk_div(int period_ns)
+static int crc_pwm_apply
Hi,
On 6/8/20 2:51 PM, Andy Shevchenko wrote:
On Mon, Jun 08, 2020 at 01:07:12PM +0200, Hans de Goede wrote:
On 6/8/20 5:50 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations
Hi,
On 6/8/20 5:55 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:29PM +0200, Hans de Goede wrote:
According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM
Hi,
On 6/8/20 5:50 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
But according to the data-sheet the way
it again on re-enable.
This should disable the internal (divided) PWM clock and tri-state the
PWM output pin when disabled, saving some power.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 58c7e9ef7278
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 107 +++---
1 file changed, 59 insertions(+), 48 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 272eeb071147..43fc912c1fe9 100644
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 5ba2a65c524c..ef49a6e3c4d6 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -72,8
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 43fc912c1fe9..5ba2a65c524c 100644
--- a/drivers/pwm/pwm-crc.c
+++ b
f any bits in
the ctrl-register have actually changed and if that is the case then sets
the SW_UPDATE bit.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
Hi All,
Here is v2 dropping a debugging-patch which I accidentally kept for v1
and addressing a minor review remark from Andy for the 2nd patch.
This patch series converts the i915 driver's code for controlling the
panel's backlight with an external PWM controller to use the atomic PWM API.
in
pwm_lpss_prepare() with those in pwm_lpss_get_state().
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index cae74ce61654..a764e062103b 100644
--- a/drivers/pwm/pwm
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX
---
drivers/acpi/acpi_lpss.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/dr
ion of at least 32 steps. This limits the maximum
output frequency to 600 KHz / 780 KHz depending on the base clock.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
Hi All,
I forgot the [PATCH 0/16] part of the subject here and I accidentally
left a patch adding some debugging printk-s in the series. I will
send out a v2 addressing this.
Regards,
Hans
On 6/6/20 10:25 PM, Hans de Goede wrote:
Hi All,
This patch series converts the i915 driver's cpde
Hi,
On 6/7/20 7:03 PM, Andy Shevchenko wrote:
On Sat, Jun 06, 2020 at 10:25:47PM +0200, Hans de Goede wrote:
The DSDTs on most Cherry Trail devices have an ugly clutch where the PWM
controller gets turned off from the _PS3 method of the graphics-card dev:
Method (_PS3, 0
f any bits in
the ctrl-register have actually changed and if that is the case then sets
the SW_UPDATE bit.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 272eeb071147..43fc912c1fe9 100644
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
ion of at least 32 steps. This limits the maximum
output frequency to 600 KHz / 780 KHz depending on the base clock.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
in
pwm_lpss_prepare() with those in pwm_lpss_get_state().
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index cae74ce61654..a764e062103b 100644
--- a/drivers/pwm/pwm
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
it again on re-enable.
This should disable the internal (divided) PWM clock and tri-state the
PWM output pin when disabled, saving some power.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 58c7e9ef7278
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 67892fc0b822..26933e6b7b8c 100644
--- a/dr
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 107 +++---
1 file changed, 59 insertions(+), 48 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 5ba2a65c524c..ef49a6e3c4d6 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -72,8
Hi All,
This patch series converts the i915 driver's cpde for controlling the
panel's backlight with an external PWM controller to use the atomic PWM API.
Initially the plan was for this series to consist of 2 parts:
1. convert the pwm-crc driver to support the atomic PWM API and
2. convert the
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 43fc912c1fe9..5ba2a65c524c 100644
--- a/drivers/pwm/pwm-crc.c
+++ b
Add debug prints, test patch for moving i915 to atomic PWM.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 2cb0e2a9c08c..c1f8e6da0cd7 100644
Hi,
On 6/5/20 7:09 PM, Andy Shevchenko wrote:
On Fri, Jun 05, 2020 at 04:33:47PM +0200, Hans de Goede wrote:
On 6/2/20 5:23 PM, Andy Shevchenko wrote:
On Tue, Jun 02, 2020 at 02:21:30PM +0200, Hans de Goede wrote:
The pins on the Bay Trail SoC have separate input-buffer and output-buffer
Hi,
On 6/2/20 5:23 PM, Andy Shevchenko wrote:
On Tue, Jun 02, 2020 at 02:21:30PM +0200, Hans de Goede wrote:
The pins on the Bay Trail SoC have separate input-buffer and output-buffer
enable bits and a read of the level bit of the value register will always
return the value from the input
of that GPIO was causing the panel to reset itself
after which it would not show an image until it was turned off and back on
again (until a full modeset was done on it). This commit fixes this.
Cc: sta...@vger.kernel.org
Signed-off-by: Hans de Goede
---
Note the factoring out of the direct IRQ
Hi,
On 4/15/20 7:44 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 05:03:55PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Allows us to drop the cleanup code on the floor.
Sam noticed in his review:
With this change we avoid calling pci_disable_device()
twise
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Upcasting using a container_of macro is more typesafe, faster and
easier for the compiler to optimize.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Already using devm_drm_dev_init, so very simple replacment.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/tiny/gm12u320.c | 13
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Aside from deleting all the cleanup code we're now also setting a name
for the pool
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo
remarks
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
---
drivers/gpu/drm/vboxvideo/vbox_drv.c | 6 ++
drivers/gpu/drm/vboxvideo/vbox_main.c | 7 +--
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/vboxvideo/vbox_drv.c
b/drivers
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Straightforward conversion.
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo/vbox_drv.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
We use the baseclass pattern here, so lets to the proper (and more
typesafe) upcasting.
Acked-by: Sam Ravnborg
Acked-by: Thomas Zimmermann
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Doesn't apply to upstream kernels since a rather long time.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo/vbox_ttm.c | 12
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