Quoting Pavel Machek (2018-11-21 13:54:49)
> Hi!
>
> > > My machine locked hard (thinkpad x220). After reboot, I found this in
> > > syslog:
> > >
> > > Sounds like memory corruption..? Does not sound like easy to debug.
> >
> > Were you doing something GPU intense when you experienced the hard
that it does no longer
> have a fast path with get_user_pages_fast() this can eventually added
> back through HMM.
>
> Signed-off-by: Jérôme Glisse
> Cc: dri-de...@lists.freedesktop.org
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: Chris Wilson
> Cc: Lionel Landwerli
Hi Dave,
Here's the -fixes for 4.20-rc4. Stuck backlight/flickering
fix for DSI screen and GPU hang fix for SNB are the main
user visible ones.
Then two more fixes to prevent GPU hangs in more rare
scenarios.
Regards, Joonas
***
drm-intel-fixes-2018-11-22:
- Fix for fastboot DSI panel boot
Merged now, thanks for the patch and reviews.
Quoting Patchwork (2018-11-22 02:05:03)
> == Series Details ==
>
> Series: drm/i915: avoid rebuilding i915_gpu_error.o on version string updates
> URL : https://patchwork.freedesktop.org/series/52822/
> State : success
>
> == Summary ==
>
> = CI
Quoting Hans Holmberg (2018-11-21 13:35:19)
> On Wed, Nov 21, 2018 at 11:10 AM Joonas Lahtinen
> wrote:
> >
> > Quoting Hans Holmberg (2018-11-21 11:54:23)
> > > From: Hans Holmberg
> > >
> > > There is no need to rebuild i915_gpu_error.o when th
+ Chris
Quoting Pavel Machek (2018-11-08 19:58:03)
> Hi!
>
> My machine locked hard (thinkpad x220). After reboot, I found this in
> syslog:
>
> Sounds like memory corruption..? Does not sound like easy to debug.
Were you doing something GPU intense when you experienced the hard hang?
And if
Quoting Hans Holmberg (2018-11-21 11:54:23)
> From: Hans Holmberg
>
> There is no need to rebuild i915_gpu_error.o when the version string
> changes as the version is available in init_utsname()->release.
>
> Signed-off-by: Hans Holmberg
Seems reasonable to me.
Reviewe
ug of the above bug, I'm not
seeing other connection.
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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+ Haihaho who's been involved with gem_media_fill test, if you could
provide review, too.
Quoting Tvrtko Ursulin (2018-11-13 16:36:28)
> From: Tony Ye
>
> Simple test which exercises the VME fixed function block.
>
> v2: (Tvrtko Ursulin)
> * Small cleanups like copyright date, tabs, remove
.size = sizeof(sseu),
> + .value = to_user_pointer() };
... and this don't seem to be consitent with kernel coding
style, which I thought we try to use in IGT?
There seems to be some other strangely indented structs too,
with those fixed this is;
Reviewed-by: Joonas L
lits # blb/pnv
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1268,7 +1268,7 @@ relocate_entry(struct i915_vma *vma,
> else if (gen >= 4)
> len = 4
Thanks for the reviews, pushed now.
Regards, Joonas
Quoting Patchwork (2018-11-16 17:31:58)
> == Series Details ==
>
> Series: drm/i915: Hide enable_gvt modparam when not compiled in
> URL : https://patchwork.freedesktop.org/series/52616/
> State : success
>
> == Summary ==
>
> = CI Bug Log
Quoting Matthew Auld (2018-11-19 12:36:00)
> On Fri, 16 Nov 2018 at 13:55, Joonas Lahtinen
> wrote:
> >
> > Userspace portion is still missing.
> >
> > This reverts commit cd956bfcd0f58d20485ac0a785415f7d9327a95f.
> >
> > Cc: Lionel Landwerlin
>
no firmware yet for a platform, stop scaring the
> > consumer and merely note its expected absence.
> >
> > By simply removing the warning and early return we hit the condition
> > with the appropriate message.
> >
> > Cc: Chris Wilson
> > Cc: Joonas Lahtin
Quoting Chris Wilson (2018-10-09 14:12:59)
> If we have released no firmware yet for a platform, stop scaring the
> consumer and merely note its expected absence.
>
> Signed-off-by: Chris Wilson
> Cc: Petri Latvala
Reviewed-by: Joonas Lahtinen
nt pwrite without struct-mutex")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i915/i915_gem.c | 195
> 1 file changed, 25 insertions(+), 170 deletions(-)
>
> diff --git a/drivers/g
Hide the enable_gvt modparam in the default scenario where
support has not been compiled in.
Cc: Zhenyu Wang
Cc: Zhi Wang
Cc: Chris Wilson
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_params.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
Quoting Xu, Terrence (2018-10-19 10:04:47)
> Platform Support:
>
> -Server platforms: Intel(r) Xeon(r) E3_v4, E3_v5 and E3_v6 with Intel
> Graphics processor
>
> -Client platforms: Intel(r) Core(tm) 5th generation (code name:
> Broadwell),
> 6th generation (code name: Skylake), 7th
Userspace portion is still missing.
This reverts commit cd956bfcd0f58d20485ac0a785415f7d9327a95f.
Cc: Lionel Landwerlin
Cc: Matthew Auld
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_perf.c | 99 +++-
drivers
Userspace portion is still missing.
This reverts commit 9fa6e2f7609fdbb7d6f86be86371a5719bec0376.
Cc: Lionel Landwerlin
Cc: Matthew Auld
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_perf.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b
Quoting Lionel Landwerlin (2018-10-23 13:07:07)
> The way our hardware is designed doesn't seem to let us use the
> MI_RECORD_PERF_COUNT command without setting up a circular buffer.
>
> In the case where the user didn't request OA reports to be available
> through the i915 perf stream, we can
Cc: John Harrison
> Cc: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Daniel Vetter
Might be worthy splurting something to the dmesg?
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
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st
> > their request (and not restrict raising the minimum to privileged
> > CAP_SYS_NICE clients).
> >
> > Testcase: igt/gem_ctx_freq
> > Signed-off-by: Chris Wilson
> > Cc: Joonas Lahtinen
> > Cc: Tvrtko Ursulin
> > Cc: Praveen Paneri
>
gt; WARN_ON(val > U32_MAX);
> - fp.val = (u32)val;
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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Quoting Jani Nikula (2018-11-15 14:01:25)
> Simply return the condition. No functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
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Quoting Jani Nikula (2018-11-15 14:01:24)
> No need to use a compound statement enclosed in parenthesis where a C99
> compound literal will do. No functional changes.
>
> Signed-off-by: Jani Nikula
Out of curiosity, did this have an effect on asm generation?
Presumably not.
Reviewe
Quoting Jani Nikula (2018-11-15 14:01:23)
> While at it, conform to kernel spacing (i.e. no space) after cast. No
> functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
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Quoting Jani Nikula (2018-11-15 14:01:22)
> Reduce bloat in one of the bigger header files. Fix some indentation
> while at it. No functional changes.
>
> Signed-off-by: Jani Nikula
Do add include guards. Then this is:
Reviewed-by: Joonas Lahtinen
Reg
Hi Dave,
Most importantly we have a fix for an incorrect EU count reported
from kernel, Gen9+ scaled output fix, and avoiding OOPS on MST
display systems.
So looking pretty stable.
Regards, Joonas
PS. Had some CI turbulence for this PR as we raised the bar
so that now a loss of lockdep
Quoting Joonas Lahtinen (2018-11-12 14:49:14)
> The following patches with Fixes: do not cleanly apply
> to drm-intel-fixes:
>
> - 5a3aeca97af1 ("drm/i915: Fix hpd handling for pins with two encoders")
One more:
- e7a278a329dd ("drm/i915: Account for scale factor when
Thanks for a quick backport, applied this now.
Regards, Joonas
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The following patches with Fixes: do not cleanly apply
to drm-intel-fixes:
- 5a3aeca97af1 ("drm/i915: Fix hpd handling for pins with two encoders")
Please provide a backported patch ASAP, if they are relevant to be
backported. If they should not be included in drm-intel-fixes,
please confirm
/gvt: support inconsecutive partial gtt entry write
Joonas Lahtinen (1):
Merge tag 'gvt-fixes-2018-11-07' of https://github.com/intel/gvt-linux
into drm-intel-fixes
Longhe Zheng (1):
drm/i915/gvt: Handle values of EDP_PSR_IMR and EDP_PSR_IIR
Manasi Navare (1):
drm/i915/icl: Fix
Quoting Zhenyu Wang (2018-11-07 04:31:37)
>
> Hi,
>
> Here's re-generated -fixes pull for 4.20. Mostly on fixing
> possible guest arbitrary update of GGTT entries, with one mask
> fix for chicken register, and with one to fix eDP warning in guest.
>
> Thanks.
Pulled. Thanks for re-spinning.
Quoting Zhenyu Wang (2018-10-26 09:43:20)
> On 2018.10.25 16:07:14 +0300, Joonas Lahtinen wrote:
> > Quoting Zhenyu Wang (2018-10-23 06:46:59)
> > >
> > > Hi,
> > >
> > > Here's gvt-next-fixes for 4.20 with three changes. Mostly
> > >
> Testcase: igt/benchmarks/gem_syslatency
> Signed-off-by: Chris Wilson
> Cc: Kuo-Hsin Yang
> Cc: Matthew Auld
> Cc: Joonas Lahtinen
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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Quoting Tomasz Lis (2018-11-05 15:50:21)
> +++ b/drivers/gpu/drm/i915/intel_mocs.c
> @@ -44,6 +44,8 @@ struct drm_i915_mocs_table {
> #define LE_SCC(value) ((value) << 8)
> #define LE_PFM(value) ((value) << 11)
> #define LE_SCF(value) ((value) << 14)
> +#define
Hi Dave,
One fix to avoid applying link retraining workaround on eDP monitors
that was missing Fixes: (kindly pointed out by Jani) in addition
to the patches in previous PR.
I also got GVT PR for -next-fixes, but it had an issue with S-o-bs,
so I'll include it then in -fixes pull.
Regards,
Quoting Zhenyu Wang (2018-10-23 06:46:59)
>
> Hi,
>
> Here's gvt-next-fixes for 4.20 with three changes. Mostly
> to fix possible arbitrary update on guest GGTT entry and
> with proper invalidate of old entry. Another one for one
> chicken reg mask fix.
>
> thanks
Hi,
DIM seems to be
Quoting Jani Nikula (2018-10-23 14:56:13)
> On Mon, 01 Oct 2018, Dhinakaran Pandiyan
> wrote:
> > On Mon, 2018-10-01 at 12:49 -0700, Rodrigo Vivi wrote:
> >> On Mon, Sep 24, 2018 at 03:45:24PM -0700, Dhinakaran Pandiyan wrote:
> >> > Commit '3cf71bc9904d ("drm/i915: Re-apply "Perform link
Quoting Lis, Tomasz (2018-10-19 19:00:15)
>
>
> On 2018-10-16 12:53, Joonas Lahtinen wrote:
> > Quoting Tomasz Lis (2018-10-15 20:29:18)
> >> The patch adds support of preempt-to-idle requesting by setting a proper
> >> bit within Execlist Control Register, and
oduces a parameter which allows getting max version number
> of the MOCS entries currently supported, ie. value of 2 would mean
> only version 1 and version 2 entries are initialized and can be used
> by the user mode clients.
>
> BSpec: 34007
> Signed-off-by: Tomasz Lis
> Cc: Jo
Hi Dave,
Here are the promised MST fixes that were missing due to being
in i915 tree, yet outside i915 directory.
Further explanation in the previous PR's thread.
Regards, Joonas
***
drm-intel-next-fixes-2018-10-19:
- The missing 4 MST patches that tooling didn't pick from drm core/nouveau
Quoting Daniel Vetter (2018-10-19 10:05:32)
> On Fri, Oct 19, 2018 at 8:59 AM Joonas Lahtinen
> wrote:
> >
> > Quoting Daniel Vetter (2018-10-18 22:32:00)
> > > On Thu, Oct 18, 2018 at 6:57 PM Joonas Lahtinen
> > > wrote:
> > > >
> > > >
Quoting Daniel Vetter (2018-10-19 11:30:46)
> On Fri, Oct 19, 2018 at 11:03:53AM +0300, Jani Nikula wrote:
> > On Thu, 18 Oct 2018, Rodrigo Vivi wrote:
> > > Continuing with the goal of use less platform codenames:
> > > let's group platforms who has gen10 display.
> >
> > Ahah, so this answers
Quoting Daniel Vetter (2018-10-18 22:32:00)
> On Thu, Oct 18, 2018 at 6:57 PM Joonas Lahtinen
> wrote:
> >
> > Hi Dave,
> >
> > Here comes the final set of fixes under -next-fixes umbrella.
> > Next one will be then from -fixes, assuming a release next Sun
Hi Dave,
Here comes the final set of fixes under -next-fixes umbrella.
Next one will be then from -fixes, assuming a release next Sun.
Fixes for bunch of display related issues reported by users, then the
MST fixes that were dropped from Rodrigos PR + further Icelake fixes
and proactive
Pushed, because I need to get this cherry picked and included in PR.
Thanks for the review.
Regards, Joonas
Quoting Patchwork (2018-10-18 13:12:43)
> == Series Details ==
>
> Series: drm/i915: Drop rpm wakeref on error in debugfs/i915_drop_caches_set
> URL :
Use single exit point to drop rpm wakeref in case of an error.
Fixes: 9d3eb2c33f03 ("drm/i915: Hold rpm wakeref for
debugfs/i915_drop_caches_set")
Signed-off-by: Joonas Lahtinen
Cc: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
1 file changed, 2
erency (submissions that use CL_MEM_SVM_FINE_GRAIN_BUFFER resources)
> * don't care about coherency at GEN ISA granularity (no performance impact)
Might be worthy mentioning that this address space compatibility can be
achieved with userptr + soft-pinning allocations to their process space
addr
Quoting Jeff McGee (2018-10-13 00:46:05)
> On Fri, Oct 12, 2018 at 02:33:26PM -0700, Jeff McGee wrote:
> > On Fri, Oct 12, 2018 at 01:51:46PM -0700, Rodrigo Vivi wrote:
> > > On Fri, Oct 12, 2018 at 01:24:30PM -0700, Jeff McGee wrote:
> > > > The GuC firmware team is proposing a change to the
pt_context() change. (Daniele)
> Removed clearing HWACK flag in idle-to-idle preempt. (Daniele)
>
> v5: Renamed inject_preempt_context(). (Daniele)
> Removed duplicated GEM_BUG_ON() on HWACK (Daniele)
>
> Bspec: 18922
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
&
Quoting Chris Wilson (2018-10-05 12:21:12)
> Quoting Tvrtko Ursulin (2018-10-05 09:34:35)
> >
> > On 04/10/2018 15:32, Joonas Lahtinen wrote:
> > > Some comments below, mostly related to trying to keep the uapi header
> > > nice and tidy.
> > >
> &g
interrupted.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108133
> Fixes: 6b048706f407 ("drm/i915: Forcibly flush unwanted requests in
> drop-caches")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
Review
Some comments below, mostly related to trying to keep the uapi header
nice and tidy.
Quoting Tvrtko Ursulin (2018-10-04 14:32:48)
> @@ -1747,6 +1748,52 @@ struct drm_i915_query_topology_info {
> __u8 data[];
> };
>
> +/**
> + * struct drm_i915_engine_info
> + *
> + * Describes one
Hi Dave,
Here comes -fixes for drm-next.
One compiler warning fix and adding back a removed max stride
check, nothing end user visible.
Regards, Joonas
PS. Travelling next week, so I'll skip PR unless there's
something big.
---
drm-intel-next-fixes-2018-10-04:
Compiler warning fix and
Quoting Antonio Argenziano (2018-10-02 23:27:46)
>
>
> On 02/10/18 01:30, Joonas Lahtinen wrote:
> > Quoting Antonio Argenziano (2018-10-01 22:53:46)
> >> Fair enough.
> >>
> >> Acked-by: Antonio Argenziano
> >>
> >> for the s
Quoting Ville Syrjälä (2018-10-02 16:43:00)
> On Tue, Oct 02, 2018 at 12:56:02PM +0300, Joonas Lahtinen wrote:
> > The following patches with Fixes: do not cleanly apply
> > to drm-intel-next-fixes:
> >
> > 47658556da85 ("drm/i915/dp: Do not grab crtc mode
The following patches with Fixes: do not cleanly apply
to drm-intel-next-fixes:
47658556da85 ("drm/i915/dp: Do not grab crtc modeset lock in intel_dp_detect()")
Please provide a backported patch ASAP, if they are relevant to be
backported. If they should not be included in drm-intel-next-fixes,
Quoting Antonio Argenziano (2018-10-01 22:53:46)
> Fair enough.
>
> Acked-by: Antonio Argenziano
>
> for the series.
Please, read the following chapters (they're applicable for the patch
tag meanings in IGT, too):
Why is this mixed with display workarounds?
These were already once on the list and were decided not to be included
as there are no known users.
Regards, Joonas
Quoting Radhakrishna Sripada (2018-09-28 19:47:35)
> From: Oscar Mateo
>
> Allows UMDs to set 'Disable Gather at Set Shader Common
+ Tvrtko for adding the right media contacts
Quoting kedar.j.kara...@intel.com (2018-09-21 12:13:46)
> From: "Kedar J. Karanje"
>
> drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel
>
> Current GPU configuration code for i915 does not allow us to change
>
Quoting Chris Wilson (2018-09-27 13:35:47)
> Quoting Jani Nikula (2018-09-27 10:40:23)
> > Slightly verbose, but does away with hand rolled shifts and provides
> > static checking that the values fit the mask.
> >
> > Signed-off-by: Jani Nikula
> > ---
> > @@ -4650,11 +4650,11 @@ enum {
> >
Quoting Xiaolin Zhang (2018-09-27 19:37:48)
> It is performance optimization to reduce mmio trap numbers from 4 to
> 1 durning ELSP porting writing (context submission).
>
> When context subission, to cache elsp_data[4] values in
> the shared page, the last elsp_data[0] port writing will be
Quoting Xiaolin Zhang (2018-09-27 19:37:45)
> To improve GVTg performance, it could reduce the mmio access trap
> numbers within guest driver in some certain scenarios since mmio
> access trap will introuduce vm exit/vm enter cost.
>
> the solution in this patch set is to setup a shared memory
Quoting Xiaolin Zhang (2018-09-27 19:37:46)
> This int type module parameter is used to control the different
> level pvmmio feature for MMIO emulation in GVT.
>
> This parameter is default zero, no pvmmio feature enabled.
>
> Its permission type is 0400 which means user could only change its
>
Quoting Chris Wilson (2018-09-27 11:55:03)
> Quoting Joonas Lahtinen (2018-09-27 09:20:06)
> > Quoting Chris Wilson (2018-09-26 23:12:22)
> > > Now that we are confident in providing full-ppgtt where supported,
> > > remove the ability to override the context isolati
ext across S3/S4
drm/i915/selftests: Live tests emit requests and so require rpm
drm/i915: Park the GPU on module load
drm/i915/execlists: Onion unwind for logical_ring_init() failure
Dhinakaran Pandiyan (1):
drm/i915/psr: Enable AUX-A IO power well on ICL for PSR
Joo
.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Matthew Auld
> Reviewed-by: Joonas Lahtinen #v3
+ Jani for awareness when handling dinq, this solidifies existing uAPI
And drops the reporting of 48-bit ppGTT through this getparam as we
already have co
Quoting Chris Wilson (2018-09-26 16:13:53)
> Nobody uses the function directly, instead using the various helpers to
> determine if ppgtt is present.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
Reviewed-by: Joonas Lahtinen
Quoting Chris Wilson (2018-09-26 16:09:09)
> Remove gem.has_ppgtt as the information is no longer used.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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Quoting Chris Wilson (2018-09-26 16:09:08)
> Remove gem.has_ppgtt as the information is no longer used.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
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Quoting Joonas Lahtinen (2018-09-25 16:27:47)
> Quoting Chris Wilson (2018-09-25 14:48:20)
> > Now that we are confident in providing full-ppgtt where supported,
> > remove the ability to override the context isolation.
> >
> > v2: Remove faked aliasing-ppgtt
t; From: Wang, Zhi A
> > Sent: Wednesday, September 26, 2018 2:01 AM
> > To: Joonas Lahtinen ; Chris Wilson
> > ; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> >
> > Cc: Auld, Matthew ; He, Min
> > Subject: Re: [PATCH v4] drm/i915: Remove i915.enable_ppgtt ov
reject attempts to load the module on
> old GVT-g setups that do not provide support for full-ppgtt.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Matthew Auld
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -345,7 +345,7 @@ static int i915_getparam_ioctl(s
lation.
>
> v2: Remove faked aliasing-ppgtt for testing as it no longer is accepted.
> v3: s/USES/HAS/ to match usage and reject attempts to load the module on
> old GVT-g setups that do not provide support for full-ppgtt.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas L
Quoting Chris Wilson (2018-09-22 17:18:04)
> Now that we are confident in providing full-ppgtt where supported,
> remove the ability to override the context isolation.
>
> v2: Remove faked aliasing-ppgtt for testing as it no longer is accepted.
>
> Signed-off-by: Chris Wi
acy path; so rewrite the code to match the
> comment by using HAS_EXECLISTS() feature instead of the gen.
>
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
Reviewed-by: Joonas Lahtinen
Regards, Joonas
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Hi all,
This is the final set of changes going for kernel v4.20,
as per agreement with Dave, I did the tagging now before
-rc5, and we should run some heavy testing on this during
the beginning of next week.
Regards, Joonas
The following changes tagged drm-intel-testing-2018-09-21:
Just a reminder, if you are still planning have gvt-next PR,
tomorrow is your day :)
Regards, Joonas
Quoting Rodrigo Vivi (2018-09-18 18:53:10)
> On Tue, Sep 18, 2018 at 03:33:49PM +0800, Zhenyu Wang wrote:
> >
> > Hi,
> >
> > Here's more gvt fixes for 4.19. Two more BXT fixes from Colin,
> >
gesting 4GB region required for last object. */
Reviewed-by: Joonas Lahtinen
Regards, Joonas
> ---
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/i9
(engine->id == BCS && IS_VALLEYVIEW(engine->i915))
> + loops = 32;
> +
> + do {
> + ret = load_pd_dir(rq, ppgtt);
> + if (ret)
> +
t target)
> batch[++i] = 0;
> }
> batch[++i] = 0xc0ffee;
> - if (gen < 3)
> + if (gen <= 3)
"gen < 4" would be more consistent with the usual checks. One would
assume the evolution of the code to be that this if was added during
development o
t_offset_bias from i915_gem_context
drm/i915: Add a fault injection point to WOPCM init
Jan-Marek Glogowski (1):
drm/i915: Re-apply "Perform link quality check, unconditionally during
long pulse"
Jani Nikula (1):
drm/i915: set DP Main Stream Attribute for color range o
Quoting Rodrigo Vivi (2018-09-06 20:35:19)
> On Thu, Sep 06, 2018 at 09:46:13AM +0300, Jani Nikula wrote:
> > On Wed, 05 Sep 2018, Rodrigo Vivi wrote:
> > > On Wed, Sep 05, 2018 at 12:07:43PM +0300, Joonas Lahtinen wrote:
> > >> Was not the decision that we only
Hi all,
Disregard the previous message, and look at this tag instead :P
I'll still apply the gvt-next pull and do one more tag.
Regards, Joonas
The following changes tagged drm-intel-testing-2018-09-06-1:
drm-intel-next-2018-09-06-1:
UAPI Changes:
- GGTT coherency GETPARAM: GGTT has turned
Quoting Zhenyu Wang (2018-09-04 06:01:54)
>
> Hi,
>
> Here's initial gvt-next for 4.20 with two optimization for
> guest context shadowing and command parser, and with W=1 build fixes.
Thanks, pulled this, but it had one merge conflict (in gvt/reg.h).
Please make sure the resolution I put in
Hi all,
The following changes tagged drm-intel-testing-2018-09-06:
drm-intel-next-2018-09-06:
UAPI Changes:
- GGTT coherency GETPARAM: GGTT has turned out to be non-coherent for some
platforms, which we've failed to communicate to userspace so far. SNA was
modified to do extra flushing on
Quoting Rodrigo Vivi (2018-09-05 19:42:28)
> On Wed, Sep 05, 2018 at 12:07:43PM +0300, Joonas Lahtinen wrote:
> > Quoting Rodrigo Vivi (2018-09-04 08:27:14)
> > > On Mon, Sep 03, 2018 at 01:00:39PM +0300, Imre Deak wrote:
> > > > On Mon, Aug 27, 2018 at 05:38:44P
Quoting Michal Wajdeczko (2018-08-29 22:10:40)
> Until now the GuC and HW engine class has been the same, which allowed
> us to use them interchangeable. But it is better to start doing the
> right thing and use the GuC definitions for the firmware interface.
>
> We also keep the same class id in
Quoting Michal Wajdeczko (2018-08-29 22:10:38)
> Gen11 GuC boot parameter definitions are different than previously
> used for Gen9. Try to support both definitions until new firmwares
> for pre-Gen11 will be available.
This is exactly the kind of branching we want to avoid. Purpose of the
GuC is
Quoting Michal Wajdeczko (2018-08-29 22:10:37)
> Definition of the parameters block passed to GuC is about to change.
> Slightly refactor code now to make upcoming patch smaller.
>
> Signed-off-by: Michal Wajdeczko
> Cc: Joonas Lahtinen
> Cc: John Spotswood
Reviewed-b
n enable HuC authentication but nothing else on pre-Gen11.
>
> Signed-off-by: Michal Wajdeczko
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Daniele Ceraolo Spurio
> Cc: Michel Thierry
> Cc: John Spotswood
> Cc: Vinay Belgaumkar
> Cc: Tony Ye
> Cc: Anusha Srivatsa
> C
Quoting Michal Wajdeczko (2018-08-29 22:10:36)
> Upcoming Gen11 GuC firmware requires new interface that is incompatible
> with existing pre-Gen11 firmwares. Updated firmwares for pre-Gen11 will
> arrive later. In the meantime sanitize the enable_guc option so that we
> can enable HuC
Quoting Rodrigo Vivi (2018-09-04 08:27:14)
> On Mon, Sep 03, 2018 at 01:00:39PM +0300, Imre Deak wrote:
> > On Mon, Aug 27, 2018 at 05:38:44PM -0700, Anusha Srivatsa wrote:
> > > Add Support to load DMC on Icelake.
> > >
> > > While at it, also add support to load the firmware
> > > during system
ping
up to develop and maintain the tool. So I'll stop here until that
happens.
Regards, Joonas
> -Original Message-
> From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com]
> Sent: Wednesday, August 29, 2018 5:52 PM
> To: Intel-gfx@lists.freedesktop.org; Kukanova, Sve
y be written to, although this is supposed to be
> indicated by set-domain there are cases (e.g. after swap) where
> userspace may not be aware of the implicit domain change.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
Regards, Joonas
_
trip through hangcheck for each.
>
> It reduces the inter-test operation to just a write into drop-caches to
> reset driver/GPU state between tests.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
Intel
s obviously too large, error out early. We opt to do
> this in the backend to make it easy to use alternate paths that do not
> require the entire object pinned, or may easily handle proxy objects
> that are larger than physical memory.
>
> Signed-off-by: Chris Wilson
Reviewed
batch to use the correct offset, it no longer matches the
> presumed_offset in the relocation, so a second pass may miss any changes
> in layout.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
Regards, Joonas
___
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