Re: [Intel-gfx] [PATCH 2/4] drm/i915: Drop DRM_CONTROL_ALLOW

Quoting Daniel Vetter (2018-04-20 09:51:57) > Control nodes are no more! > > Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch> > Cc: Jani Nikula <jani.nik...@linux.intel.com> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Cc: Rodrigo Vivi <

[Intel-gfx] [PULL] drm-intel-next-fixes

Jani Nikula (1): drm/i915/bios: filter out invalid DDC pins from VBT child devices Joonas Lahtinen (1): Merge tag 'gvt-fixes-2018-04-03' of https://github.com/intel/gvt-linux into drm-intel-next-fixes Tina Zhang (1): drm/i915/gvt: Add drm_format_mod update Tvrtko Ursulin (1

Re: [Intel-gfx] [PATCH] drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

Quoting Tvrtko Ursulin (2018-04-18 12:33:42) > From: Tvrtko Ursulin > > Currently our driver assumes BSD2 means hardware engine instance number > two. This does not work for Icelake parts with two VCS engines, but which > are hardware instances 0 and 2, and not 0 and 1

Re: [Intel-gfx] [PATCH v2] drm/i915: Pack params to engine->schedule() into a struct

wed. As we need an ever growing number of parameters for > scheduling, move those into a struct for convenience. > > v2: Move the anonymous struct into its own function for legibility and > ye olde gcc. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Rev

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix error checking for wait_var_timeout

Quoting Chris Wilson (2018-04-18 12:14:15) > Quoting Joonas Lahtinen (2018-04-18 10:10:17) > > Quoting Chris Wilson (2018-04-17 20:06:38) > > > The old wait_on_atomic_t used a custom callback to perform the > > > schedule(), which used my return semantics

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Pack params to engine->schedule() into a struct

onst struct drm_i915_private *i915, > +const struct i915_sched_attr *attr) > +{ > + if (attr->priority == I915_PRIORITY_INVALID) > + return; This will yield a double space in the output. Just sayin' > + > + drm_printf(m, &q

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Rename priotree to sched

> > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> "i915_sched_node" might be a less confusing name compared to the DRM core scheduler. Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Move the priotree struct to its own headers

the request/fence tracking. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https:/

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Don't use -ETIMEDOUT from inside a test

IMEDOUT from wait_var_event_timeout() into another errno. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-g

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix error checking for wait_var_timeout

n_atomic_t() > usage to the new wait_var_event() API") > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@list

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

Quoting Jani Nikula (2018-04-17 12:02:52) > On Mon, 16 Apr 2018, "Srivatsa, Anusha" wrote: > >>-Original Message- > >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com] > >>Sent: Wednesday, April 11, 2018 5:27 AM > >>To: Ian W MORRISON

Re: [Intel-gfx] [PATCH] drm/i915: throw __must_check at GEM_WARN_ON

this > should already be the case. > > Suggested-by: Jani Nikula <jani.nik...@linux.intel.com> > Signed-off-by: Matthew Auld <matthew.a...@intel.com> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Cc: Jani Nikula <jani.nik...@linux.intel.com> >

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Documentation patch for batchbuffer submission (rev5)

Merged these (documentation only changes). Thanks for the patches! Regards, Joonas Quoting Patchwork (2018-04-06 11:29:26) > == Series Details == > > Series: Documentation patch for batchbuffer submission (rev5) > URL : https://patchwork.freedesktop.org/series/38433/ > State : failure > > ==

Re: [Intel-gfx] DRM cgroups integration (Was: Re: [PATCH v4 0/8] cgroup private data and DRM/i915 integration)

+ Some more Cc's based on IRC discussion Quoting Joonas Lahtinen (2018-04-05 16:46:51) > + Dave for commenting from DRM subsystem perspective. I strongly believe > there would be benefit from agreeing on some foundation of DRM subsystem > level program GPU niceness [-20,19] and memory l

[Intel-gfx] DRM cgroups integration (Was: Re: [PATCH v4 0/8] cgroup private data and DRM/i915 integration)

300, Joonas Lahtinen wrote: > > Quoting Matt Roper (2018-03-23 17:46:16) > > > On Fri, Mar 23, 2018 at 02:15:38PM +0200, Joonas Lahtinen wrote: > > > > Quoting Matt Roper (2018-03-17 02:08:57) > > > > > This is the fourth iteration of the work previously p

Re: [Intel-gfx] [PULL] gvt-fixes for 4.17-rc1

Quoting Zhenyu Wang (2018-04-03 10:28:35) > > Hi, > > Here's refreshed fixes for 4.17-rc1 with regression one removed, > contains a few fixes for vfio ioctl and dmabuf interface, properly > dma unmap for ggtt, etc. I don't think -Wimplicit-fallthrough will be enabled retroactively, so I'm don't

Re: [Intel-gfx] [PATCH v4 5/5] i915: add documentation to intel_engine_cs

Quoting Jani Nikula (2018-04-04 12:48:55) > On Wed, 04 Apr 2018, Joonas Lahtinen <joonas.lahti...@linux.intel.com> wrote: > > + Jani for Sphinx > > > > Quoting Rogovin, Kevin (2018-04-03 17:34:49) > >> I am somewhat tempted to just drop this patch or add mo

Re: [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

Quoting Matthew Auld (2018-04-04 13:05:23) > On 4 April 2018 at 10:13, Joonas Lahtinen > <joonas.lahti...@linux.intel.com> wrote: > > Quoting Jani Nikula (2018-03-19 22:21:31) > >> On Mon, 19 Mar 2018, Matthew Auld <matthew.william.a...@gmail.com> wrote: > &

Re: [Intel-gfx] [PATCH v4 5/5] i915: add documentation to intel_engine_cs

+ Jani for Sphinx Quoting Rogovin, Kevin (2018-04-03 17:34:49) > I am somewhat tempted to just drop this patch or add more documentation. The > function pointers are used in the code common > to the legacy way and LRC way of submitting batchbuffers to the GPU, so they > should have somekind of

Re: [Intel-gfx] [RFC v1] Data port coherency control for UMDs.

Quoting Dunajski, Bartosz (2018-03-30 12:00:51) > I think the adoption is not a problem here. Adoption is important for fulfilling the DRM subsystem requirements for merging new kernel uAPI that I referred to previously. So do we have some timeline for any distro picking up the new driver?

Re: [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

Quoting Jani Nikula (2018-03-19 22:21:31) > On Mon, 19 Mar 2018, Matthew Auld wrote: > > On 19 March 2018 at 18:17, Chris Wilson wrote: > >> Quoting Matthew Auld (2018-03-19 18:08:54) > >>> GEM_WARN_ON() was originally intended to be used

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Add basic sanitychecks for execlists

Winiarski <michal.winiar...@intel.com> > CC: Michel Thierry <michel.thie...@intel.com> > Cc: Jeff McGee <jeff.mc...@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> With the checkpatch fixed, this

Re: [Intel-gfx] [PATCH v4 5/5] i915: add documentation to intel_engine_cs

Quoting kevin.rogo...@intel.com (2018-04-03 13:52:27) > From: Kevin Rogovin > > Add documentation to a number of the function pointer fields of > intel_engine_cs. > > Signed-off-by: Kevin Rogovin > --- > drivers/gpu/drm/i915/intel_ringbuffer.h

Re: [Intel-gfx] [PATCH v4 3/5] i915.rst: add link to documentation in i915_gem_execbuffer.c

lt;kevin.rogo...@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v4 2/5] i915: add a text about what happens at bottom of stack in processing a batchbuffer

cord when the GPU > + *is done executing the batchbuffer. The memory write writes the > + * global sequence number of the request, `i915_request::global_seqno``; Double tick here. With that fixed: Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas > +

Re: [Intel-gfx] [PATCH v4 1/5] i915.rst: Narration overview on GEM + minor reorder to improve narration

still bummed by the long lines in the bulleted list, but regardless: Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas > --- > Documentation/gpu/i915.rst | 116 > > drivers/gpu/drm/i915/i915_vma.h | 1

Re: [Intel-gfx] [PATCH] drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest

+ Zhi and Zhenyu Quoting Xiong Zhang (2018-03-29 13:58:41) > Four drm_mm_node are used to reserve guest ggtt space, but some of them > may aren't initialized and used in intel_vgt_balloon(), so these unused > drm_mm_node couldn't be removed through drm_mm_remove_node(). I'm not sure how this

Re: [Intel-gfx] [RFC v1] Data port coherency control for UMDs.

hing to get rid of. Regards, Joonas > > > -Original Message- > From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com] > Sent: Wednesday, March 21, 2018 11:03 AM > To: Dunajski, Bartosz <bartosz.dunaj...@intel.com>; Lis, Tomasz > <tomasz@intel.com&g

Re: [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler

Quoting Daniele Ceraolo Spurio (2018-03-23 19:17:49) > > > On 23/03/18 05:34, Michał Winiarski wrote: > > We're seeing "RPM wakelock ref not held during HW access" warning > > otherwise. And since IRQ are synced for runtime suspend, we can use the > > variant without wakeref assert. > > > >

Re: [Intel-gfx] [PATCH 1/8] drm/i915/guc: Use _FW variants for mmio access in GuC irq handler

fst...@intel.com> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105710 > Signed-off-by: Michał Winiarski <michal.winiar...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Marta Löfstedt <marta.lofst...@intel.com> > Cc: Michal Wajd

Re: [Intel-gfx] [PATCH v4] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams

Quoting Joonas Lahtinen (2018-03-28 14:27:19) > Quoting Jackie Li (2018-03-23 01:59:22) > > GuC Address Space and WOPCM Layout diagrams won't be generated correctly by > > sphinx build if not using proper reST syntax. > > > > This patch uses reST literal blocks to

Re: [Intel-gfx] [PATCH v4] drm/i915: Use correct reST syntax for WOPCM and GuC kernel-doc diagrams

15.rst (Joonas) > > Signed-off-by: Jackie Li <yaodong...@intel.com> > Cc: Michal Wajdeczko <michal.wajdec...@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Looks good. Thanks

[Intel-gfx] [PULL] drm-intel-next-fixes

Hi Dave, Two human-reported bugs to close for display and a more rare fix that could result in GPU hang. There was some unclarity about the GVT pull, so I'm not including it here. Happy Easter holidays! Regards, Joonas drm-intel-next-fixes-2018-03-27: - Display fixes for booting with MST hub

Re: [Intel-gfx] [PULL] more gvt-next-fixes for 4.17

Quoting Joonas Lahtinen (2018-03-27 16:42:28) > Quoting Zhenyu Wang (2018-03-27 11:39:42) > > > > Hi, Joonas > > > > Here's this week's gvt-next-fixes queued for 4.17. One notable change > > is to revert previous workaround for gvt context preemption, now it &g

Re: [Intel-gfx] [PULL] more gvt-next-fixes for 4.17

Quoting Zhenyu Wang (2018-03-27 11:39:42) > > Hi, Joonas > > Here's this week's gvt-next-fixes queued for 4.17. One notable change > is to revert previous workaround for gvt context preemption, now it > has full support for preemption now. I've pulled the patches, but this revert sounds fishy.

Re: [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration

Quoting Matt Roper (2018-03-23 17:46:16) > On Fri, Mar 23, 2018 at 02:15:38PM +0200, Joonas Lahtinen wrote: > > Quoting Matt Roper (2018-03-17 02:08:57) > > > This is the fourth iteration of the work previously posted here: > > > (v1) > > > https://lists.fre

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values

Quoting Yaodong Li (2018-03-23 19:33:15) > As I said, I agree that we would likely solve the enable_guc=1 then > enable_guc=3 case with these changes which I think this the the only benefit > that we can get from the starting from the top way. > But my point is just like the from the bottom way,

Re: [Intel-gfx] [RFC] splitting dri-devel to drm core and drivers lists?

Quoting Daniel Vetter (2018-03-23 18:39:04) > On Fri, Mar 23, 2018 at 06:22:46PM +0200, Jani Nikula wrote: > > There was some discussion on the dim-tools list about splitting the > > dri-devel list to drm core and drivers lists [1]. Moving the discussion > > to the list in question seems prudent.

Re: [Intel-gfx] linux-next: manual merge of the drm-intel tree with Linus' tree

Quoting Stephen Rothwell (2018-03-23 02:50:18) > Hi all, > > On Thu, 22 Mar 2018 13:21:29 +1100 Stephen Rothwell > wrote: > > > > Today's linux-next merge of the drm-intel tree got a conflict in: > > > > drivers/gpu/drm/i915/gvt/scheduler.c > > > > between commit: > >

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add code to accept valid locked WOPCM register values

Quoting Yaodong Li (2018-03-22 23:27:59) > On 03/22/2018 01:38 PM, Michał Winiarski wrote: > > On Tue, Mar 20, 2018 at 04:18:46PM -0700, Jackie Li wrote: > >> @@ -175,30 +220,17 @@ int intel_wopcm_init(struct intel_wopcm *wopcm) > >> return -E2BIG; > >> } > >> > >> -

Re: [Intel-gfx] [RFC 0/8] Force preemption

Quoting Bloomfield, Jon (2018-03-22 21:59:33) > > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > > Of Jeff McGee > > Sent: Thursday, March 22, 2018 12:09 PM > > To: Tvrtko Ursulin > > Cc: Kondapally, Kalyan

Re: [Intel-gfx] [PATCH] drm/i915: Skip logging impossible slices

Quoting Jani Nikula (2018-03-21 14:16:37) > On Wed, 21 Mar 2018, Chris Wilson wrote: > > Quoting Jani Nikula (2018-03-21 11:47:06) > >> > >> > Quoting Chris Wilson (2018-03-21 10:41:37) > >> >> > >> >> Just idly testing the waters... > >> >> > >> >> In yaml, this

Re: [Intel-gfx] [PATCH v4 0/8] cgroup private data and DRM/i915 integration

Quoting Matt Roper (2018-03-17 02:08:57) > This is the fourth iteration of the work previously posted here: > (v1) > https://lists.freedesktop.org/archives/intel-gfx/2018-January/153156.html > (v2) > https://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg208170.html > (v3)

Re: [Intel-gfx] [PATCH igt] igt/gem_ctx_switch: Measure qlen for timing loops

o 10 minutes. Counter this by doing a warmup loop to > estimate the appropriate queue len for timing. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> #define MAGNIFICENT_FACTOR_8 (3 + 5) or maybe a comment. Reviewed-by: Joonas Lahtinen <joonas.lahti...@lin

Re: [Intel-gfx] [PATCH v3] drm/i915/guc: Fix null pointer dereference when GuC FW is not available

Michal, Can you send this with the enable_guc HAX patch to get a run in the CI with GuC. Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PULL] drm-intel-next-fixes

ill() on the first prepare_reset Colin Ian King (1): drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed" Colin Xu (1): drm/i915/gvt: Remove reduntant printing of untracked mmio Jani Nikula (1): drm/i915/icl: do not save DDI A/E sharing bit f

Re: [Intel-gfx] [PULL] gvt-next-fixes for 4.17

Quoting Zhenyu Wang (2018-03-20 04:41:08) > > Hi, Joonas > > Here's gvt-next-fixes update for 4.17. One regression that > caused guest VM gpu hang has been fixed and with other changes > as details below. Pulled, thanks. Regards, Joonas ___ Intel-gfx

Re: [Intel-gfx] [RFC v1] Data port coherency control for UMDs.

und to break. Regards, Joonas > > -Original Message- > From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com] > Sent: Monday, March 19, 2018 2:54 PM > To: Lis, Tomasz <tomasz@intel.com>; intel-gfx@lists.freedesktop.org; Dave > Airlie <airl...@r

Re: [Intel-gfx] [RFC v1] Data port coherency control for UMDs.

+ Dave, as FYI Quoting Tomasz Lis (2018-03-19 14:37:34) > The OpenCL driver develpers requested a functionality to control cache > coherency at data port level. Keeping the coherency at that level is disabled > by default due to its performance costs. OpenCL driver is planning to > enable it for

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

Quoting Joonas Lahtinen (2018-03-14 15:10:46) > Quoting Michal Wajdeczko (2018-03-14 14:47:28) > > On Wed, 14 Mar 2018 13:31:46 +0100, Joonas Lahtinen > > <joonas.lahti...@linux.intel.com> wrote: > > > > > Quoting Patchwork (2018-03-14 06:23:25) > > &g

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

Quoting Michal Wajdeczko (2018-03-14 14:47:28) > On Wed, 14 Mar 2018 13:31:46 +0100, Joonas Lahtinen > <joonas.lahti...@linux.intel.com> wrote: > > > Quoting Patchwork (2018-03-14 06:23:25) > >> == Series Details == > >> > >> Series: ser

Re: [Intel-gfx] [PATCH v13 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers

833 > > Signed-off-by: Jackie Li <yaodong...@intel.com> > Cc: Michal Wajdeczko <michal.wajdec...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Reviewed-by: Michal Wajdeczko

Re: [Intel-gfx] [PATCH v13 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0

Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: John Spotswood <john.a.spotsw...@intel.com> > Cc: Jeff McGee <jeff.mc...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Reviewe

Re: [Intel-gfx] [PATCH v13 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size

text size macro (Michal) > > v13: > - Updated the ordering of s-o-b/cc/r-b tags (Sagar) > > Bspec: 12690 > > Signed-off-by: Jackie Li <yaodong...@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: Michal Wajdeczko <michal.wajdec...@in

Re: [Intel-gfx] [PATCH v13 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

Wajdeczko <michal.wajdec...@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Reviewed-by: Sagar Arun Kamble <sagar.a.kam...@intel.com> (

Re: [Intel-gfx] [PATCH v13 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation

m> > Cc: Sujaritha Sundaresan <sujaritha.sundare...@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com> > Cc: John Spotswood <john.a.spotsw...@intel.com> > Cc: Oscar Mateo <oscar.ma...@intel.com> > Cc: Chris Wilson <ch...@c

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

Quoting Patchwork (2018-03-14 06:23:25) > == Series Details == > > Series: series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset > to intel_guc_ggtt_offset > URL : https://patchwork.freedesktop.org/series/39919/ > State : failure > > == Summary == > > Possible new issues:

Re: [Intel-gfx] [PATCH] drm/i915: drop various VLAs in i915_debugfs.c

Quoting Salvatore Mesoraca (2018-03-13 21:51:28) > Avoid 3 VLAs[1] by using real constant expressions instead of variables. > The compiler should be able to optimize the original code and avoid using > any actual VLAs. Anyway this change is useful because it will avoid a false > positives with

Re: [Intel-gfx] [PATCH v2] drm/i915: Show GEM_TRACE when detecting a failed GPU idle

e local cpu's. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas

Re: [Intel-gfx] [PATCH v12 5/6] drm/i915/guc: Check the locking status of GuC WOPCM registers

UC_WOPCM_OFFSET)); > + DRM_ERROR("GUC_WOPCM_SIZE=%#x\n", I915_READ(GUC_WOPCM_SIZE)); As this doesn't really give information what were the computed write values. But if you see this is most useful for debuggin, this is; Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel

Re: [Intel-gfx] [PATCH v12 4/6] drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0

etween "HuC FW" and "(%uKiB)" in error message (Michal) > > BSpec: 10875 > > Cc: Michal Wajdeczko <michal.wajdec...@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: John Spotswood <john.a.spotsw...@intel.com> > Cc: Jeff McGee

Re: [Intel-gfx] [PATCH v12 3/6] drm/i915: Add support to return CNL specific reserved WOPCM size

om context size macro (Michal) > > Bspec: 12690 > > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: Michal Wajdeczko <michal.wajdec...@intel.com> > Cc: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com&g

Re: [Intel-gfx] [PATCH v12 2/6] drm/i915: Implement dynamic GuC WOPCM offset and size calculation

tion, so this should not be needed. > +++ b/drivers/gpu/drm/i915/intel_wopcm.h > @@ -0,0 +1,34 @@ > +/* > + * SPDX-License-Identifier: MIT > + * > + * Copyright © 2017-2018 Intel Corporation > + */ > + > +#ifndef _INTEL_WOPCM_H_ > +#define _

Re: [Intel-gfx] [PATCH v12 1/6] drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset

break (Chris) > > v10: > - Removed unnecessary comments, redundant code and avoided reuse variable >to avoid potential issues (Joonas) > > Cc: Michal Wajdeczko <michal.wajdec...@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com> > Cc: Chris Wilson <ch

[Intel-gfx] [PULL] drm-intel-next

Fix Limited Range Color Handling Joonas Lahtinen (5): Merge drm-next into drm-intel-next-queued Merge drm-next into drm-intel-next-queued (this time for real) drm/i915: Update DRIVER_DATE to 20180305 Merge tag 'gvt-next-2018-03-08' of https://github.com/intel/gvt-linux into

Re: [Intel-gfx] [PULL] gvt-next for 4.17

> BR, > Jani. > > On Thu, 08 Mar 2018, Joonas Lahtinen <joonas.lahti...@linux.intel.com> wrote: > > Pulled. > > > > Regards, Joonas > > > > Quoting Zhenyu Wang (2018-03-08 04:31:52) > >> > >> Hi, > >> > >> Her

Re: [Intel-gfx] [PULL] gvt-next for 4.17

Pulled. Regards, Joonas Quoting Zhenyu Wang (2018-03-08 04:31:52) > > Hi, > > Here's gvt-next update for 4.17. Biggest update is for huge code > refactor of shadow ppgtt from Changbin which is the most obscured > part, and with KBL context save/restore improvement from Weinan, > with other

[Intel-gfx] Updated drm-intel-testing

Hi all, This will be the tag to become the final kernel 4.17 feature pull request. A recap of what has been brough in by this development window (much of which people were on their various vacations): * Cannonlake support is sufficient to remove alpha_support protection * AUX-F port

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Stop kicking the signaling thread on seqno wraparound

r need to spin waiting for the signaling thread to release its > references to the in-flight requests, and so we can assert that the > signaler is idle. > > References: fd10e2ce9905 ("drm/i915/breadcrumbs: Ignore unsubmitted > signalers") > Signed-off-by: Chris Wilso

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Flush waiters on seqno wraparound

rectly using the existing machinery for handling the flushing of > missed wakeups when idling. > > Suggested-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>

Re: [Intel-gfx] [PATCH 05/11] drm/i915: Allow horizontal mirroring for cnl+ "sprite" planes

well. > > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas -- Joonas Lahtinen

Re: [Intel-gfx] [PATCH v14 6/6] drm/i915: expose rcs topology through query uAPI

slice in each slice with one bit per EU telling > + * whether an EU is available. The availability of EU Z in subslice Y in > + * slice X can be queried with the following formula : > + * > + * (data[eu_offset + > + * (X * max_subslices Y) * eu_stride +

Re: [Intel-gfx] [PATCH v14 5/6] drm/i915: add query uAPI

t; +}; > + > +struct drm_i915_query { > + __u32 num_items; > + > + /* > +* Unused for now. Ditto. > +*/ > + __u32 flags; > + > + /* > +* This point to an array of num_items drm_i915_query_item structures. "points" Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Lets wait for the Mesa patch review still before merging. Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Extend partial vma coverage to check parallel creation

bal GTT, i.e. for use as a display scanout). > > > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > > Hi Joonas, you made a request for this selftest once upon a time. > -Chris &g

Re: [Intel-gfx] [PATCH 2/2] drm/i915/breadcrumbs: Assert all missed breadcrumbs were signaled

tko Ursulin <tvrtko.ursu...@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list

> References: 56299fb7d904 ("drm/i915: Signal first fence from irq handler if > complete") > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> > Cc: Joon

Re: [Intel-gfx] [PATCH igt 01/16] igt/gem_sync: Exercise and measure idle requests

For some reason, I've reviewed these from the middle of the series (maybe transport delay?). Are the rest still applicable or refreshed somewhere? Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] i915 vs checkpatch

Quoting Rodrigo Vivi (2018-03-01 20:00:07) > On Thu, Mar 01, 2018 at 06:13:31PM +0200, Jani Nikula wrote: > > > > I went through the recent checkpatch reports, and here's my take. > > > > On Thu, 01 Mar 2018, Arkadiusz Hiler wrote: > > > 2. Which of the checkpatch

[Intel-gfx] [PULL] drm-intel-next

m/i915: introduce INTEL_PCH_ID() and use it drm/i915/audio: fix check for av_enc_map overflow Joonas Lahtinen (2): drm/i915: Update DRIVER_DATE to 20180214 drm/i915: Update DRIVER_DATE to 20180221 Maarten Lankhorst (2): drm/i915: Ignore minimum lines for level 0 in skl_compute_pl

Re: [Intel-gfx] [PATCH] drm/i915: Rename drm_i915_gem_request to i915_request

> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> > Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Cc: Michał Winiarski <michal.winiar...@in

Re: [Intel-gfx] [PATCH] drm/i915/hsw: add missing disabled EUs registers reads

0; > + break; > + case HSW_F1_EU_DIS_MASK_8EUS: > + sseu->eu_per_subslice = 8; > + break; > + case HSW_F1_EU_DIS_MASK_6EUS: > + sseu->eu_per_subslice = 6; > + break; > + default: > +

[Intel-gfx] Updated drm-intel-testing

Hi all, Mostly fixes in this tag. QA/testing could emphasis on CNL hardware as we're removing the alpha_support flag for it. Regards, Joonas --- The following changes tagged drm-intel-testing-2018-02-21: drm-intel-next-2018-02-21: Driver Changes: - Lift alpha_support protection from

Re: [Intel-gfx] [PATCH igt 12/16] igt/gem_ctx_isolation: Check isolation of registers between contexts

me to nonpriv, as this is what bspec calls the > registers that are writable by userspace. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Reviewed-by: Joonas Lahti

Re: [Intel-gfx] [PATCH igt 13/16] igt/gem_ctx_switch: Do a warmup pass over all contexts

Quoting Chris Wilson (2018-02-20 10:45:17) > Ensure that we always use every context at least once before we start > running the stress-test. > > Signed-off-by: Chris Wilson > --- > tests/gem_ctx_switch.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git

Re: [Intel-gfx] [PATCH igt 10/16] igt/gem_eio: Use slow spinners to inject hangs

show_bug.cgi?id=104676 > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.fr

Re: [Intel-gfx] [PATCH igt 08/16] igt/gem_exec_schedule: Replace constant 16 with its magic macro

Quoting Chris Wilson (2018-02-20 10:45:12) > @@ -398,7 +399,7 @@ static void preempt(int fd, unsigned ring, unsigned flags) > igt_assert(gem_bo_busy(fd, spin[0]->handle)); > } > > - for (int n = 0; n < 16; n++) > + for (int n = 0; n < MAX_ELSP_QLEN; n++) >

Re: [Intel-gfx] [PATCH igt 07/16] igt/gem_exec_schedule: Trim max number of contexts used

till lower than the ~4096 previously in use) > v3: Also limit NCTX to MAX_CONTEXTS for wide-* > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Acked-by: Antonio Argenziano <antonio.argenzi...@intel.com> R-b was probably meant here instead. Anyway, this is: Rev

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_fenced_exec_thrash: Use fixed durations

; > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/2] drm/mm: Micro-optimise updating the upper layers of the interval tree

/shrink: 0/1 up/down: 0/-10 (-10) > Function old new delta > drm_mm_interval_tree_add_node221 211 -10 > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti.

Re: [Intel-gfx] [PATCH 1/2] drm/mm: Fix caching of leftmost node in the interval tree

his bug didn't have any functional effect, we could go with rb_insert_augmented and not try to cache the node if the information ends up being unused. Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH igt 4/4] lib: Remove overzealous assertion on gem_set_caching()

the library, that is the job for the ABI > tests. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Inte

Re: [Intel-gfx] [PATCH igt 3/4] igt/syncobj: Tidy ye olde compiler warnings

6:31: warning: ‘fd’ may be used uninitialized in this > function [-Wmaybe-uninitialized] > syncobj_wait.c:760:6: note: ‘fd’ was declared here > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas _

Re: [Intel-gfx] [PATCH igt 2/4] igt/gem_exec_flush: Silence old compiler warning

Quoting Chris Wilson (2018-02-19 22:12:26) > gem_exec_flush.c: In function ‘batch’: > gem_exec_flush.c:443:15: warning: ‘ptr’ may be used uninitialized in this > function [-Wmaybe-uninitialized] > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewe

Re: [Intel-gfx] [PATCH igt 1/4] lib: Always set mismatching index for igt_find_crc_mismatch

warning: 'index' may be used uninitialized in this > function [-Wmaybe-uninitialized] > > Fixes: 7422d7540a3b ("lib/igt_debugfs: Introduce CRC check function, with > logic made common") > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Jo

Re: [Intel-gfx] [PATCH igt 2/2] lib: Cache the debugfs mountpoint

on <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH igt 1/2] igt/gem_sync: Exercise and measure idle requests

Quoting Chris Wilson (2018-02-20 00:18:06) > Don't just wait for the batch to be completed, wait for the system to > idle! Then wake it up and do it again. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.

Re: [Intel-gfx] [PATCH] drm: Handle unexpected holes in color-eviction

+ DRM_MM_BUG_ON(>hole_stack == >hole_stack); > + if (unlikely(>hole_stack == >hole_stack)) Would be more readable as: if (...) { DRM_MM_BUG() } Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 1/1 RFC] drivers/gpu/drm/i915:Documentation for batchbuffer submission

These documentation improvements are much welcome, here are a few comments from me. Quoting kevin.rogo...@intel.com (2018-02-16 16:04:22) > +Intel GPU Basics > + > + > +An Intel GPU has multiple engines. There are several engine types. > + > +- RCS engine is for rendering 3D and

Re: [Intel-gfx] [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()

Quoting Jani Nikula (2018-02-19 11:34:34) > On Fri, 16 Feb 2018, Bjorn Helgaas wrote: > > On Mon, Nov 27, 2017 at 11:57:46AM -0500, Sinan Kaya wrote: > >> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as > >> where a PCI device is present. This restricts

Re: [Intel-gfx] [PATCH v13 6/6] drm/i915: expose rcs topology through query uAPI

Quoting Lionel Landwerlin (2018-02-15 14:02:02) > With the introduction of asymmetric slices in CNL, we cannot rely on > the previous SUBSLICE_MASK getparam to tell userspace what subslices > are available. Here we introduce a more detailed way of querying the > Gen's GPU topology that doesn't

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