Quoting Daniel Vetter (2018-04-20 09:51:57)
> Control nodes are no more!
>
> Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> Cc: Jani Nikula <jani.nik...@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Rodrigo Vivi <
Jani Nikula (1):
drm/i915/bios: filter out invalid DDC pins from VBT child devices
Joonas Lahtinen (1):
Merge tag 'gvt-fixes-2018-04-03' of https://github.com/intel/gvt-linux
into drm-intel-next-fixes
Tina Zhang (1):
drm/i915/gvt: Add drm_format_mod update
Tvrtko Ursulin (1
Quoting Tvrtko Ursulin (2018-04-18 12:33:42)
> From: Tvrtko Ursulin
>
> Currently our driver assumes BSD2 means hardware engine instance number
> two. This does not work for Icelake parts with two VCS engines, but which
> are hardware instances 0 and 2, and not 0 and 1
wed. As we need an ever growing number of parameters for
> scheduling, move those into a struct for convenience.
>
> v2: Move the anonymous struct into its own function for legibility and
> ye olde gcc.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Rev
Quoting Chris Wilson (2018-04-18 12:14:15)
> Quoting Joonas Lahtinen (2018-04-18 10:10:17)
> > Quoting Chris Wilson (2018-04-17 20:06:38)
> > > The old wait_on_atomic_t used a custom callback to perform the
> > > schedule(), which used my return semantics
onst struct drm_i915_private *i915,
> +const struct i915_sched_attr *attr)
> +{
> + if (attr->priority == I915_PRIORITY_INVALID)
> + return;
This will yield a double space in the output. Just sayin'
> +
> + drm_printf(m, &q
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
"i915_sched_node" might be a less confusing name compared to the DRM
core scheduler.
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
the request/fence tracking.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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https:/
IMEDOUT from wait_var_event_timeout() into another errno.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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n_atomic_t()
> usage to the new wait_var_event() API")
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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Quoting Jani Nikula (2018-04-17 12:02:52)
> On Mon, 16 Apr 2018, "Srivatsa, Anusha" wrote:
> >>-Original Message-
> >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> >>Sent: Wednesday, April 11, 2018 5:27 AM
> >>To: Ian W MORRISON
this
> should already be the case.
>
> Suggested-by: Jani Nikula <jani.nik...@linux.intel.com>
> Signed-off-by: Matthew Auld <matthew.a...@intel.com>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Jani Nikula <jani.nik...@linux.intel.com>
>
Merged these (documentation only changes). Thanks for the patches!
Regards, Joonas
Quoting Patchwork (2018-04-06 11:29:26)
> == Series Details ==
>
> Series: Documentation patch for batchbuffer submission (rev5)
> URL : https://patchwork.freedesktop.org/series/38433/
> State : failure
>
> ==
+ Some more Cc's based on IRC discussion
Quoting Joonas Lahtinen (2018-04-05 16:46:51)
> + Dave for commenting from DRM subsystem perspective. I strongly believe
> there would be benefit from agreeing on some foundation of DRM subsystem
> level program GPU niceness [-20,19] and memory l
300, Joonas Lahtinen wrote:
> > Quoting Matt Roper (2018-03-23 17:46:16)
> > > On Fri, Mar 23, 2018 at 02:15:38PM +0200, Joonas Lahtinen wrote:
> > > > Quoting Matt Roper (2018-03-17 02:08:57)
> > > > > This is the fourth iteration of the work previously p
Quoting Zhenyu Wang (2018-04-03 10:28:35)
>
> Hi,
>
> Here's refreshed fixes for 4.17-rc1 with regression one removed,
> contains a few fixes for vfio ioctl and dmabuf interface, properly
> dma unmap for ggtt, etc.
I don't think -Wimplicit-fallthrough will be enabled retroactively, so
I'm don't
Quoting Jani Nikula (2018-04-04 12:48:55)
> On Wed, 04 Apr 2018, Joonas Lahtinen <joonas.lahti...@linux.intel.com> wrote:
> > + Jani for Sphinx
> >
> > Quoting Rogovin, Kevin (2018-04-03 17:34:49)
> >> I am somewhat tempted to just drop this patch or add mo
Quoting Matthew Auld (2018-04-04 13:05:23)
> On 4 April 2018 at 10:13, Joonas Lahtinen
> <joonas.lahti...@linux.intel.com> wrote:
> > Quoting Jani Nikula (2018-03-19 22:21:31)
> >> On Mon, 19 Mar 2018, Matthew Auld <matthew.william.a...@gmail.com> wrote:
> &
+ Jani for Sphinx
Quoting Rogovin, Kevin (2018-04-03 17:34:49)
> I am somewhat tempted to just drop this patch or add more documentation. The
> function pointers are used in the code common
> to the legacy way and LRC way of submitting batchbuffers to the GPU, so they
> should have somekind of
Quoting Dunajski, Bartosz (2018-03-30 12:00:51)
> I think the adoption is not a problem here.
Adoption is important for fulfilling the DRM subsystem requirements for
merging new kernel uAPI that I referred to previously.
So do we have some timeline for any distro picking up the new driver?
Quoting Jani Nikula (2018-03-19 22:21:31)
> On Mon, 19 Mar 2018, Matthew Auld wrote:
> > On 19 March 2018 at 18:17, Chris Wilson wrote:
> >> Quoting Matthew Auld (2018-03-19 18:08:54)
> >>> GEM_WARN_ON() was originally intended to be used
Winiarski <michal.winiar...@intel.com>
> CC: Michel Thierry <michel.thie...@intel.com>
> Cc: Jeff McGee <jeff.mc...@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
With the checkpatch fixed, this
Quoting kevin.rogo...@intel.com (2018-04-03 13:52:27)
> From: Kevin Rogovin
>
> Add documentation to a number of the function pointer fields of
> intel_engine_cs.
>
> Signed-off-by: Kevin Rogovin
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.h
lt;kevin.rogo...@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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cord when the GPU
> + *is done executing the batchbuffer. The memory write writes the
> + * global sequence number of the request, `i915_request::global_seqno``;
Double tick here. With that fixed:
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
> +
still bummed by the long lines in the bulleted list, but regardless:
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
> ---
> Documentation/gpu/i915.rst | 116
>
> drivers/gpu/drm/i915/i915_vma.h | 1
+ Zhi and Zhenyu
Quoting Xiong Zhang (2018-03-29 13:58:41)
> Four drm_mm_node are used to reserve guest ggtt space, but some of them
> may aren't initialized and used in intel_vgt_balloon(), so these unused
> drm_mm_node couldn't be removed through drm_mm_remove_node().
I'm not sure how this
hing to get rid of.
Regards, Joonas
>
>
> -Original Message-
> From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com]
> Sent: Wednesday, March 21, 2018 11:03 AM
> To: Dunajski, Bartosz <bartosz.dunaj...@intel.com>; Lis, Tomasz
> <tomasz@intel.com&g
Quoting Daniele Ceraolo Spurio (2018-03-23 19:17:49)
>
>
> On 23/03/18 05:34, Michał Winiarski wrote:
> > We're seeing "RPM wakelock ref not held during HW access" warning
> > otherwise. And since IRQ are synced for runtime suspend, we can use the
> > variant without wakeref assert.
> >
> >
fst...@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105710
> Signed-off-by: Michał Winiarski <michal.winiar...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Marta Löfstedt <marta.lofst...@intel.com>
> Cc: Michal Wajd
Quoting Joonas Lahtinen (2018-03-28 14:27:19)
> Quoting Jackie Li (2018-03-23 01:59:22)
> > GuC Address Space and WOPCM Layout diagrams won't be generated correctly by
> > sphinx build if not using proper reST syntax.
> >
> > This patch uses reST literal blocks to
15.rst (Joonas)
>
> Signed-off-by: Jackie Li <yaodong...@intel.com>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Looks good. Thanks
Hi Dave,
Two human-reported bugs to close for display and a more rare fix
that could result in GPU hang.
There was some unclarity about the GVT pull, so I'm not including
it here.
Happy Easter holidays!
Regards, Joonas
drm-intel-next-fixes-2018-03-27:
- Display fixes for booting with MST hub
Quoting Joonas Lahtinen (2018-03-27 16:42:28)
> Quoting Zhenyu Wang (2018-03-27 11:39:42)
> >
> > Hi, Joonas
> >
> > Here's this week's gvt-next-fixes queued for 4.17. One notable change
> > is to revert previous workaround for gvt context preemption, now it
&g
Quoting Zhenyu Wang (2018-03-27 11:39:42)
>
> Hi, Joonas
>
> Here's this week's gvt-next-fixes queued for 4.17. One notable change
> is to revert previous workaround for gvt context preemption, now it
> has full support for preemption now.
I've pulled the patches, but this revert sounds fishy.
Quoting Matt Roper (2018-03-23 17:46:16)
> On Fri, Mar 23, 2018 at 02:15:38PM +0200, Joonas Lahtinen wrote:
> > Quoting Matt Roper (2018-03-17 02:08:57)
> > > This is the fourth iteration of the work previously posted here:
> > > (v1)
> > > https://lists.fre
Quoting Yaodong Li (2018-03-23 19:33:15)
> As I said, I agree that we would likely solve the enable_guc=1 then
> enable_guc=3 case with these changes which I think this the the only benefit
> that we can get from the starting from the top way.
> But my point is just like the from the bottom way,
Quoting Daniel Vetter (2018-03-23 18:39:04)
> On Fri, Mar 23, 2018 at 06:22:46PM +0200, Jani Nikula wrote:
> > There was some discussion on the dim-tools list about splitting the
> > dri-devel list to drm core and drivers lists [1]. Moving the discussion
> > to the list in question seems prudent.
Quoting Stephen Rothwell (2018-03-23 02:50:18)
> Hi all,
>
> On Thu, 22 Mar 2018 13:21:29 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the drm-intel tree got a conflict in:
> >
> > drivers/gpu/drm/i915/gvt/scheduler.c
> >
> > between commit:
> >
Quoting Yaodong Li (2018-03-22 23:27:59)
> On 03/22/2018 01:38 PM, Michał Winiarski wrote:
> > On Tue, Mar 20, 2018 at 04:18:46PM -0700, Jackie Li wrote:
> >> @@ -175,30 +220,17 @@ int intel_wopcm_init(struct intel_wopcm *wopcm)
> >> return -E2BIG;
> >> }
> >>
> >> -
Quoting Bloomfield, Jon (2018-03-22 21:59:33)
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> > Of Jeff McGee
> > Sent: Thursday, March 22, 2018 12:09 PM
> > To: Tvrtko Ursulin
> > Cc: Kondapally, Kalyan
Quoting Jani Nikula (2018-03-21 14:16:37)
> On Wed, 21 Mar 2018, Chris Wilson wrote:
> > Quoting Jani Nikula (2018-03-21 11:47:06)
> >>
> >> > Quoting Chris Wilson (2018-03-21 10:41:37)
> >> >>
> >> >> Just idly testing the waters...
> >> >>
> >> >> In yaml, this
Quoting Matt Roper (2018-03-17 02:08:57)
> This is the fourth iteration of the work previously posted here:
> (v1)
> https://lists.freedesktop.org/archives/intel-gfx/2018-January/153156.html
> (v2)
> https://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg208170.html
> (v3)
o 10 minutes. Counter this by doing a warmup loop to
> estimate the appropriate queue len for timing.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
#define MAGNIFICENT_FACTOR_8 (3 + 5) or maybe a comment.
Reviewed-by: Joonas Lahtinen <joonas.lahti...@lin
Michal,
Can you send this with the enable_guc HAX patch to get a run in the CI
with GuC.
Regards, Joonas
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ill() on the first prepare_reset
Colin Ian King (1):
drm/i915/gvt: fix spelling mistake: "destoried" -> "destroyed"
Colin Xu (1):
drm/i915/gvt: Remove reduntant printing of untracked mmio
Jani Nikula (1):
drm/i915/icl: do not save DDI A/E sharing bit f
Quoting Zhenyu Wang (2018-03-20 04:41:08)
>
> Hi, Joonas
>
> Here's gvt-next-fixes update for 4.17. One regression that
> caused guest VM gpu hang has been fixed and with other changes
> as details below.
Pulled, thanks.
Regards, Joonas
___
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und to break.
Regards, Joonas
>
> -Original Message-
> From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com]
> Sent: Monday, March 19, 2018 2:54 PM
> To: Lis, Tomasz <tomasz@intel.com>; intel-gfx@lists.freedesktop.org; Dave
> Airlie <airl...@r
+ Dave, as FYI
Quoting Tomasz Lis (2018-03-19 14:37:34)
> The OpenCL driver develpers requested a functionality to control cache
> coherency at data port level. Keeping the coherency at that level is disabled
> by default due to its performance costs. OpenCL driver is planning to
> enable it for
Quoting Joonas Lahtinen (2018-03-14 15:10:46)
> Quoting Michal Wajdeczko (2018-03-14 14:47:28)
> > On Wed, 14 Mar 2018 13:31:46 +0100, Joonas Lahtinen
> > <joonas.lahti...@linux.intel.com> wrote:
> >
> > > Quoting Patchwork (2018-03-14 06:23:25)
> > &g
Quoting Michal Wajdeczko (2018-03-14 14:47:28)
> On Wed, 14 Mar 2018 13:31:46 +0100, Joonas Lahtinen
> <joonas.lahti...@linux.intel.com> wrote:
>
> > Quoting Patchwork (2018-03-14 06:23:25)
> >> == Series Details ==
> >>
> >> Series: ser
833
>
> Signed-off-by: Jackie Li <yaodong...@intel.com>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Reviewed-by: Michal Wajdeczko
Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: John Spotswood <john.a.spotsw...@intel.com>
> Cc: Jeff McGee <jeff.mc...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Reviewe
text size macro (Michal)
>
> v13:
> - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
>
> Bspec: 12690
>
> Signed-off-by: Jackie Li <yaodong...@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: Michal Wajdeczko <michal.wajdec...@in
Wajdeczko <michal.wajdec...@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Reviewed-by: Sagar Arun Kamble <sagar.a.kam...@intel.com> (
m>
> Cc: Sujaritha Sundaresan <sujaritha.sundare...@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
> Cc: John Spotswood <john.a.spotsw...@intel.com>
> Cc: Oscar Mateo <oscar.ma...@intel.com>
> Cc: Chris Wilson <ch...@c
Quoting Patchwork (2018-03-14 06:23:25)
> == Series Details ==
>
> Series: series starting with [v13,1/6] drm/i915/guc: Rename guc_ggtt_offset
> to intel_guc_ggtt_offset
> URL : https://patchwork.freedesktop.org/series/39919/
> State : failure
>
> == Summary ==
>
> Possible new issues:
Quoting Salvatore Mesoraca (2018-03-13 21:51:28)
> Avoid 3 VLAs[1] by using real constant expressions instead of variables.
> The compiler should be able to optimize the original code and avoid using
> any actual VLAs. Anyway this change is useful because it will avoid a false
> positives with
e local cpu's.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
UC_WOPCM_OFFSET));
> + DRM_ERROR("GUC_WOPCM_SIZE=%#x\n", I915_READ(GUC_WOPCM_SIZE));
As this doesn't really give information what were the computed write
values. But if you see this is most useful for debuggin, this is;
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel
etween "HuC FW" and "(%uKiB)" in error message (Michal)
>
> BSpec: 10875
>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: John Spotswood <john.a.spotsw...@intel.com>
> Cc: Jeff McGee
om context size macro (Michal)
>
> Bspec: 12690
>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com&g
tion, so this
should not be needed.
> +++ b/drivers/gpu/drm/i915/intel_wopcm.h
> @@ -0,0 +1,34 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2017-2018 Intel Corporation
> + */
> +
> +#ifndef _INTEL_WOPCM_H_
> +#define _
break (Chris)
>
> v10:
> - Removed unnecessary comments, redundant code and avoided reuse variable
>to avoid potential issues (Joonas)
>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kam...@intel.com>
> Cc: Chris Wilson <ch
Fix Limited Range Color Handling
Joonas Lahtinen (5):
Merge drm-next into drm-intel-next-queued
Merge drm-next into drm-intel-next-queued (this time for real)
drm/i915: Update DRIVER_DATE to 20180305
Merge tag 'gvt-next-2018-03-08' of https://github.com/intel/gvt-linux
into
> BR,
> Jani.
>
> On Thu, 08 Mar 2018, Joonas Lahtinen <joonas.lahti...@linux.intel.com> wrote:
> > Pulled.
> >
> > Regards, Joonas
> >
> > Quoting Zhenyu Wang (2018-03-08 04:31:52)
> >>
> >> Hi,
> >>
> >> Her
Pulled.
Regards, Joonas
Quoting Zhenyu Wang (2018-03-08 04:31:52)
>
> Hi,
>
> Here's gvt-next update for 4.17. Biggest update is for huge code
> refactor of shadow ppgtt from Changbin which is the most obscured
> part, and with KBL context save/restore improvement from Weinan,
> with other
Hi all,
This will be the tag to become the final kernel 4.17 feature pull
request. A recap of what has been brough in by this development
window (much of which people were on their various vacations):
* Cannonlake support is sufficient to remove alpha_support protection
* AUX-F port
r need to spin waiting for the signaling thread to release its
> references to the in-flight requests, and so we can assert that the
> signaler is idle.
>
> References: fd10e2ce9905 ("drm/i915/breadcrumbs: Ignore unsubmitted
> signalers")
> Signed-off-by: Chris Wilso
rectly using the existing machinery for handling the flushing of
> missed wakeups when idling.
>
> Suggested-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
well.
>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
slice in each slice with one bit per EU telling
> + * whether an EU is available. The availability of EU Z in subslice Y in
> + * slice X can be queried with the following formula :
> + *
> + * (data[eu_offset +
> + * (X * max_subslices Y) * eu_stride +
t; +};
> +
> +struct drm_i915_query {
> + __u32 num_items;
> +
> + /*
> +* Unused for now.
Ditto.
> +*/
> + __u32 flags;
> +
> + /*
> +* This point to an array of num_items drm_i915_query_item structures.
"points"
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Lets wait for the Mesa patch review still before merging.
Regards, Joonas
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bal GTT, i.e. for use as a display scanout).
> >
> > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
>
> Hi Joonas, you made a request for this selftest once upon a time.
> -Chris
&g
tko Ursulin <tvrtko.ursu...@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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> References: 56299fb7d904 ("drm/i915: Signal first fence from irq handler if
> complete")
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> Cc: Joon
For some reason, I've reviewed these from the middle of the series
(maybe transport delay?). Are the rest still applicable or refreshed
somewhere?
Regards, Joonas
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Quoting Rodrigo Vivi (2018-03-01 20:00:07)
> On Thu, Mar 01, 2018 at 06:13:31PM +0200, Jani Nikula wrote:
> >
> > I went through the recent checkpatch reports, and here's my take.
> >
> > On Thu, 01 Mar 2018, Arkadiusz Hiler wrote:
> > > 2. Which of the checkpatch
m/i915: introduce INTEL_PCH_ID() and use it
drm/i915/audio: fix check for av_enc_map overflow
Joonas Lahtinen (2):
drm/i915: Update DRIVER_DATE to 20180214
drm/i915: Update DRIVER_DATE to 20180221
Maarten Lankhorst (2):
drm/i915: Ignore minimum lines for level 0 in skl_compute_pl
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
> Cc: Michał Winiarski <michal.winiar...@in
0;
> + break;
> + case HSW_F1_EU_DIS_MASK_8EUS:
> + sseu->eu_per_subslice = 8;
> + break;
> + case HSW_F1_EU_DIS_MASK_6EUS:
> + sseu->eu_per_subslice = 6;
> + break;
> + default:
> +
Hi all,
Mostly fixes in this tag. QA/testing could emphasis on CNL hardware as we're
removing the alpha_support flag for it.
Regards, Joonas
---
The following changes tagged drm-intel-testing-2018-02-21:
drm-intel-next-2018-02-21:
Driver Changes:
- Lift alpha_support protection from
me to nonpriv, as this is what bspec calls the
> registers that are writable by userspace.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Reviewed-by: Joonas Lahti
Quoting Chris Wilson (2018-02-20 10:45:17)
> Ensure that we always use every context at least once before we start
> running the stress-test.
>
> Signed-off-by: Chris Wilson
> ---
> tests/gem_ctx_switch.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git
show_bug.cgi?id=104676
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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Quoting Chris Wilson (2018-02-20 10:45:12)
> @@ -398,7 +399,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
> igt_assert(gem_bo_busy(fd, spin[0]->handle));
> }
>
> - for (int n = 0; n < 16; n++)
> + for (int n = 0; n < MAX_ELSP_QLEN; n++)
>
till lower than the ~4096 previously in use)
> v3: Also limit NCTX to MAX_CONTEXTS for wide-*
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Acked-by: Antonio Argenziano <antonio.argenzi...@intel.com>
R-b was probably meant here instead. Anyway, this is:
Rev
;
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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/shrink: 0/1 up/down: 0/-10 (-10)
> Function old new delta
> drm_mm_interval_tree_add_node221 211 -10
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti.
his bug didn't have any functional effect, we could go with
rb_insert_augmented and not try to cache the node if the information
ends up being unused.
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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the library, that is the job for the ABI
> tests.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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Inte
6:31: warning: ‘fd’ may be used uninitialized in this
> function [-Wmaybe-uninitialized]
> syncobj_wait.c:760:6: note: ‘fd’ was declared here
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
_
Quoting Chris Wilson (2018-02-19 22:12:26)
> gem_exec_flush.c: In function ‘batch’:
> gem_exec_flush.c:443:15: warning: ‘ptr’ may be used uninitialized in this
> function [-Wmaybe-uninitialized]
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewe
warning: 'index' may be used uninitialized in this
> function [-Wmaybe-uninitialized]
>
> Fixes: 7422d7540a3b ("lib/igt_debugfs: Introduce CRC check function, with
> logic made common")
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Jo
on <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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Quoting Chris Wilson (2018-02-20 00:18:06)
> Don't just wait for the batch to be completed, wait for the system to
> idle! Then wake it up and do it again.
>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.
+ DRM_MM_BUG_ON(>hole_stack == >hole_stack);
> + if (unlikely(>hole_stack == >hole_stack))
Would be more readable as:
if (...) {
DRM_MM_BUG()
}
Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Regards, Joonas
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These documentation improvements are much welcome, here are a few
comments from me.
Quoting kevin.rogo...@intel.com (2018-02-16 16:04:22)
> +Intel GPU Basics
> +
> +
> +An Intel GPU has multiple engines. There are several engine types.
> +
> +- RCS engine is for rendering 3D and
Quoting Jani Nikula (2018-02-19 11:34:34)
> On Fri, 16 Feb 2018, Bjorn Helgaas wrote:
> > On Mon, Nov 27, 2017 at 11:57:46AM -0500, Sinan Kaya wrote:
> >> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> >> where a PCI device is present. This restricts
Quoting Lionel Landwerlin (2018-02-15 14:02:02)
> With the introduction of asymmetric slices in CNL, we cannot rely on
> the previous SUBSLICE_MASK getparam to tell userspace what subslices
> are available. Here we introduce a more detailed way of querying the
> Gen's GPU topology that doesn't
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