-off-by: Matt Roper
and here you did what I was thinking after reading patch 1.
Acked-by: Lucas De Marchi
... since I couldn't go the entire patch right now to review, but I like
where this is leading
Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_color.c| 30 +-
drivers/gpu/drm
o have the types needed
available. If we go one step further and make it an opaque pointer, then
it'd be even better, but we'd need a mass conversion everywhere using
display. It seems to be going the right directions
Reviewed-by: Lucas De Marchi
Lucas De Marchi
/*
* Initi
On Fri, May 12, 2023 at 02:14:19PM +0300, Andy Shevchenko wrote:
On Mon, May 08, 2023 at 10:14:02PM -0700, Lucas De Marchi wrote:
Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
masks for fixed-width types and also the corresponding BIT_U32(),
BIT_U16() and BIT_U8().
Why
On Tue, May 09, 2023 at 11:00:36AM -0300, Gustavo Sousa wrote:
Quoting Lucas De Marchi (2023-05-09 02:14:02)
Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
masks for fixed-width types and also the corresponding BIT_U32(),
BIT_U16() and BIT_U8().
All of those depend
On Tue, May 09, 2023 at 10:57:19AM +0300, Jani Nikula wrote:
On Mon, 08 May 2023, Lucas De Marchi wrote:
Convert the REG_* macros from i915_reg_defs.h to use the new macros
defined in linux/bits.h. This is just to help on the implementation
of the new macros and not intended to be applied
Convert the REG_* macros from i915_reg_defs.h to use the new macros
defined in linux/bits.h. This is just to help on the implementation
of the new macros and not intended to be applied.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg_defs.h | 28 +---
1
)
$ coccicheck SPFLAGS=--in-place MODE=patch \
COCCI=utype.cocci \
M=./drivers/gpu/drm/
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/amd/amdgpu/atom.c | 212
drivers/gpu/drm/amd/include/atom-bits.h | 9 +-
drivers
the implementation of the
REG_* macros, the goal is to replace the callers as well.
Patches here are currently based on drm-tip branch.
Lucas De Marchi (3):
drm/amd: Remove wrapper macros over get_u{32,16,8}
linux/bits.h: Add fixed-width GENMASK and BIT macros
drm/i915: Temporary conversion
const u16 b2 = GENMASK_U16(16, 0);
static const u8 c2 = GENMASK_U8(8, 0);
static const u32 x2 = BIT_U32(32);
static const u16 y2 = BIT_U16(16);
static const u8 z2 = BIT_U8(8);
#endif
Signed-off-by: Lucas De Marchi
---
include/linux/bits.h
On Thu, May 04, 2023 at 01:45:24PM -0700, John Harrison wrote:
On 5/4/2023 13:29, Lucas De Marchi wrote:
On Thu, May 04, 2023 at 01:22:52PM -0700, john.c.harri...@intel.com
wrote:
From: John Harrison
Also switch to using reduced version file naming as it is no longer
such a work-in-progress
First release of GuC for Meteorlake.
Signed-off-by: John Harrison
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu
On Thu, Apr 20, 2023 at 08:36:37AM -0700, Jose Souza wrote:
On Thu, 2023-04-20 at 11:27 -0400, Rodrigo Vivi wrote:
On Thu, Apr 20, 2023 at 09:19:09AM -0400, Souza, Jose wrote:
> On Wed, 2023-04-19 at 00:29 -0700, Lucas De Marchi wrote:
> > On Wed, Apr 19, 2023 at 10:16:22AM +0300, Ja
On Wed, Apr 19, 2023 at 10:16:22AM +0300, Jani Nikula wrote:
On Tue, 18 Apr 2023, Lucas De Marchi wrote:
On Tue, Apr 18, 2023 at 11:30:18PM -0700, Lucas De Marchi wrote:
On Tue, Apr 18, 2023 at 09:43:37AM -0700, Jose Souza wrote:
Start to move the initialization of display locks from
On Tue, Apr 18, 2023 at 11:30:18PM -0700, Lucas De Marchi wrote:
On Tue, Apr 18, 2023 at 09:43:37AM -0700, Jose Souza wrote:
Start to move the initialization of display locks from
i915_driver_early_probe(), this way it is also executed when running
Xe kmd.
This will fix a warning in Xe kmd
00 R15: 5616a6180650
[ 202.489396]
v2:
- added intel_display_locks_init()
v3:
- rebased
v4:
- drop intel_display_locks_init()
why?
Lucas De Marchi
ay-related debugfs files to display/ directory? I think that would
make it clearer for the xe integration while also cleaning up a little
bit the various files on i915. Downside would be synchronizing this with
the tools reading those files. I guess it's only igt and CI that care about
them?
Lucas De Marchi
ed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 1ac6f9f340e3..a82a53dbbc86 100644
--- a/driv
/drm/i915/display/intel_display_driver.c
@@ -21,7 +21,7 @@
#include "intel_fbdev.h"
#include "intel_opregion.h"
-bool intel_modeset_probe_defer(struct pci_dev *pdev)
+bool intel_display_driver_probe_defer(struct pci_dev *pdev)
thanks much
Reviewed-by: Lucas De Marchi
Lucas De Marchi
On Tue, Apr 11, 2023 at 08:07:12PM +, Jose Souza wrote:
On Tue, 2023-04-11 at 12:59 -0700, Lucas De Marchi wrote:
On Tue, Apr 11, 2023 at 10:51:04AM -0400, Rodrigo Vivi wrote:
> On Tue, Apr 11, 2023 at 12:14:36PM +0300, Jani Nikula wrote:
> > On Tue, 11 Apr 2023, Ville Syrjä
ntel_setup_outputs.
But I don't see why this couldn't be done in a higher level "sw
initialization of display-related stuff". Should we add an equivalent
of i915_driver_early_probe(), e.g. intel_display_early_probe()[1], and
move the display-related things from i915_driver_early_probe()
On Tue, 04 Apr 2023 10:07:37 -0700, Lucas De Marchi wrote:
> Since we are now using unversioned GuC/HuC, it's useful to be able to
> dump the firmware blob and get that information from the CSS header.
> Add a tool that decodes that information and dumps the raw header.
>
>
On Fri, Apr 07, 2023 at 05:45:52AM -0400, Rodrigo Vivi wrote:
On Thu, Apr 06, 2023 at 05:37:58PM -0700, Lucas De Marchi wrote:
On Fri, Mar 31, 2023 at 03:52:16PM -0700, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> First release of GuC for Meteorlake.
>
> NB: As th
to hide the fw
def for *new* firmware (not the legacy ones) that are using the mmp
version.
For now, let's keep this as is and use the CI branch to assess the
driver health with GuC.
thanks
Lucas De Marchi
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git
s
attention to it since it's not an approved way for comments
according to kernel coding style
- Better logging handling, without an explicit logger object
- Catch ImportError for the dissect.cstruct dependency (Gustavo)
Signed-off-by: Lucas De Marchi
Acked-by: Gustavo Sousa
Acked-by:
On Tue, Apr 04, 2023 at 09:29:51AM -0300, Gustavo Sousa wrote:
Quoting Lucas De Marchi (2023-04-03 17:24:37)
Since we are now using unversioned GuC/HuC, it's useful to be able to
dump the firmware blob and get that information from the CSS header.
Add a tool that decodes that information
()). But then the code you are
adding here is probably dead code since 825477e77912 ("drm/i915/mtl:
Obtain SAGV values from MMIO instead of GT pcode mailbox")
If this is fixing anything what exactly is it? Otherwise it'd be more
"extend to next platforms" rather than &qu
0\x00'
- sw_version: 0x460501
- vf_version: 0x0
- reserved0: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
- rsvd:
- header_info: 0x400100
Signed-off-by: Lucas De Marchi
---
tools/intel-gfx-fw-info | 120
tools/meson.build | 2 +-
2
ts use C20 phy that still need
to be properly added. Enable the first ports for now, keeping a TODO
comment about the others.
... and move it after that statement is true. With that:
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i9
On Thu, Mar 16, 2023 at 01:13:16PM +0200, Mika Kahola wrote:
Create a separate file to store registers for PICA chips
C10 and C20.
v2: Rename file (Jani)
v3: Use _PICK_EVEN_2RANGES() macro (Lucas)
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Mika Kahola
---
uc/intel_guc_submission.c: *
Wa_22011802037: In addition to stopping the cs, we need
Btw then comments about graphics versions didn't age well: they are not matching
the code anymore
Lucas De Marchi
On Mon, Mar 13, 2023 at 11:10:26AM +0200, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 12:49:52PM -0800, Lucas De Marchi wrote:
dg1_gt_workarounds_init() is only ever called for DG1, so there is no
point checking it again.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt
On Mon, Mar 06, 2023 at 03:17:50PM -0800, Matt Roper wrote:
On Mon, Mar 06, 2023 at 12:49:54PM -0800, Lucas De Marchi wrote:
dg1_ctx_workarounds_init() is DG1-only, while
gen12_ctx_workarounds_init() is shared with other platforms. Move the
workaround to the former so there is no additional
Use gt_tuning_settings() for the recommended tunings rather than the one
for workarounds.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b
dg1_gt_workarounds_init() is only ever called for DG1, so there is no
point checking it again.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
dg1_ctx_workarounds_init() is DG1-only, while
gen12_ctx_workarounds_init() is shared with other platforms. Move the
workaround to the former so there is no additional platform check
needed.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +++--
1 file
, \
+ [PORT_TC4] =
_XELPDP_PORT_CLOCK_CTL_USBC4))
and here
Lucas De Marchi
+
+#define XELPDP_LANE0_PCLK_PLL_REQUEST REG_BIT(31)
+#define XELPDP_LANE0_PCLK_PLL_ACK REG_BIT(30)
+#define XELPDP_LANE0_PCLK_REFCLK_REQUEST
Define MCR_REG() in the same header where i915_mcr_reg_t is defined,
like i915_reg_t and _MMIO(). It's a more natural place for such a
definition so it's not mixed with the registers for the platforms.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 --
drivers
re, GEN11_GU_MISC_, ~gu_misc_masked,
+ gu_misc_masked);
+ }
yep, the postinstall matches the logic I mentioned above.
with the changes above,
Reviewed-by: Lucas De Marchi
thanks
Lucas De Marchi
if (HA
want it.
I might be lacking historical context here but I assumption is we are
moving towards replacing dev_priv with i915 everywhere.
Context: 20230201135329.514677-1-luciano.coe...@intel.com and
87bkml5wv4....@intel.com
Lucas De Marchi
On Tue, Feb 07, 2023 at 11:05:55AM -0800, Lucas De Marchi wrote:
On Mon, Feb 06, 2023 at 08:04:29PM +, Patchwork wrote:
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: Fix GEN8_MISCCPCTL
URL : https://patchwork.freedesktop.org/series/113713/
State : failure
v2 except for the
commit message in the first patch. v1 got full pass:
https://patchwork.freedesktop.org/series/113626/
Also, looking at
https://intel-gfx-ci.01.org/tree/drm-tip/bat-all.html?testfilter=basic-flip-vs-modeset
It looks like this machine changed from DP to HDMI starting in
CI_DRM_12708?
Lucas
INF_UNIT_LEVEL_CLKGATE is not replicated, but since it's not actually
used it can just be removed.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt
commit message adding the justification wrt gen8
Fixes: a9e69428b1b4 ("drm/i915: Define MCR registers explicitly")
Cc: Balasubramani Vivekanandan
Cc: Rodrigo Vivi
Cc: Gustavo Sousa
Cc: Matt Atwood
Cc: Ashutosh Dixit
Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
---
drivers/gp
On Fri, Feb 03, 2023 at 03:20:20PM -0800, Clint Taylor wrote:
DDC pin mapping for DGFX cards uses direct VBT pin mapping
Cc: Lucas De Marchi
Cc: Matt Roper
Signed-off-by: Clint Taylor
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_bios.c | 5
less than the DSM
granularity, it can be simplified by simply aligning the size like
is done here.
v2: replace "1 * SZ_1M" with SZ_1M (Andrzej).
Cc: Matthew Auld
Suggested-by: Lucas De Marchi
Signed-off-by: Nirmoy Das
Reviewed-by: Andrzej Hajda
Reviewed-by: Lucas De Marchi
On Thu, Feb 02, 2023 at 05:12:10PM -0800, Matt Roper wrote:
On Thu, Feb 02, 2023 at 04:57:08PM -0800, Lucas De Marchi wrote:
Register 0x9424 is not replicated on any platform, so it shouldn't be
declared with REG_MCR(). Declaring it with _MMIO() is basically
duplicate of the GEN7 version, so
INF_UNIT_LEVEL_CLKGATE is not replicated, but since it's not actually
used it can just be removed.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt
+ write where possible.
Fixes: a9e69428b1b4 ("drm/i915: Define MCR registers explicitly")
Cc: Matt Roper
Cc: Balasubramani Vivekanandan
Cc: Rodrigo Vivi
Cc: Gustavo Sousa
Cc: Matt Atwood
Cc: Ashutosh Dixit
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_gt_regs.
the ones that
shouldn't have it at all
This makes the script easier to write and run and can be postponed to
when the branches are in sync if we are going to cross the display/
boundary.
Anyway since you are changing this, I'll hold off on more patches
related to it.
Lucas De Marchi
--
Cheers,
Luca.
On Wed, Feb 01, 2023 at 02:09:54PM +0200, Ville Syrjälä wrote:
On Wed, Feb 01, 2023 at 11:59:19AM +0200, Jani Nikula wrote:
On Tue, 31 Jan 2023, Lucas De Marchi wrote:
> Instead of using the common DISPLAY_MMIO_BASE(dev_priv) in all single
> macros, only use them in the
: they make the
interface better and can even be merged without churn to the codebase,
as they are header-only.
Then the rest we mass convert with a script like shared here.
Lucas De Marchi
() and _MMIO_PORT3() like then non-3 variants.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display_reg_defs.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
b/drivers/gpu/drm/i915/display
Instead of using the common DISPLAY_MMIO_BASE(dev_priv) in all single
macros, only use them in the macros that are to be used outside the
header. This reduces the use of the implicit dev_priv, making it easier
to remove it later.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915
ving the implicit dev_priv, and the renames are
easier to handle piecemeal, say a file at a time or something.
I'm trying to write a semantic patch to convert this stuff. But
coccinelle is problematic when it comes to macros, so it turned out not
to be as trivial as I though.
I think that the def
On Thu, Jan 26, 2023 at 01:34:40PM -0500, Rodrigo Vivi wrote:
On Thu, Jan 26, 2023 at 08:36:42AM -0800, Lucas De Marchi wrote:
On Thu, Jan 26, 2023 at 06:05:32PM +0200, Jani Nikula wrote:
> On Thu, 26 Jan 2023, Luca Coelho wrote:
> > On Thu, 2023-01-26 at 14:11 +0200, Luca Coe
it's a sed or something that can be automated, I think it could be
ok as single patch as long as we find the right time to generate it,
when the trees are in sync.
I do remember doing a sed s/dev_priv/i915/ (or it was with a cocci
script, don't remember) a few years ago, and I'm
glad we are giving up the slow conversion and just ripping the
bandaid.
Lucas De Marchi
ranges and selects which
one to use depending on the index value.
v2: Fix the address expansion in the example (Anusha)
v3: Also rename macro to _PICK_EVEN_2RANGES() in the documentation
and reword it to clarify what ranges are chosen based on the index
(Jani)
Signed-off-by: Lucas De Marchi
(I missed this review you did before I had sent a v2.1, I will incorporate
what is missing in the next version)
On Mon, Jan 23, 2023 at 12:38:28PM +0200, Jani Nikula wrote:
On Fri, 20 Jan 2023, Lucas De Marchi wrote:
It's a constant pattern in the driver to need to use 2 ranges of MMIOs
based
ranges and selects which
one to use depending on the index value.
v2: Fix the address expansion in the example (Anusha)
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg_defs.h | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915
v2 1/8] drm/i915: Add _PICK_EVEN_2RANGES()
On Sat, 21 Jan 2023, Lucas De Marchi wrote:
> On Fri, Jan 20, 2023 at 10:14:19PM -0800, Anusha Srivatsa wrote:
>>
>>
>>> -Original Message-
>>> From: Intel-gfx On Behalf
>>> Of Lucas De Marchi
&
On Fri, Jan 20, 2023 at 10:14:19PM -0800, Anusha Srivatsa wrote:
-Original Message-
From: Intel-gfx On Behalf Of Lucas
De Marchi
Sent: Friday, January 20, 2023 11:35 AM
To: intel-gfx@lists.freedesktop.org
Cc: De Marchi, Lucas ; dri-
de...@lists.freedesktop.org
Subject: [Intel-gfx
ow what the future holds.
it may be that my fuzzy memory about this is that we didn't have yet the
general_render_compute_* function to add this kind of WA to, so some of
the workarounds got added to the engine because these registers reset
when either compute or render reset. So, yes... I agree
_FIA() can use _PICK_EVEN_2RANGES instead of _PICK, which reduces the
size and is safer.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_mg_phy_regs.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_mg_phy_regs.h
b
PALETTE() can use _PICK_EVEN_2RANGES instead of _PICK, which
reduces the size and is safer.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915
MBUS_ABOX_CTL() can use _PICK_EVEN_2RANGES instead of _PICK, which
reduces the size and is safer.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915
/drm/i915/i915.o.old
4026288 1857036984 4218975 40605f
build64/drivers/gpu/drm/i915/i915.o.new
Signed-off-by: Lucas De Marchi
---
.../drm/i915/display/intel_display_reg_defs.h| 3 ---
drivers/gpu/drm/i915/i915_reg.h | 16 +---
2 files changed, 9
Abide by the rules in the top of the header: 2 spaces for bitfield,
prefix offsets with underscore and prefer the use of REG_BIT().
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git
ranges and selects which
one to use depending on the index value.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg_defs.h | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h
b/drivers/gpu/drm/i915/i915_reg_defs.h
/drivers/gpu/drm/i915/i915.o.old
4025496 1857036984 4218183 405d47
build64/drivers/gpu/drm/i915/i915.o.new
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display_reg_defs.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
4064ef
build64/drivers/gpu/drm/i915/i915.o.old
4026997 1857036984 4219684 406324
build64/drivers/gpu/drm/i915/i915.o.new
At the same time it's safer, avoiding out-of-bounds array access. This
allows to remove _MMIO_PLL3() that is now unused.
Signed-off-by: Lucas De Marchi
platforms, so I think it's good enough. In future I think just saving
the reg during initialization and using different functions if the
bitfields change may be an alternative.
This was lightly tested on ADL-S and DG2.
Lucas De Marchi (8):
drm/i915: Add _PICK_EVEN_2RANGES()
drm/i915: Fix
anymore.
Signed-off-by: Lucas De Marchi
---
tests/i915/sysfs_clients.c | 1063
tests/meson.build |1 -
2 files changed, 1064 deletions(-)
delete mode 100644 tests/i915/sysfs_clients.c
diff --git a/tests/i915/sysfs_clients.c b/tests/i915
On Thu, Jan 05, 2023 at 01:35:52PM +, Tvrtko Ursulin wrote:
Okay to sum it up below with some final notes..
On 04/01/2023 19:34, Matt Roper wrote:
On Wed, Jan 04, 2023 at 09:58:13AM +, Tvrtko Ursulin wrote:
On 23/12/2022 18:28, Lucas De Marchi wrote:
On Fri, Dec 23, 2022 at 09:02
y". Leaving the additional backend behind
CONFIG_BROKEN or XE_EXPERIMENTAL, or something like that, not
enabled by distros, but enabled in CI would be a good idea IMO.
Carrying a large patch out of tree would make things harder for new
platforms. A perfect backend split would make it possible, but like I
said, we are likely not to have it if we delete the second backend.
Lucas De Marchi
Matt
Regards,
Tvrtko
On Fri, Dec 23, 2022 at 09:02:35AM +, Tvrtko Ursulin wrote:
On 22/12/2022 15:55, Lucas De Marchi wrote:
On Thu, Dec 22, 2022 at 10:27:00AM +, Tvrtko Ursulin wrote:
On 22/12/2022 08:25, Lucas De Marchi wrote:
The comments are redundant to the checks being done to apply
On Thu, Dec 22, 2022 at 07:12:08PM -0300, Gustavo Sousa wrote:
On Wed, Dec 21, 2022 at 04:23:45PM -0800, Lucas De Marchi wrote:
On Wed, Dec 21, 2022 at 12:26:26PM +0200, Jani Nikula wrote:
> On Tue, 20 Dec 2022, Gustavo Sousa wrote:
> > As we do not require specific versions anymor
On Thu, Dec 22, 2022 at 10:27:00AM +, Tvrtko Ursulin wrote:
On 22/12/2022 08:25, Lucas De Marchi wrote:
The comments are redundant to the checks being done to apply the
workarounds and very often get outdated as workarounds need to be
extended to new platforms or steppings. Remove them
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c| 2 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_workarounds.c
).*\*\//\1
Same things was executed in the gem directory, omitted here for brevity.
There were a few false positives that included the workaround
description. Those were manually patched.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +-
drivers/gpu/drm/i915/gt
: it's only
provided for ease of review and rebase.
Lucas De Marchi (4):
drm/i915/gt: Remove platform comments from workarounds
fixup! drm/i915/gt: Remove platform comments from workarounds
drm/i915: Remove platform comments from workarounds
fixup! drm/i915: Remove platform comments from
There were a few false positives that included the workaround
description. Those were manually patched.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/i9xx_plane.c | 2 +-
drivers/gpu/drm/i915/display/icl_dsi.c
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 4 ++--
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git
platforms anyway, no need to
rename them. I think that after having symlinks in place in
linux-firmware for a few years/months, then we can go back and kill the
version numbers if we really want to.
Lucas De Marchi
BR,
Jani.
parse_dmc_fw(dev_priv, fw);
if (intel_dmc_has_payload(dev_priv)) {
--
Jani Nikula, Intel Open Source Graphics Center
priv, phy))
+ timeout_us = 3000;
+ else
+ timeout_us = 1000;
ADL-P should be 500 usec
Lucas De Marchi
+ } else {
+ timeout_us = 500;
+ }
+
ret = _wait_for(!(intel_de_read(dev_priv, DDI_BUF
gfx-ci.01.org/tree/drm-tip/Patchwork_111951v2/fi-kbl-soraka/igt@kms_pipe_crc_ba...@nonblocking-crc.html
Unrelated change
Lucas De Marchi
Known issues
Here are the changes found in Patchwork_111951v2 that come from known issues:
### IGT changes ###
Issues hit ###
While debugging page table faults it's useful not to kill the machine
with thousands of error mesages. Ratelimit all errors in
gen8_de_irq_handler().
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_irq.c | 28 ++--
1 file changed, 14 insertions(+), 14
it, the attribute can be removed.
Fixes: 7835303982d1 ("drm/i915/mtl: Add MeteorLake PCI IDs")
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 3f
it can grok
kernel / i915
Anyway,
Reviewed-by: Lucas De Marchi
Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 32b257157186
.
Corollary:
Just make sure you have a cover letter in your series - it's anyway a
good practice to give an overview of what you're doing in the series as
a whole. And don't use --in-reply-to: patchwork will group as new revs
of the same series by subject.
Lucas De Marchi
Thanks,
Aravind.
On 06-12
On Thu, Dec 01, 2022 at 03:44:07PM -0800, Matt Roper wrote:
On Thu, Dec 01, 2022 at 03:27:25PM -0800, Lucas De Marchi wrote:
On Thu, Dec 01, 2022 at 03:01:05PM -0800, Matt Roper wrote:
> On Wed, Nov 30, 2022 at 03:17:08PM -0800, Matt Atwood wrote:
> > From: Jouni Högander
> >
ER(14, 0)
so that it won't automatically capture future platforms by accident.
I think it's better to do a platform check as the other platforms are
doing. See DG2 for example:
#define IS_DG2_DISPLAY_STEP(__i915, since, until) \
(IS_DG2(__i915) && \
IS_DISPLAY_STEP(__i915, since, until))
Lucas De Marchi
f (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) {
- fuse = REG_FIELD_GET(GT_L3_EXC_MASK,
-intel_uncore_read(gt->uncore, XEHP_FUSE4));
+ /* Wa_14016747170:mtl-m[a0], mtl-p[a0] */
and here and in other places.
Lucas De Marchi
ng this. The stepping check is inclusive on the
left, exclusive on the right, i.e: [STEP_A0, STEP_B0).
But even if the check is simpler, I'd avoid doing a negative check to
maintain consistency.
Lucas De Marchi
range, if it is possible to define it. Don't know.. One could perhaps
even suggest a new m
the GPR registers, but on
+* MTL the scratch uses stolen lmem. An MI_SRM to this memory region
+* causes an engine hang. Instead allocate an additional page here to
humn.. is it because of the pte being wrong? "stolen lmem" in mtl is
still system memory... do we know why we'd need t
On Tue, Nov 29, 2022 at 09:58:03AM +0530, Iddamsetty, Aravind wrote:
On 29-11-2022 01:57, Lucas De Marchi wrote:
On Mon, Nov 28, 2022 at 03:43:51PM +0530, Aravind Iddamsetty wrote:
Add a separate PTE encode function for MTL. The number of PAT registers
have increased to 16 on MTL. All 16 PAT
On Tue, Nov 29, 2022 at 11:33:15AM +0530, Iddamsetty, Aravind wrote:
On 29-11-2022 11:24, Lucas De Marchi wrote:
On Wed, Nov 23, 2022 at 09:47:03AM +0530, Iddamsetty, Aravind wrote:
On 23-11-2022 05:29, Matt Roper wrote:
On Tue, Nov 22, 2022 at 12:31:26PM +0530, Aravind Iddamsetty wrote
ret = intel_gt_assign_ggtt(gt);
in v3 the intel_gt_assign_ggtt() call is not in i915_driver.c anymore but
rather moved here. We could make i915_ggtt_create() static, doing the
allocation here and intel_gt_assign_ggtt() would be in charge of just
assigning the ggtt. Not very important thou
pointer.
Lucas De Marchi
BSPEC: 63884
Cc: Lucas De Marchi
Cc: Matt Roper
Co-developed-by: Fei Yang
Signed-off-by: Fei Yang
Signed-off-by: Aravind Iddamsetty
---
drivers/gpu/drm/i915/display/intel_dpt.c | 2 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 43
drivers/gpu
explanation recorded in
the cover letter.
According to e7737b67ab46 ("drm/i915/uapi: reject caching ioctls for discrete")
it seems it was already planned to extend this to all platforms.
+Daniel, +Matt Auld
Cc: Lucas De Marchi
Cc: Matt Roper
Cc: Joonas Lahtinen
Signed-off-by: Pall
Reviewed-by: Lucas De Marchi
thanks
Lucas De Marchi
---
v4: fixed prototype when converting to static inline
v3: added tag (Jani), changed to be static inline (Mike)
v2: dropped the duplicate code in i915 (LKP)
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 13 +
include/linux/list.h
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