Hi Alexander,
alexander.usys...@intel.com wrote on Wed, 14 Feb 2024 12:16:00 +:
> Hi Miquel
>
> Intel Gfx in infinite wisdom decided to create another driver - Xe and
> the spi driver part of this series should be moved to some common location.
> Should it be drivers/mtd or drivers/spi, or
Hi Alexander,
+ Michael and Tudor
Folks, any interesting thought about the below discussion?
alexander.usys...@intel.com wrote on Tue, 14 Nov 2023 08:47:34 +:
> >
> > > > > > > + spi->mtd.writesize = SZ_1; /* 1 byte granularity */
> > > > > >
> > > > > > You say writesize should be
Hi Alexander,
alexander.usys...@intel.com wrote on Tue, 17 Oct 2023 14:20:32 +:
> > > > > + spi->mtd.writesize = SZ_1; /* 1 byte granularity */
> > > >
> > > > You say writesize should be aligned with 4 in your next patch?
> > >
> > > We support unaligned write by reading aligned
Hi Alexander,
alexander.usys...@intel.com wrote on Tue, 17 Oct 2023 11:54:41 +:
> Hi Miquel,
>
> > > +static int i915_spi_init_mtd(struct i915_spi *spi, struct device *device,
> > > + unsigned int nparts)
> > > +{
> > > + unsigned int i;
> > > + unsigned int n;
> > > +
Hi Alexander,
> +static int i915_spi_init_mtd(struct i915_spi *spi, struct device *device,
> + unsigned int nparts)
> +{
> + unsigned int i;
> + unsigned int n;
> + struct mtd_partition *parts = NULL;
> + int ret;
> +
> + dev_dbg(device, "registering
Hi Mark,
broo...@kernel.org wrote on Wed, 27 Sep 2023 16:37:35 +0200:
> On Wed, Sep 27, 2023 at 02:11:47PM +, Usyskin, Alexander wrote:
>
> > There is a Discreet Graphic device with embedded SPI (controller & flash).
> > The embedded SPI is not visible to OS.
> > There is another HW in the
Hi,
alexander.usys...@intel.com wrote on Tue, 12 Sep 2023 13:15:58 +:
> >
> > > The spi controller on discreet graphics card is not visible to user-space.
> > > Spi access flows are supported by another hardware module and relevant
> > registers are
> > > available on graphics device
Hi Alexander,
+ Mark Brown + spi list
+ spi-nor maintainers
alexander.usys...@intel.com wrote on Sun, 10 Sep 2023 15:39:39 +0300:
> Add driver for access to the discrete graphics card
> internal SPI device.
> Expose device on auxiliary bus and provide driver to register
> this device with MTD
Hi Joe,
For MTD:
> drivers/mtd/nand/raw/nandsim.c| 2 +-
Reviewed-by: Miquel Raynal
Thanks,
Miquèl
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