Compute vrr vsync params in case of FAVT as well instead of
only to AVT mode of operation.
--v2:
- Remove redundant computation for vrr_vsync_start
and vrr_vsync_end(Ankit).
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 17 +
1 file changed, 9
Set cmrr.enable flag during intel_vrr_compute_config.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 07be70f7c536
Compute params for Adaptive Sync SDP when Fixed Average Vtotal
mode is enabled.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu
Add support of pack and unpack for target_rr_divider.
--v2:
- Set Target Refresh Rate Divider bit when related
AS SDP bit is set (Ankit).
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
.
- Set cmrr.enable with a separate patch at last.
Mitul Golani (8):
drm/i915: Define and compute Transcoder CMRR registers
drm/i915: Update trans_vrr_ctl flag when cmrr is computed
drm/i915: Compute CMRR and calculate vtotal
Add refresh rate divider to struct representing AS SDP
drm/i915
-v4:
- Removing RFC tag.
--v5:
- CMRR handling in co-existatnce of LRR and DRRS.
--v7:
- Rebase on top of AS SDP merge.
--v8:
- Remove cmrr_enabling/disabling and update commit message. (Ankit)
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 11 ---
1 file changed
on register offset. [Jani]
--v3:
- Removing RFC tag.
--v4:
- Update place holder for CMRR register definition. (Jani)
--v5:
- Add CMRR register definitions to a separate file intel_vrr_reg.h.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 23
scanline precision.
--v6:
- Make CMRR a small subset of FAVT mode.
--v7:
- Update commit message to avoid confusion with Legacy VRR (Ankit).
- Add cmrr.enable in last, so remove from this patch.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
.../drm/i915
Add target_rr_divider to structure representing AS SDP.
It is valid only in FAVT mode, sink device ignores the bit in AVT
mode.
Signed-off-by: Mitul Golani
Reviewed-by: Arun R Murthy
---
include/drm/display/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/display
Compute vrr vsync params in case of FAVT as well instead of
only to AVT mode of operation.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_vrr.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915
Compute params for Adaptive Sync SDP when Fixed Average Vtotal
mode is enabled.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu
Add target_rr_divider to structure representing AS SDP.
It is valid only in FAVT mode, sink device ignores the bit in AVT
mode.
Signed-off-by: Mitul Golani
---
include/drm/display/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/display/drm_dp_helper.h
b/include
Add support of pack and unpack for target_rr_divider.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index
]
--v3:
- Check pipe active state in cmrr disabling.[Jani]
- Correct messed up condition in intel_vrr_enable. [Jani]
--v4:
- Removing RFC tag.
--v5:
- CMRR handling in co-existatnce of LRR and DRRS.
--v7:
- Rebase on top of AS SDP merge.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915
precision.
--v6:
- Make CMRR a small subset of FAVT mode.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 99 ---
3 files changed, 89
on register offset. [Jani]
--v3:
- Removing RFC tag.
--v4:
- Update place holder for CMRR register definition. (Jani)
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 23 ++-
.../drm/i915/display/intel_display_types.h| 6 +
drivers/gpu/drm
).
- Make CMRR as subset of FAVT, as per comments in patch#3.
Mitul Golani (7):
drm/i915: Define and compute Transcoder CMRR registers
drm/i915: Add Enable/Disable for CMRR based on VRR state
drm/i915: Compute CMRR and calculate vtotal
Add refresh rate divider to struct representing AS SDP
drm
as suggestion from ville.
--v5:
- Correct vtotal paramas accuracy and add 2 digit precision.
- Avoid using DIV_ROUND_UP and improve scanline precision.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
.../drm/i915/display/intel_display_device.h | 1 +
drivers
]
--v3:
- Check pipe active state in cmrr disabling.[Jani]
- Correct messed up condition in intel_vrr_enable. [Jani]
--v4:
- Removing RFC tag.
--v5:
- CMRR handling in co-existatnce of LRR and DRRS.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 37
on register offset. [Jani]
--v3:
- Removing RFC tag.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 23 ++-
.../drm/i915/display/intel_display_types.h| 6 +
drivers/gpu/drm/i915/display/intel_vrr.c | 22 ++
drivers
and DRRS
- Correct vtotal paramas accuracy and add 2 digit precision.
--v7:
- Rebased patches in-accordance to AS SDP merge.
- Add neccessary gaurd to prevent crtc_state mismatch
during intel_vrr_get_config.
Mitul Golani (3):
drm/i915: Define and compute Transcoder CMRR registers
drm/i915
Correct struct member name to 'mode' instead of 'operation mode'
in 'drm_dp_as_sdp' structure description.
Fixes: 0bbb8f594e33 ("drm/dp: Add Adaptive Sync SDP logging")
Cc: Mitul Golani
Cc: Ankit Nautiyal
Cc: Jani Nikula
Signed-off-by: Mitul Golani
---
include/drm/display/drm_dp_he
Add read/write calls for Adaptive Sync SDP.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
--v5:
- Send AS SDP only when VRR is enabled.
--v6:
- Add TRANS_VRR_VSYNC befor enabling VRR as per bspec. (Ankit)
Signed-off-by: Mitul Golani
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
--v9:
- Add vrr.enable instead of is_in_vrr_range.
--v10:
- remove vrefresh and connector, as they are no longer required.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file chan
sdp->target_rr & 0xFF.
- Shift by 8 instead of 32, and drop casting to u64.
- Remove changes which are does not belong to this patch.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
--v1:
- Rebase Patches to latest.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
drivers/gpu/drm/i915/display
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
--v7:
- Add drm/i915/display in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/display
longer required.
- Use VRR_SYNC_START/END macros correctly.
- Update commit message for Patch#9
--v17:
- Relocate vrr vsync params.
--v18:
- Rebase to drm-tip.
Signed-off-by: Mitul Golani
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
sdp->target_rr & 0xFF.
- Shift by 8 instead of 32, and drop casting to u64.
- Remove changes which are does not belong to this patch.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
--v9:
- Add vrr.enable instead of is_in_vrr_range.
--v10:
- remove vrefresh and connector, as they are no longer required.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file chan
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2
Add read/write calls for Adaptive Sync SDP.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
--v5:
- Send AS SDP only when VRR is enabled.
--v6:
- Add TRANS_VRR_VSYNC befor enabling VRR as per bspec. (Ankit)
Signed-off-by: Mitul Golani
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 25
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
--v1:
- Rebase Patches to latest.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
drivers/gpu/drm/i915/display
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
--v7:
- Add drm/i915/display in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include
longer required.
- Use VRR_SYNC_START/END macros correctly.
- Update commit message for Patch#9
--v17:
- Relocate vrr vsync params.
--v18:
- Rebase to latest tip.
Signed-off-by: Mitul Golani
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
--v5:
- Send AS SDP only when VRR is enabled.
--v6:
- Add TRANS_VRR_VSYNC befor enabling VRR as per bspec. (Ankit)
Signed-off-by: Mitul Golani
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
--v1:
- Rebase Patches to latest.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 +++
drivers/gpu/drm/i915/display
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
--v5:
- Send AS SDP only when VRR is enabled.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers
Add read/write calls for Adaptive Sync SDP.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file chan
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
--v9:
- Add vrr.enable instead of is_in_vrr_range.
--v10:
- remove vrefresh and connector, as they are no longer required.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
sdp->target_rr & 0xFF.
- Shift by 8 instead of 32, and drop casting to u64.
- Remove changes which are does not belong to this patch.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
--v7:
- Add drm/i915/display in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
2 files
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 25
longer required.
- Use VRR_SYNC_START/END macros correctly.
- Update commit message for Patch#9
--v17:
- Relocate vrr vsync params.
Signed-off-by: Mitul Golani
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
drm/i915/display: Add crtc s
Add read/write calls for Adaptive Sync SDP.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
--v4:
- Use VRR_SYNC_START/END macros correctly.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file chan
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
--v9:
- Add vrr.enable instead of is_in_vrr_range.
--v10:
- remove vrefresh and connector, as they are no longer required.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2
sdp->target_rr & 0xFF.
- Shift by 8 instead of 32, and drop casting to u64.
- Remove changes which are does not belong to this patch.
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 92 +++
drive
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
2 files
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 25
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
--v7:
- Add drm/i915/display in subject line.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include
longer required.
- Use VRR_SYNC_START/END macros correctly.
- Update commit message for Patch#9
Signed-off-by: Mitul Golani
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
drm/i915/display: Add crtc state dump for Adaptive Sync SDP
drm/i
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file changed, 46 insertions(+)
diff --
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 29
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
--v9:
- Add vrr.enable instead of is_in_vrr_range.
Signed-off-by: Mitul Golani
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 26 +
1 file changed, 26 insertions
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2 files changed, 9 insertions
if AS_SDP bit is set in crtc_state->infoframes.enable. If not
return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
--v6:
- Rename intel_read_dp_infoframe_as_sdp to intel_read_dp_as_sdp.
-
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_devic
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include/drm/display/drm_dp.h| 10 +
include/drm/display
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
Signed-off-by: Mitul Golani
---
.../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
2 files changed, 14 insertions
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/display/drm_dp_helper.c | 25 +
include/drm/display
compute config.
Signed-off-by: Mitul Golani
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
drm: Add crtc state dump for Adaptive Sync SDP
drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
drm/i915/dp: Add wrapper fu
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file changed, 46 insertions(+)
diff --
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 26 +
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2 files changed, 9 insertions
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 29
:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include/drm/display/drm_dp.h| 10 +
include/drm/display
if AS_SDP bit is set in crtc_state->infoframes.enable. If not
return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c |
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
Signed-off-by: Mitul Golani
---
.../gpu/drm/i915/display/intel_crtc_state_dump.c| 13 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
2 files changed, 14 insertions
rtc_state->infoframes.enable, to add on correct place holder.
--v14: Mistakenly dropped first patch, adding back.
Signed-off-by: Mitul Golani i
Mitul Golani (9):
drm/dp: Add support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
drm: Add crtc state dump for Adaptive Sy
Add an API that indicates support for Adaptive Sync SDP in
the sink, which can be utilized by the rest of the DP programming.
--v1:
- Format commit message properly.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/display/drm_dp_helper.c | 25 +
include/drm/display
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
2 files changed, 2 insertions(+)
diff
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
--v1:
- crtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 46
1 file changed, 46 insertions(+)
diff --
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 29
if AS_SDP bit is set in crtc_state->infoframes.enable. If not
return.
- Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask.
Signed-off-by: Mitul Golani
---
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c |
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
--v1:
Just use drm/i915/dp in subject line.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2 files changed, 9 insertions
conn_state from intel_dp_compute_as_sdp, as not used.
- Remove fullstop in subject line.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_dp.c | 26 +
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915
Add crtc state dump for Adaptive Sync SDP to know which
crtc specifically caused the failure.
--v2:
- Add correct place holder and name change for AS_SDP_OP_MODE.
- Separate i915 changes from drm changes.
- Remove extra lines.
Signed-off-by: Mitul Golani
---
.../gpu/drm/i915/display
-by: Mitul Golani
---
drivers/gpu/drm/display/drm_dp_helper.c | 12 ++
include/drm/display/drm_dp.h| 10 +
include/drm/display/drm_dp_helper.h | 29 +
3 files changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b
rtc_state->infoframes.enable, to add on correct place holder.
Signed-off-by: Mitul Golani
Mitul Golani (8):
drm: Add Adaptive Sync SDP logging
drm: Add crtc state dump for Adaptive Sync SDP
drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
drm/i915/dp: Add wrapper function to check
Enable infoframe and add state checker for Adaptive Sync
SDP enablement.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 46
drivers/gpu/drm/i915/display/intel_dp.c | 2 +
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm
check before reading AS SDP.
--v6:
- Used Adaptive Sync sink status as a check for read/write SDP. (Ankit)
--v7:
- Remove as_sdp_enable from crtc_state.
- Add a comment mentioning current support of
DP_AS_SDP_AVT_FIXED_VTOTAL.
- Add state checker for AS_SDP infoframe enable.
Signed-off-by: Mitul
Write/Read Adaptive sync SDP only when Sink and Source is enabled
for the same. Also along with write TRANS_VRR_VSYNC values.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4
drivers/gpu/drm/i915/display/intel_dp.c | 4
drivers/gpu/drm/i915/display
(vrr.vsync_start/end).
- Read/write vrr_vsync params only when we intend to send
adaptive_sync sdp.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 25
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 8
drivers/gpu/drm/i915/display/intel_dp.h
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