Re: [PATCH] drm/i915: Don't enable hwmon for selftests

2024-04-10 Thread Nilawar, Badal
On 10-04-2024 11:35, Ashutosh Dixit wrote: There are no hwmon selftests so there is no need to enable hwmon for selftests. So enable hwmon only for real driver load. v2: Move the logic inside i915_hwmon.c v3: Move is_i915_selftest definition to i915_selftest.h (Badal) Closes:

Re: [PATCH] drm/i915: Don't enable hwmon for selftests

2024-04-09 Thread Nilawar, Badal
On 10-04-2024 10:28, Ashutosh Dixit wrote: There are no hwmon selftests so there is no need to enable hwmon for selftests. So enable hwmon only for real driver load. v2: Move the logic inside i915_hwmon.c Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10366 Signed-off-by:

Re: [PATCH] drm/i915: Don't enable hwmon for selftests

2024-04-09 Thread Nilawar, Badal
On 10-04-2024 09:58, Ashutosh Dixit wrote: There are no hwmon selftests so there is no need to enable hwmon for selftests. So enable hwmon only for real driver load. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10366 Signed-off-by: Ashutosh Dixit LGTM. Reviewed-by: Badal

Re: [PATCH] drm/i915/hwmon: Remove i915_hwmon_unregister() during driver unbind

2024-03-26 Thread Nilawar, Badal
On 27-03-2024 02:58, Krzysztofik, Janusz wrote: On Tuesday, 26 March 2024 13:48:38 CET Badal Nilawar wrote: i915_hwmon and its resources are managed resources of i915 dev. During i915 driver unregister flow the function i915_hwmon_unregister() explicitly makes i915_hwmon resource NULL. This

Re: [PATCH v3 3/3] drm/i915/guc: Enable Wa_14019159160

2024-02-26 Thread Nilawar, Badal
Hi John, On 04-01-2024 23:35, john.c.harri...@intel.com wrote: From: John Harrison Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a super-set of Wa_16019325821, so requires turning that one as well as setting the new flag for Wa_14019159160 itself. Signed-off-by: John

Re: [PATCH] drm/xe/guc: Enable WA 14018913170

2024-01-16 Thread Nilawar, Badal
Please post this patch to intel xe mailing list. Regards, Badal On 16-01-2024 13:18, Karthik Poosa wrote: The GuC handles the WA, the KMD just needs to set the flag to enable it on the appropriate platforms. v2: Fixed CI checkpatch warning, alignment should match open parenthesis.

Re: [PATCH] drm/xe: Add wait for completion after gt force reset

2023-12-14 Thread Nilawar, Badal
I think title should be make sysfs gt force reset synchronous. On 14-12-2023 15:36, Karthik Poosa wrote: Wait for gt reset to complete before returning from force_reset sysfs call. Without this igt test freq_reset_multiple fails sporadically in case xe_guc_pc is not started. Testcase:

Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Fix static analysis tool errors in i915 hwmon

2023-12-01 Thread Nilawar, Badal
Hi Karthik, On 01-12-2023 10:28, Karthik Poosa wrote: Updated i915 hwmon with fixes for issues reported by static analysis tool. Fixed unintentional buffer overflow (OVERFLOW_BEFORE_WIDEN) with upcasting. v2: Updated commit message with details of issue [Jani]. Please add fixes tag. Fixes:

Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915/mtl: Add Wa_14017073508 for SAMedia"

2023-03-08 Thread Nilawar, Badal
On 08-03-2023 20:55, Nilawar, Badal wrote: Hi Jani, On 08-03-2023 16:48, Jani Nikula wrote: On Wed, 08 Mar 2023, Badal Nilawar wrote: This reverts commit 8f70f1ec587da0b0d52d768fd8c3defbc5e5b55c. Reverts need a commit message too. The why. The cover letter is not recorded in git history

Re: [Intel-gfx] [PATCH 1/2] Revert "drm/i915/mtl: Add Wa_14017073508 for SAMedia"

2023-03-08 Thread Nilawar, Badal
Hi Jani, On 08-03-2023 16:48, Jani Nikula wrote: On Wed, 08 Mar 2023, Badal Nilawar wrote: This reverts commit 8f70f1ec587da0b0d52d768fd8c3defbc5e5b55c. Reverts need a commit message too. The why. The cover letter is not recorded in git history. I will add commit message. Regards, Badal

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Disable MC6 for MTL A step

2023-03-08 Thread Nilawar, Badal
Hi Rodrigo, On 08-03-2023 18:59, Rodrigo Vivi wrote: On Wed, Mar 08, 2023 at 03:51:09PM +0530, Badal Nilawar wrote: The Wa_14017073508 require to send Media Busy/Idle mailbox while accessing Media tile. As of now it is getting handled while __gt_unpark, __gt_park. But there are various

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Extend Wa_14017073508 in suspend/resume flow

2023-03-07 Thread Nilawar, Badal
On 07-03-2023 01:50, Rodrigo Vivi wrote: On Mon, Mar 06, 2023 at 08:33:04AM +, Gupta, Anshuman wrote: -Original Message- From: Nilawar, Badal Sent: Saturday, March 4, 2023 9:48 PM To: intel-gfx@lists.freedesktop.org Cc: Gupta, Anshuman ; Ewins, Jon ; Belgaumkar, Vinay ; Vivi

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftest: Fix engine timestamp and ktime disparity

2023-03-01 Thread Nilawar, Badal
LGTM Reviewed-by: Badal Nilawar On 23-02-2023 15:35, Anshuman Gupta wrote: While reading the engine timestamps there can be uncontrollable concurrent mmio access via other i915 child drivers and by GuC, which is not truly atomic context as expected by this selftest, which may cause mmio

Re: [Intel-gfx] [PATCH 2/2] drm/i915/selftest: Fix ktime_get() and h/w access order

2023-03-01 Thread Nilawar, Badal
LGTM Reviewed-by: Badal Nilawar On 23-02-2023 15:35, Anshuman Gupta wrote: Use ktime_get() after accessing the mmio or any driver resource, while using wall time for various calculation that depends on the inserted delay in order to account any mmio and resource access latency. Cc: Chris

Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Accept writes of value 0 to power1_max_interval

2023-03-01 Thread Nilawar, Badal
On 28-02-2023 10:13, Ashutosh Dixit wrote: The value shown by power1_max_interval in millisec is essentially: ((1.x * power(2,y)) * 1000) >> 10 Where x and y are read from a HW register. On ATSM, x and y are 0 on power-up so the value shown is 0. Writes of 0 to power1_max_interval

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Apply Wa_14017073508 for MTL SoC Step

2023-02-28 Thread Nilawar, Badal
Hi Matt, On 24-02-2023 02:43, Matt Roper wrote: On Thu, Feb 23, 2023 at 03:20:28PM -0500, Rodrigo Vivi wrote: On Fri, Feb 24, 2023 at 12:11:40AM +0530, Badal Nilawar wrote: Apply Wa_14017073508 for MTL SoC die A step instead of graphics step. To get the SoC die stepping there is no direct

Re: [Intel-gfx] [PATCH v3] drm/i915/mtl: Enable Idle Messaging for GSC CS

2022-11-18 Thread Nilawar, Badal
On 19-11-2022 00:07, Vivi, Rodrigo wrote: On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote: From: Vinay Belgaumkar By defaut idle messaging is disabled for GSC CS so to unblock RC6 entry on media tile idle messaging need to be enabled. v2:  - Fix review comments (Vinay)  - Set GSC

Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS

2022-11-17 Thread Nilawar, Badal
On 18-11-2022 03:44, Rodrigo Vivi wrote: On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: From: Vinay Belgaumkar By defaut idle mesaging is disabled for GSC CS so to unblock RC6 entry on media tile idle messaging need to be enabled. v2: - Fix review comments (Vinay) -

Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS

2022-11-16 Thread Nilawar, Badal
Hi Rodrigo, On 15-11-2022 20:57, Rodrigo Vivi wrote: On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: From: Vinay Belgaumkar By defaut idle mesaging is disabled for GSC CS so to unblock RC6 entry on media tile idle messaging need to be enabled. v2: - Fix review comments

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add MC6 Wa_14017210380 for SAMedia

2022-11-01 Thread Nilawar, Badal
Hi Matt, On 01-11-2022 20:47, Matt Roper wrote: On Sat, Oct 29, 2022 at 12:59:35AM +0530, Badal Nilawar wrote: This workaround is added for Media Tile of MTL A step. It is to help pcode workaround which handles the hardware bug seen on CXL splitter during package C2/C3 transitins due to MC6

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add MC6 Wa_14017210380 for SAMedia

2022-10-31 Thread Nilawar, Badal
Hi Rodrigo, On 31-10-2022 15:19, Rodrigo Vivi wrote: On Sat, Oct 29, 2022 at 12:59:35AM +0530, Badal Nilawar wrote: This workaround is added for Media Tile of MTL A step. It is to help pcode workaround which handles the hardware bug seen on CXL splitter during package C2/C3 transitins due to

Re: [Intel-gfx] [PATCH 0/7] Add HWMON support

2022-09-26 Thread Nilawar, Badal
On 27-09-2022 02:39, Guenter Roeck wrote: On 9/26/22 10:52, Badal Nilawar wrote: This series adds the HWMON support for DGFX Test-with: 20220919144408.251981-1-riana.ta...@intel.com v2:    - Reorganized series. Created first patch as infrastructure patch followed by feature patches.

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-09-21 Thread Nilawar, Badal
On 21-09-2022 18:14, Andi Shyti wrote: Hi Badal, +struct hwm_reg { +}; + +struct hwm_drvdata { + struct i915_hwmon *hwmon; + struct intel_uncore *uncore; + struct device *hwmon_dev; + char name[12]; +}; + +struct i915_hwmon { + struct hwm_drvdata ddat; +

Re: [Intel-gfx] [PATCH 3/7] drm/i915/hwmon: Power PL1 limit and TDP setting

2022-09-21 Thread Nilawar, Badal
On 21-09-2022 17:15, Gupta, Anshuman wrote: On 9/16/2022 8:30 PM, Badal Nilawar wrote: From: Dale B Stimson Use i915 HWMON to display/modify dGfx power PL1 limit and TDP setting. v2:    - Fix review comments (Ashutosh)    - Do not restore power1_max upon module unload/load sequence

Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Modify CAGF functions for MTL

2022-09-19 Thread Nilawar, Badal
On 19-09-2022 22:19, Andi Shyti wrote: Hi Badal, On Mon, Sep 19, 2022 at 05:29:05PM +0530, Badal Nilawar wrote: Updated the CAGF functions to get actual resolved frequency of 3D and SAMedia can you please use the imperative form? "Update" and not "Updated". Ok. Besides I don't really

Re: [Intel-gfx] [PATCH 0/7] drm/i915: Add HWMON support

2022-09-19 Thread Nilawar, Badal
On 19-09-2022 15:45, Gupta, Anshuman wrote: -Original Message- From: Nilawar, Badal Sent: Friday, September 16, 2022 8:31 PM To: intel-gfx@lists.freedesktop.org Cc: Dixit, Ashutosh ; Tauro, Riana ; Gupta, Anshuman ; Ewins, Jon ; linux-hw...@vger.kernel.org; dri- de

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add HWMON support (rev6)

2022-09-19 Thread Nilawar, Badal
Quoting lakshminarayana.vu...@intel.com On 16-09-2022 23:29, Patchwork wrote: *Patch Details* *Series:* drm/i915: Add HWMON support (rev6) *URL:* https://patchwork.freedesktop.org/series/104278/ *State:*failure *Details:*

Re: [Intel-gfx] [PATCH 2/7] drm/i915/hwmon: Add HWMON current voltage support

2022-09-15 Thread Nilawar, Badal
On 29-08-2022 23:00, Dixit, Ashutosh wrote: On Thu, 25 Aug 2022 06:21:13 -0700, Badal Nilawar wrote: From: Riana Tauro Use i915 HWMON subsystem to display current input voltage. A couple of suggestions to improve comments in this patch below and after addressing those this patch is:

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Use GEN12 RPSTAT register

2022-09-14 Thread Nilawar, Badal
On 13-09-2022 13:17, Tvrtko Ursulin wrote: On 13/09/2022 01:09, Dixit, Ashutosh wrote: On Mon, 12 Sep 2022 04:29:38 -0700, Nilawar, Badal wrote: diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 958b37123bf1..a24704ec2c18 100644 --- a/drivers/gpu/drm

Re: [Intel-gfx] [PATCH 0/6] i915: CAGF and RC6 changes for MTL

2022-09-12 Thread Nilawar, Badal
I added Cc: in individual patches. So I thought it will pick automatically. But anyway I have to fix some of the comments. So I will fix those and resend the series. I will Cc relevant people. Regards, Badal On 12-09-2022 17:37, Jani Nikula wrote: On Mon, 12 Sep 2022, Andi Shyti wrote: Hi

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Use GEN12 RPSTAT register

2022-09-12 Thread Nilawar, Badal
On 10-09-2022 07:19, Dixit, Ashutosh wrote: On Thu, 08 Sep 2022 19:56:44 -0700, Badal Nilawar wrote: From: Don Hiatt On GEN12, use the correct GEN12 RPSTAT register mask/shift. HSD: 1409538411 I think let's remove this. Sure. Cc: Don Hiatt Cc: Andi Shyti Signed-off-by: Don Hiatt

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-25 Thread Nilawar, Badal
On 23-08-2022 20:11, Jani Nikula wrote: On Tue, 23 Aug 2022, "Nilawar, Badal" wrote: On 23-08-2022 19:05, Jani Nikula wrote: On Tue, 23 Aug 2022, Guenter Roeck wrote: On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: [ ... ] So why not do this in i915 Kconfi

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Nilawar, Badal
On 23-08-2022 19:05, Jani Nikula wrote: On Tue, 23 Aug 2022, Guenter Roeck wrote: On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: [ ... ] So why not do this in i915 Kconfig: config DRM_I915 ... depends on HWMON || HWMON=n With this change I am getting

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Nilawar, Badal
On 19-08-2022 16:05, Jani Nikula wrote: On Fri, 19 Aug 2022, Badal Nilawar wrote: From: Dale B Stimson The i915 HWMON module will be used to expose voltage, power and energy values for dGfx. Here we set up i915 hwmon infrastructure including i915 hwmon registration, basic data structures

Re: [Intel-gfx] [PATCH] drm/i915/dgfx: Disable d3cold Correctly

2022-06-13 Thread Nilawar, Badal
On 06-06-2022 17:56, Anshuman Gupta wrote: Currently i915 disables d3cold for i915 pci dev. This blocks D3 for i915 gfx pci upstream bridge (VSP). Let's disable d3cold at gfx root port to make sure that i915 gfx VSP can transition to D3 to save some power. Fixes: 1a085e23411d ("drm/i915:

Re: [Intel-gfx] [RFC] drm/i915/rc6: Access RC6 regs with forcewake

2022-04-24 Thread Nilawar, Badal
On 22-04-2022 21:04, Matt Roper wrote: On Fri, Apr 22, 2022 at 07:07:52PM +0530, Badal Nilawar wrote: To access RC6 related MMIO regs use intel_uncore_write(), which grabs forcewake if reg requires a forcewake. Signed-off-by: Badal Nilawar --- drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-

Re: [Intel-gfx] [PATCH] drm/i915/debugfs: Dump i915 children runtime status

2022-03-29 Thread Nilawar, Badal
On 28-03-2022 15:52, Anshuman Gupta wrote: i915 doesn't use pm_suspend_ignore_children() which warrants that any runtime active child of i915 will block the runtime suspend of i915. i915_runtime_pm_status only exposes i915 runtime pm usage_count, which is not sufficient to debug in the

Re: [Intel-gfx] [PATCH] drm/i915/rps: Centralize computation of freq caps

2022-03-28 Thread Nilawar, Badal
On 24-03-2022 01:24, Ashutosh Dixit wrote: Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the formats (bit positions, widths, registers and units) of these vary for different generations with even more variations arriving in the future. In order not to have to do

Re: [Intel-gfx] [PATCH] drm/i915/rps: Centralize computation of freq caps

2022-03-23 Thread Nilawar, Badal
On 23-03-2022 00:26, Ashutosh Dixit wrote: Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the formats (bit positions, widths, registers and units) of these vary for different generations with even more variations arriving in the future. In order not to have to do

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Drop redundant IS_VALLEYVIEW check in __get_rc6()

2022-03-13 Thread Nilawar, Badal
On 12-03-2022 01:30, Ashutosh Dixit wrote: Because VLV_GT_RENDER_RC6 == GEN6_GT_GFX_RC6, the IS_VALLEYVIEW() check is not needed. Neither is the check present in other code paths which call intel_rc6_residency_ns() (in functions gen6_drpc(), rc6_residency() and rc6_residency_ms_show()).

Re: [Intel-gfx] [PATCH] i915/selftest: Disable irq to calc eng timestamp

2021-11-09 Thread Nilawar, Badal
A couple of comments below, after addressing those this is: Reviewed-by: Badal Nilawar On 26-10-2021 19:10, Anshuman Gupta wrote: gt_pm selftest calculates engine ticks cycles and wall time cycles by delta of respective engine elapsed TIMESTAMP and ktime for period of 1000us. It compares the

Re: [Intel-gfx] [PATCH 3/3] drm/i915/guc/slpc: Update boost sysfs hooks for SLPC

2021-10-21 Thread Nilawar, Badal
Please fix code style related warnings and errors from checkpatch result. On 21-10-2021 01:22, Vinay Belgaumkar wrote: Add a helper to sort through the SLPC/RPS cases of get/set methods. Boost frequency will be modified as long as it is within the constraints of RP0 and if it is different from