[Intel-gfx] Connectivity issue to the CI system

2020-06-29 Thread Peres, Martin
Hi everyone, We have been experiencing connectivity issue for the past week to the CI system which led to abnormal CI latencies: https://intel-gfx-ci.01.org/latency.html?project=igt=Fi.CI.IGT The issue has been under investigation, but unfortunately we do not know when this issue will get

Re: [Intel-gfx] [CI] Pre-merge testing disabled

2020-06-17 Thread Peres, Martin
On 2020-06-16 12:37, Peres, Martin wrote: > Hello world, > > Due to changes in our global data policy rules, the bucket used to store > the CI results became private, which prevents us from providing any > testing result. > > We have received a notice on Sunday about this

[Intel-gfx] [CI] Pre-merge testing disabled

2020-06-16 Thread Peres, Martin
Hello world, Due to changes in our global data policy rules, the bucket used to store the CI results became private, which prevents us from providing any testing result. We have received a notice on Sunday about this change, notified them on Monday that we wanted to keep our storage public and

Re: [Intel-gfx] [PATCH i-g-t] intel-ci: Drop gem_exec_suspend@basic-S4-device from BAT

2020-04-09 Thread Peres, Martin
On 2020-04-08 17:19, Chris Wilson wrote: > S4-devices is a debug only path, and while it can prove informative as > to the nature of suspend issues, being a debug only path it is not so > relevant towards the driver health. Relegate it to the shards and idle > runs, so we can shave 20s off BAT. >

Re: [Intel-gfx] [PATCH i-g-t] tests/kms_plane_alpha_blend: Correct typo in the name and comments of a subtest

2020-03-31 Thread Peres, Martin
On 2020-03-31 12:43, Petri Latvala wrote: > On Mon, Mar 30, 2020 at 06:55:32PM -0300, Melissa Wen wrote: >> Typo found in word transparent. >> Correct the word transparant, replacing the last letter -a- with -e- >> (transpar-a-nt to transpar-e-nt). >> >> Signed-off-by: Melissa Wen > > >

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Adding YUV444 packed format support for skl+ (rev3)

2020-02-24 Thread Peres, Martin
+Lakshmi On 2020-02-24 11:20, Shankar, Uma wrote: > > >> -Original Message- >> From: Patchwork >> Sent: Saturday, February 22, 2020 12:30 AM >> To: Shankar, Uma >> Cc: intel-gfx@lists.freedesktop.org >> Subject: ✗ Fi.CI.IGT: failure for Adding YUV444 packed format support for >> skl+

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: Modeset only the tiled connectors with CRTC

2020-01-27 Thread Peres, Martin
On 28/01/2020 01:05, Navare, Manasi D wrote: > On Sat, Jan 25, 2020 at 01:31:06AM -0800, Saarinen, Jani wrote: >> + Martin to re-report. > > Could you re-report this so we get the full CI IGT results? Sorry, I had done the work but I re-reported the wrong run... Anyway, I queued the

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable second DBuf slice for ICL and TGL (rev21)

2020-01-27 Thread Peres, Martin
On 27/01/2020 09:48, Lisovskiy, Stanislav wrote: > Good morning :) > > > Yet another gem related issue not caused by this patch.. Thanks! Lakshmi reported the bug and I made the filing a little more generic and attached it to https://gitlab.freedesktop.org/drm/intel/issues/530. Thanks for

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable second DBuf slice for ICL and TGL (rev20)

2020-01-21 Thread Peres, Martin
Thanks for notifying us! Re-reporting queued. Martin On 21/01/2020 10:58, Lisovskiy, Stanislav wrote: > Looks, like needs one more bug to be reported, again some gem/gpu > related issue.. > > > Best Regards, > > Lisovskiy Stanislav > > Organization: Intel Finland Oy - BIC 0357606-4 -

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable second DBuf slice for ICL and TGL (rev17)

2020-01-17 Thread Peres, Martin
On 17/01/2020 12:43, Lisovskiy, Stanislav wrote: > Looks like gem issue, lots of warns - gpu has gone wild. > > Not related to DBuf for sure. Thanks, it has been re-reported! Sorry for the delay, Martin > > > Best Regards, > > Lisovskiy Stanislav > > Organization: Intel Finland Oy - BIC

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Bump up CDCLK to eliminate underruns on TGL (rev3)

2020-01-13 Thread Peres, Martin
On 13/01/2020 10:32, Lisovskiy, Stanislav wrote: > Yet again unrelated gem failure, do we have a bug about this? > https://bugs.freedesktop.org/show_bug.cgi?id=112271 > That CDCLK change is crucial to get in and has nothing to do with > gem tests, i.e can't anyhow affect the outcome. Btw,

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Refactor Gen11+ SAGV support (rev14)

2019-12-16 Thread Peres, Martin
On 16/12/2019 15:50, Vudum, Lakshminarayana wrote: > Stan, > spec@arb_gpu_shader5@texturegather@vs-rgba-3-float-cubearray is new test > which doesn't exist in CI bug log, so I can't do much here. > > @Latvala, Petri/@Peres, Martin How do we proceed with these kind of issu

Re: [Intel-gfx] [PATCH] drm/i915: Update bug URL to point at gitlab issues

2019-12-02 Thread Peres, Martin
On 02/12/2019 16:25, Chris Wilson wrote: > Quoting Jani Nikula (2019-12-02 11:36:01) >> On Mon, 02 Dec 2019, "Peres, Martin" wrote: >>> On 02/12/2019 12:30, Jani Nikula wrote: >>>> On Mon, 25 Nov 2019, Chris Wilson wrote: >>>>> We are movin

Re: [Intel-gfx] [PATCH] drm/i915: Update bug URL to point at gitlab issues

2019-12-02 Thread Peres, Martin
On 02/12/2019 12:30, Jani Nikula wrote: > On Mon, 25 Nov 2019, Chris Wilson wrote: >> We are moving our issue tracking over from bugs.fd.o to gitlab.fd.o, so >> update the user instructions accordingly. >> >> Signed-off-by: Chris Wilson >> Cc: Martin Peres >> Cc: Joonas Lahtinen >> Cc: Rodrigo

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for cdclk consolidation and rework for BXT-TGL (rev6)

2019-09-11 Thread Peres, Martin
On 11/09/2019 09:16, Saarinen, Jani wrote: > Hi, > > >> -Original Message- >> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf >> Of Matt >> Roper >> Sent: keskiviikko 11. syyskuuta 2019 6.43 >> To: intel-gfx@lists.freedesktop.org >> Subject: Re: [Intel-gfx] ✓

Re: [Intel-gfx] [PATCH v3 0/3] Send a hotplug when edid changes

2019-08-19 Thread Peres, Martin
On 19/08/2019 10:23, Lisovskiy, Stanislav wrote: > On Wed, 2019-08-07 at 23:07 +0200, Daniel Vetter wrote: >> On Wed, Aug 07, 2019 at 07:43:18AM +, Lisovskiy, Stanislav wrote: >>> On Tue, 2019-08-06 at 19:43 +0200, Daniel Vetter wrote: On Tue, Aug 6, 2019 at 4:06 PM Lisovskiy, Stanislav

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Extend BT2020 support in iCSC and fixes (rev5)

2019-07-01 Thread Peres, Martin
On 28/06/2019 18:06, Shankar, Uma wrote: > > >> -Original Message- >> From: Patchwork [mailto:patchw...@emeril.freedesktop.org] >> Sent: Friday, June 28, 2019 8:34 PM >> To: Shankar, Uma >> Cc: intel-gfx@lists.freedesktop.org >> Subject: ✗ Fi.CI.BAT: failure for Extend BT2020 support in

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable Multi-segmented-gamma for ICL (rev4)

2019-06-14 Thread Peres, Martin
to the crc > limitations (already in discussion with hardware design and validation team). > As discussed, > can we mark these as known issues and merge the multi segment gamma series. > > We will be tracking the hardware CRC issues separately and will work with > hardware design

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable Multi-segmented-gamma for ICL (rev4)

2019-06-12 Thread Peres, Martin
On 12/06/2019 15:05, Shankar, Uma wrote: > > >> -Original Message----- >> From: Peres, Martin >> Sent: Wednesday, June 12, 2019 3:51 PM >> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org >> Cc: Sharma, Shashank >> Subject: Re: [Intel-gfx]

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable Multi-segmented-gamma for ICL (rev4)

2019-06-12 Thread Peres, Martin
On 12/06/2019 11:58, Shankar, Uma wrote: > > >> -Original Message- >> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of >> Patchwork >> Sent: Wednesday, June 12, 2019 12:27 PM >> To: Sharma, Shashank >> Cc: intel-gfx@lists.freedesktop.org >> Subject:

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Add HDR Metadata Parsing and handling in DRM layer (rev10)

2019-05-17 Thread Peres, Martin
On 17/05/2019 16:04, Ville Syrjälä wrote: > On Thu, May 16, 2019 at 01:18:15PM +, Shankar, Uma wrote: >> >> > -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Thursday, May 16, 2019 1:02 AM > To: Shankar, Uma > Cc:

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gen11: enable support for headerless msgs (rev4)

2019-05-08 Thread Peres, Martin
On 06/05/2019 23:30, Kim, Dongwon wrote: > This doesn't seem to be a valid failure. I just reran the test using > trybot and there were no failures. > > https://lists.freedesktop.org/archives/intel-gfx-trybot/2019-May/071989.html I reported this bug two days ago and added it to cibuglog, this is

Re: [Intel-gfx] [PATCH v2] drm/i915: Corrupt DSI picture fix for GeminiLake

2019-04-30 Thread Peres, Martin
On 30/04/2019 11:01, Lisovskiy, Stanislav wrote: > On Tue, 2019-04-30 at 10:43 +0300, Jani Nikula wrote: >> On Tue, 30 Apr 2019, Stanislav Lisovskiy < >> stanislav.lisovs...@intel.com> wrote: >>> Currently due to regression CI machine >>> displays show corrupt picture. >>> Problem is when CDCLK is

Re: [Intel-gfx] [PATCH v2] Core-for-CI:ICL_only Disable ACPI idle driver

2019-04-10 Thread Peres, Martin
On 09/04/2019 18:49, Wysocki, Rafael J wrote: > On 4/9/2019 8:29 AM, Anshuman Gupta wrote: >> There were few system hung observed while running i915_pm_rpm igt test. >> FDO https://bugs.freedesktop.org/show_bug.cgi?id=108840 >> Root cause is believed to due to page fault in ACPI idle driver. >>

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Get pipe id following atomic guidelines (rev2)

2018-12-04 Thread Peres, Martin
On 03/12/2018 22:55, Vivi, Rodrigo wrote: > On Mon, Dec 03, 2018 at 04:29:17AM -0800, Peres, Martin wrote: >> On 30/11/2018 19:27, Vivi, Rodrigo wrote: >>> On Fri, Nov 30, 2018 at 03:04:40PM +0200, Martin Peres wrote: >>>> >>>> >>>> On 29/1

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Get pipe id following atomic guidelines (rev2)

2018-12-03 Thread Peres, Martin
On 30/11/2018 19:27, Vivi, Rodrigo wrote: > On Fri, Nov 30, 2018 at 03:04:40PM +0200, Martin Peres wrote: >> >> >> On 29/11/2018 19:36, Rodrigo Vivi wrote: >>> On Wed, Nov 28, 2018 at 11:52:49PM -0800, Saarinen, Jani wrote: Hi, > -Original Message- > From: Intel-gfx

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/ddi: Add more sanity check to the encoder HW readout

2018-11-09 Thread Peres, Martin
On 09/11/2018 14:40, Deak, Imre wrote: > On Wed, Nov 07, 2018 at 08:39:24PM +, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [1/2] drm/i915/ddi: Add more sanity check to >> the encoder HW readout >> URL : https://patchwork.freedesktop.org/series/52187/ >> State