[Intel-gfx] [PATCH v6 10/11] drm/i915: Add more Haswell OA metric sets

2016-10-20 Thread Robert Bragg
s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 559 - 1 file changed, 558 insertions(+), 1

[Intel-gfx] [PATCH v6 05/11] drm/i915: Add 'render basic' Haswell OA unit config

2016-10-20 Thread Robert Bragg
ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v6 01/11] drm/i915: Add i915 perf infrastructure

2016-10-20 Thread Robert Bragg
attempt to open a stream will return an error. v4: s/DRM_IORW/DRM_IOW/ - Emil Velikov v3: update read() interface to avoid passing state struct - Chris Wilson fix some rebase fallout, with i915-perf init/deinit v2: use i915_gem_context_get() - Chris Wilson Signed-off-by: Robert Bragg

[Intel-gfx] [PATCH v6 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-10-20 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> Reviewed-by: Matthew Auld <matthew.a...@intel.com> --- drivers/gpu/drm/i915/gv

[Intel-gfx] [PATCH v6 04/11] drm/i915: don't whitelist oacontrol in cmd parser

2016-10-20 Thread Robert Bragg
running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 38 ++ 1 file chan

[Intel-gfx] [PATCH v6 03/11] drm/i915: return EACCES for check_cmd() failures

2016-10-20 Thread Robert Bragg
is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. This bumps the command parser version from 7 to 8, as the change is visible to userspace. Signed-off-by: Robert Bragg <rob...@sixbynine.

Re: [Intel-gfx] [PATCH] drm/i915: Add i915 perf infrastructure

2016-10-19 Thread Robert Bragg
On Wed, Oct 12, 2016 at 12:41 PM, Joonas Lahtinen < joonas.lahti...@linux.intel.com> wrote: > On ti, 2016-10-11 at 12:03 -0700, Robert Bragg wrote: > > > > + case DRM_I915_PERF_PROP_MAX: > > > > + BUG(); > > > >

Re: [Intel-gfx] [PATCH v5 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-10-11 Thread Robert Bragg
On Fri, Oct 7, 2016 at 10:19 AM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > On 14 September 2016 at 15:19, Robert Bragg <rob...@sixbynine.org> wrote: > > > diff --git a/drivers/gpu/drm/i915/i915_perf.c > b/drivers/gpu/drm/i915/i915_perf.c > &

Re: [Intel-gfx] [PATCH] drm/i915: Add i915 perf infrastructure

2016-10-11 Thread Robert Bragg
On Fri, Oct 7, 2016 at 10:10 AM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > On 14 September 2016 at 16:32, Robert Bragg <rob...@sixbynine.org> wrote: > > > + > > +int i915_perf_open_ioctl_locked(struct drm_device *dev, > > +

[Intel-gfx] [PATCH] drm/i915: Add i915 perf infrastructure

2016-09-14 Thread Robert Bragg
attempt to open a stream will return an error. v4: s/DRM_IORW/DRM_IOR/ - Emil Velikov v3: update read() interface to avoid passing state struct - Chris Wilson fix some rebase fallout, with i915-perf init/deinit v2: use i915_gem_context_get() - Chris Wilson Signed-off-by: Robert Bragg

Re: [Intel-gfx] [PATCH v5 01/11] drm/i915: Add i915 perf infrastructure

2016-09-14 Thread Robert Bragg
On Wed, Sep 14, 2016 at 3:42 PM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > Hi Robert, > > I think I've spotted one interesting, yet trivial bit. > > On 14 September 2016 at 15:19, Robert Bragg <rob...@sixbynine.org> wrote: > > Adds base i915 perf infrastru

[Intel-gfx] [PATCH v5 03/11] drm/i915: return EACCES for check_cmd() failures

2016-09-14 Thread Robert Bragg
is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- 1 file changed, 1 insertion

[Intel-gfx] [PATCH v5 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-09-14 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH v5 10/11] drm/i915: Add more Haswell OA metric sets

2016-09-14 Thread Robert Bragg
s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 559 - 1 file changed, 558 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v5 07/11] drm/i915: advertise available metrics via sysfs

2016-09-14 Thread Robert Bragg
and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v5 08/11] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-09-14 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v5 09/11] drm/i915: add oa_event_min_timer_exponent sysctl

2016-09-14 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v5 05/11] drm/i915: Add 'render basic' Haswell OA unit config

2016-09-14 Thread Robert Bragg
ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i915_oa_hsw.c | 143 + dri

[Intel-gfx] [PATCH v5 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

2016-09-14 Thread Robert Bragg
In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixb

[Intel-gfx] [PATCH v5 04/11] drm/i915: don't whitelist oacontrol in cmd parser

2016-09-14 Thread Robert Bragg
running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 38 ++ 1 file chan

[Intel-gfx] [PATCH v5 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-09-14 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v5 00/11] Enable i915 perf stream for Haswell OA unit

2016-09-14 Thread Robert Bragg
for this series at the moment is just keeping up with rebasing on nightlies. Regards, - Robert Robert Bragg (11): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: return EACCES for check_cmd() failures drm/i915: don't whitelist oacontrol in cmd parser

[Intel-gfx] [PATCH v5 01/11] drm/i915: Add i915 perf infrastructure

2016-09-14 Thread Robert Bragg
attempt to open a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_drv.c | 4 + drivers/gpu/drm/i915/i915_drv.h | 91 drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH v5 07/11] drm/i915: advertise available metrics via sysfs

2016-08-19 Thread Robert Bragg
and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v4 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

2016-08-18 Thread Robert Bragg
In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixb

[Intel-gfx] [PATCH v4 08/11] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-08-18 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v4 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-08-18 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH v4 07/11] drm/i915: advertise available metrics via sysfs

2016-08-18 Thread Robert Bragg
and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v4 03/11] drm/i915: return EACCES for check_cmd() failures

2016-08-18 Thread Robert Bragg
is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- 1 file changed, 1 insertion

[Intel-gfx] [PATCH v4 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-08-18 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v4 10/11] drm/i915: Add more Haswell OA metric sets

2016-08-18 Thread Robert Bragg
s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 484 - 1 file changed, 483 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v4 09/11] drm/i915: add oa_event_min_timer_exponent sysctl

2016-08-18 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v4 01/11] drm/i915: Add i915 perf infrastructure

2016-08-18 Thread Robert Bragg
attempt to open a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_drv.c | 4 + drivers/gpu/drm/i915/i915_drv.h | 91 drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH v4 05/11] drm/i915: Add 'render basic' Haswell OA unit config

2016-08-18 Thread Robert Bragg
ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i915_oa_hsw.c | 132 + dri

[Intel-gfx] [PATCH v4 00/11] Enable i915 perf stream for Haswell OA unit

2016-08-18 Thread Robert Bragg
d more fiddly error paths in the ->read implementations. The initialization code is now spit into an i915_perf_init() called in i915_driver_init_early() and an i915_perf_register() called in i915_driver_register() once we're visible to userspace, after sysfs has been initialized. - Robert Robert

[Intel-gfx] [PATCH v4 04/11] drm/i915: don't whitelist oacontrol in cmd parser

2016-08-18 Thread Robert Bragg
running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 38 ++ 1 file chan

Re: [Intel-gfx] [PATCH v3 03/11] drm/i915: return EACCES for check_cmd() failures

2016-08-18 Thread Robert Bragg
On Mon, Aug 15, 2016 at 4:04 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Mon, Aug 15, 2016 at 03:41:20PM +0100, Robert Bragg wrote: > > check_cmd() is checking whether a command adheres to certain > > restrictions that ensure it's safe to execute within a privil

Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Add i915 perf infrastructure

2016-08-16 Thread Robert Bragg
On Mon, Aug 15, 2016 at 3:57 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Mon, Aug 15, 2016 at 03:41:18PM +0100, Robert Bragg wrote: > > Adds base i915 perf infrastructure for Gen performance metrics. > > > > This adds a DRM_IOCTL_I915_PERF_OPEN ioctl th

[Intel-gfx] [PATCH v3 05/11] drm/i915: Add 'render basic' Haswell OA unit config

2016-08-15 Thread Robert Bragg
ake -C gputop-data -f Makefile.xml SYSFS=0 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h| 14 drivers/gpu/drm/i915/i915_oa_hsw.c | 132 + dri

[Intel-gfx] [PATCH v3 08/11] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-08-15 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v3 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-08-15 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH v3 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c

2016-08-15 Thread Robert Bragg
In particular this tries to capture for posterity some of the early challenges we had with using the core perf infrastructure in case we ever want to revisit adapting perf for device metrics. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by: Robert Bragg <rob...@sixb

[Intel-gfx] [PATCH v3 10/11] drm/i915: Add more Haswell OA metric sets

2016-08-15 Thread Robert Bragg
s/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 484 - 1 file changed, 483 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v3 04/11] drm/i915: don't whitelist oacontrol in cmd parser

2016-08-15 Thread Robert Bragg
running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 38 ++ 1 file chan

[Intel-gfx] [PATCH v3 00/11] Enable Gen 7 Observation Architecture

2016-08-15 Thread Robert Bragg
the description + normalization equation. Having the web UI hosted on github hopefully lowers the bar to trying it out since it avoids needing to set up Emscripten first as a build dependency. Regards, - Robert Robert Bragg (11): drm/i915: Add i915 perf infrastructure drm/i915: rename

[Intel-gfx] [PATCH v3 01/11] drm/i915: Add i915 perf infrastructure

2016-08-15 Thread Robert Bragg
attempt to open a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_drv.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 92 + drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH v3 03/11] drm/i915: return EACCES for check_cmd() failures

2016-08-15 Thread Robert Bragg
is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- 1 file changed, 1 insertion

[Intel-gfx] [PATCH v3 07/11] drm/i915: advertise available metrics via sysfs

2016-08-15 Thread Robert Bragg
and code generation scripts, ref: https://github.com/rib/gputop > gputop-data/guids.xml > scripts/update-guids.py > gputop-data/oa-*.xml > scripts/i915-perf-kernelgen.py $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic Signed-off-by: Robert Bragg <rob..

[Intel-gfx] [PATCH v3 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-08-15 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v3 09/11] drm/i915: add oa_event_min_timer_exponent sysctl

2016-08-15 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

Re: [Intel-gfx] [PATCH] drmtest: don't discard return value in do_ioctl()

2016-05-05 Thread Robert Bragg
On Thu, May 5, 2016 at 4:59 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Thu, May 05, 2016 at 04:06:02PM +0100, Robert Bragg wrote: > > Fixed a rebase mistake where I dropped the use of the igt_ioctl wrapper > in > > do_ioctl(). > > > > I'm not entir

[Intel-gfx] [PATCH] drmtest: don't discard return value in do_ioctl()

2016-05-05 Thread Robert Bragg
>8 --- In preparation for testing DRM_IOCTL_I915_PERF_OPEN which returns a file descriptor this allows us to get the return value of ioctl called by the do_ioctl() utility. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- lib/drmtest.h | 11 --- 1 file changed, 8 inse

[Intel-gfx] [PATCH igt 1/2] drmtest: don't discard return value in do_ioctl()

2016-05-04 Thread Robert Bragg
In preparation for testing DRM_IOCTL_I915_PERF_OPEN which returns a file descriptor this allows us to get the return value of ioctl called by the do_ioctl() utility. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- lib/drmtest.h | 11 --- 1 file changed, 8 insertions

[Intel-gfx] [PATCH igt 2/2] igt/perf: add i915 perf stream tests

2016-05-04 Thread Robert Bragg
Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- tests/Makefile.sources |1 + tests/perf.c | 2053 2 files changed, 2054 insertions(+) create mode 100644 tests/perf.c diff --git a/tests/Makefile.sources b

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-04 Thread Robert Bragg
On Wed, May 4, 2016 at 2:24 PM, Robert Bragg <rob...@sixbynine.org> wrote: > > > On Wed, May 4, 2016 at 1:24 PM, Daniel Vetter <dan...@ffwll.ch> wrote: > >> On Wed, May 04, 2016 at 10:49:53AM +0100, Robert Bragg wrote: >> > On Wed, May 4, 2016 a

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-04 Thread Robert Bragg
On Wed, May 4, 2016 at 1:24 PM, Daniel Vetter <dan...@ffwll.ch> wrote: > On Wed, May 04, 2016 at 10:49:53AM +0100, Robert Bragg wrote: > > On Wed, May 4, 2016 at 10:09 AM, Martin Peres < > martin.pe...@linux.intel.com> > > wrote: > > > &g

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-04 Thread Robert Bragg
On Wed, May 4, 2016 at 10:04 AM, Martin Peres <martin.pe...@linux.intel.com> wrote: > On 03/05/16 22:34, Robert Bragg wrote: > >> Sorry for the delay replying to this, I missed it. >> > > No worries! > > >> On Sat, Apr 23, 2016 at 11:34 AM, Martin Peres

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-04 Thread Robert Bragg
On Wed, May 4, 2016 at 10:09 AM, Martin Peres <martin.pe...@linux.intel.com> wrote: > On 03/05/16 23:03, Robert Bragg wrote: > >> >> >> On Tue, May 3, 2016 at 8:34 PM, Robert Bragg <rob...@sixbynine.org >> <mailto:rob...@sixbynine.org>> wrote: &

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-03 Thread Robert Bragg
On Fri, Apr 29, 2016 at 7:50 PM, Matthew Auld < matthew.william.a...@gmail.com> wrote: > > + bo = i915_gem_object_create(dev_priv->dev, OA_BUFFER_SIZE); > > + if (bo == NULL) { > > IS_ERR() > Ah, yup, thanks. ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-05-03 Thread Robert Bragg
Sorry for the delay replying to this, I missed it. On Sat, Apr 23, 2016 at 11:34 AM, Martin Peres <martin.pe...@free.fr> wrote: > On 20/04/16 17:23, Robert Bragg wrote: > >> Gen graphics hardware can be set up to periodically write snapshots of >> performance counters in

[Intel-gfx] [PATCH v2 10/10] drm/i915: Add more Haswell OA metric sets

2016-04-29 Thread Robert Bragg
This adds 'compute', 'compute extended', 'memory reads', 'memory writes' and 'sampler balance' metric sets for Haswell. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 483 - 1 file changed, 482 insertions

[Intel-gfx] [PATCH v2 09/10] drm/i915: add oa_event_min_timer_exponent sysctl

2016-04-29 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH v2 07/10] drm/i915: advertise available metrics via sysfs

2016-04-29 Thread Robert Bragg
. The is a globally unique ID for a specific OA unit configuration that can be reliably used as a key to lookup corresponding counter meta data and normalization equations. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_drv.h| 2 ++ drivers/gpu/dr

[Intel-gfx] [PATCH v2 08/10] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-04-29 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH v2 05/10] drm/i915: Add 'render basic' Haswell OA unit config

2016-04-29 Thread Robert Bragg
Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v2 03/10] drm/i915: return EACCES for check_cmd() failures

2016-04-29 Thread Robert Bragg
is disabled, but if we were to remove OACONTROL from the parser's whitelist then the returned EINVAL would break Mesa applications as they attempt an OACONTROL write. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 2 +- 1 file changed, 1 insertion

[Intel-gfx] [PATCH v2 01/10] drm/i915: Add i915 perf infrastructure

2016-04-29 Thread Robert Bragg
attempt to open a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_dma.c | 8 + drivers/gpu/drm/i915/i915_drv.h | 92 + drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH v2 04/10] drm/i915: don't whitelist oacontrol in cmd parser

2016-04-29 Thread Robert Bragg
running any Mesa based GL application currently results in clearing OACONTROL when initializing which would disable the capturing of metrics. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 33 ++--- 1 file chan

[Intel-gfx] [PATCH v2 00/10] Enable Gen 7 Observation Architecture

2016-04-29 Thread Robert Bragg
Hopefully covers the last issues raised by Chris and addresses the open issue I had with removing OACONTROL from the command parser whitelist. - Robert Robert Bragg (10): drm/i915: Add i915 perf infrastructure drm/i915: rename OACONTROL GEN7_OACONTROL drm/i915: return EACCES for check_cmd

[Intel-gfx] [PATCH v2 06/10] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-29 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH v2 02/10] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-04-29 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before adding more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-22 Thread Robert Bragg
On Wed, Apr 20, 2016 at 11:46 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: > > +static void gen7_init_oa_buffer(struct drm_i915_private *dev_priv) > > +{ > > + /* Pre-DevBDW: OABUFFER mu

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-21 Thread Robert Bragg
On Thu, Apr 21, 2016 at 4:18 PM, Robert Bragg <rob...@sixbynine.org> wrote: > > > On Thu, Apr 21, 2016 at 12:09 AM, Chris Wilson <ch...@chris-wilson.co.uk> > wrote: > >> On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: >> > +static void i91

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-21 Thread Robert Bragg
On Wed, Apr 20, 2016 at 10:11 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: > > +static void gen7_update_oacontrol_locked(struct drm_i915_private > *dev_priv) > > +{ > > + assert_spi

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-21 Thread Robert Bragg
On Wed, Apr 20, 2016 at 11:52 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: > > +static int i915_oa_read(struct i915_perf_stream *stream, > > + struct i915_perf_read_state *read_state) &g

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-21 Thread Robert Bragg
On Thu, Apr 21, 2016 at 12:09 AM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: > > +static void i915_oa_stream_enable(struct i915_perf_stream *stream) > > +{ > > + struct drm_i915_private *

Re: [Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-21 Thread Robert Bragg
On Thu, Apr 21, 2016 at 12:16 AM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Apr 20, 2016 at 03:23:10PM +0100, Robert Bragg wrote: > > +static int hsw_enable_metric_set(struct drm_i915_private *dev_priv) > > +{ > > + int ret = i915_oa_sel

Re: [Intel-gfx] [PATCH 0/9] Enable Gen 7 Observation Architecture

2016-04-20 Thread Robert Bragg
zero which disables the OA unit which may be in use via the i915 perf interface. Regards, - Robert On Wed, Apr 20, 2016 at 3:23 PM, Robert Bragg <rob...@sixbynine.org> wrote: > I've been working on some i-g-t tests for this new interface and while I > still > have some more tests to wri

[Intel-gfx] [PATCH 8/9] drm/i915: add oa_event_min_timer_exponent sysctl

2016-04-20 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH 6/9] drm/i915: advertise available metrics via sysfs

2016-04-20 Thread Robert Bragg
. The is a globally unique ID for a specific OA unit configuration that can be reliably used as a key to lookup corresponding counter meta data and normalization equations. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_drv.h| 2 ++ drivers/gpu/dr

[Intel-gfx] [PATCH 5/9] drm/i915: Enable i915 perf stream for Haswell OA unit

2016-04-20 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH 9/9] drm/i915: Add more Haswell OA metric sets

2016-04-20 Thread Robert Bragg
This adds 'compute', 'compute extended', 'memory reads', 'memory writes' and 'sampler balance' metric sets for Haswell. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 483 - 1 file changed, 482 insertions

[Intel-gfx] [PATCH 4/9] drm/i915: Add 'render basic' Haswell OA unit config

2016-04-20 Thread Robert Bragg
Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 7/9] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-04-20 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH 3/9] drm/i915: don't whitelist oacontrol in cmd parser

2016-04-20 Thread Robert Bragg
seem to cause a problem based on v4.5 with the same gnome-shell/mesa versions. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 33 ++--- 1 file changed, 2 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH 2/9] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-04-20 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before add more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 1/9] drm/i915: Add i915 perf infrastructure

2016-04-20 Thread Robert Bragg
attempt to open a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_dma.c | 8 + drivers/gpu/drm/i915/i915_drv.h | 86 drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH 0/9] Enable Gen 7 Observation Architecture

2016-04-20 Thread Robert Bragg
-gpu-tools branch = wip/rib/i915-perf-tests or browsed here: https://github.com/rib/intel-gpu-tools/commits/wip/rib/i915-perf-tests Also for reference these patches can be fetched from here: https://github.com/rib/linux branch = wip/rib/oa-2016-04-19-nightly Regards, - Robert Robert Bragg (9

Re: [Intel-gfx] [PATCH 06/11] drm/i915: Framework for capturing command stream based OA reports

2016-02-17 Thread Robert Bragg
Hi Sourab, As Sergio Martinez has started experimenting with this in gputop and reported seeing lots of ENOSPC errors being reported when reading I had a look into this and saw a few issues with how we check that there's data available to read in command stream mode, and a I think there's a

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Add i915 perf infrastructure

2016-02-04 Thread Robert Bragg
On Thu, Feb 4, 2016 at 1:42 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > On 3 February 2016 at 18:39, Robert Bragg <rob...@sixbynine.org> wrote: > > > index a5524cc..68ca26e 100644 > > --- a/include/uapi/drm/i915_drm.h > > +++ b/include/uapi/drm/

Re: [Intel-gfx] [PATCH 1/8] drm/i915: Add i915 perf infrastructure

2016-02-04 Thread Robert Bragg
On Thu, Feb 4, 2016 at 1:17 PM, Robert Bragg <rob...@sixbynine.org> wrote: > > On Thu, Feb 4, 2016 at 1:42 AM, Emil Velikov <emil.l.veli...@gmail.com> > wrote: > >> On 3 February 2016 at 18:39, Robert Bragg <rob...@sixbynine.org> wrote: &g

[Intel-gfx] [PATCH 3/8] drm/i915: Add 'render basic' Haswell OA unit config

2016-02-03 Thread Robert Bragg
Adds a static OA unit, MUX + B Counter configuration for basic render metrics on Haswell. This is autogenerated from an internal XML description of metric sets. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 5/8] drm/i915: advertise available metrics via sysfs

2016-02-03 Thread Robert Bragg
. The is a globally unique ID for a specific OA unit configuration that can be reliably used as a key to lookup corresponding counter meta data and normalization equations. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_drv.h| 2 ++ drivers/gpu/dr

[Intel-gfx] [PATCH 6/8] drm/i915: Add dev.i915.perf_event_paranoid sysctl option

2016-02-03 Thread Robert Bragg
Consistent with the kernel.perf_event_paranoid sysctl option that can allow non-root users to access system wide cpu metrics, this can optionally allow non-root users to access system wide OA counter metrics from Gen graphics hardware. Signed-off-by: Robert Bragg <rob...@sixbynine.

[Intel-gfx] [PATCH 2/8] drm/i915: rename OACONTROL GEN7_OACONTROL

2016-02-03 Thread Robert Bragg
OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register. Rename now before add more gen7 OA registers Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 7/8] drm/i915: add oa_event_min_timer_exponent sysctl

2016-02-03 Thread Robert Bragg
The minimal sampling period is now configurable via a dev.i915.oa_min_timer_exponent sysctl parameter. Following the precedent set by perf, the default is the minimum that won't (on its own) exceed the default kernel.perf_event_max_sample_rate default of 10 samples/s. Signed-off-by: Robert

[Intel-gfx] [PATCH 4/8] drm/i915: Add i915 perf event for Haswell OA unit

2016-02-03 Thread Robert Bragg
Gen graphics hardware can be set up to periodically write snapshots of performance counters into a circular buffer via its Observation Architecture and this patch exposes that capability to userspace via the i915 perf interface. Cc: Chris Wilson <ch...@chris-wilson.co.uk> Signed-off-by:

[Intel-gfx] [PATCH 8/8] drm/i915: Add more Haswell OA metric sets

2016-02-03 Thread Robert Bragg
This adds 'compute', 'compute extended', 'memory reads', 'memory writes' and 'sampler balance' metric sets for Haswell. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 513 +++-- 1 file changed, 497 insertions(

[Intel-gfx] [PATCH 1/8] drm/i915: Add i915 perf infrastructure

2016-02-03 Thread Robert Bragg
a stream will return an error. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/Makefile| 3 + drivers/gpu/drm/i915/i915_dma.c | 7 + drivers/gpu/drm/i915/i915_drv.h | 88 drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH 8/8] drm/i915: Add more Haswell OA metric sets

2016-02-02 Thread Robert Bragg
This adds 'compute', 'compute extended', 'memory reads', 'memory writes' and 'sampler balance' metric sets for Haswell. Signed-off-by: Robert Bragg <rob...@sixbynine.org> --- drivers/gpu/drm/i915/i915_oa_hsw.c | 483 - 1 file changed, 482 insertions

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