[Intel-gfx] [CI 1/3] drm/i915/guc: Enable guc logging on guc log relay write

2019-10-22 Thread Robert M. Fosha
changes and fix typos. Add guc_log_relay_stop() function. (Daniele) Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [CI 2/3] drm/i915/guc: Update H2G enable logging action definition

2019-10-22 Thread Robert M. Fosha
GuC enable logging H2G action definition changed some time ago from 0xE000 to 0x40. All current GuC FW blobs use this definition, so fix the action definition in driver to match. Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha Reviewed-by: Daniele Ceraolo Spurio

[Intel-gfx] [CI 3/3] HAX: force enable_guc=2

2019-10-22 Thread Robert M. Fosha
From: Anusha Srivatsa Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..f9fbb1f2fabf 100644 ---

[Intel-gfx] [RESEND PATCH 2/2] drm/i915/guc: Update H2G enable logging action definition

2019-10-17 Thread Robert M. Fosha
GuC enable logging H2G action definition changed some time ago from 0xE000 to 0x40. All current GuC FW blobs use this definition, so fix the action definition in driver to match. Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha Reviewed-by: Daniele Ceraolo Spurio

[Intel-gfx] [RESEND PATCH 1/2] drm/i915/guc: Enable guc logging on guc log relay write

2019-10-17 Thread Robert M. Fosha
changes and fix typos. Add guc_log_relay_stop() function. (Daniele) Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [PATCH] drm/i915/guc: Update H2G enable logging action definition

2019-09-27 Thread Robert M. Fosha
GuC enable logging H2G action definition changed some time ago from 0xE000 to 0x40. All current GuC FW blobs use this definition, so fix the action definition in driver to match. Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha --- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [CI 2/2] HAX: force enable_guc=2

2019-09-20 Thread Robert M. Fosha
From: Anusha Srivatsa Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..f9fbb1f2fabf 100644 ---

[Intel-gfx] [CI 1/2] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-20 Thread Robert M. Fosha
changes and fix typos. Add guc_log_relay_stop() function. (Daniele) Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [PATCH v2] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-16 Thread Robert M. Fosha
changes and fix typos. Add guc_log_relay_stop() function. (Daniele) Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +- drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 4

[Intel-gfx] [RFC v2] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-12 Thread Robert M. Fosha
changes and fix typos. Add guc_log_relay_stop() function. (Daniele) Cc: Matthew Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +- drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 4

[Intel-gfx] [RFC] drm/i915/guc: Enable guc logging on guc log relay write

2019-09-10 Thread Robert M. Fosha
Brost Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Signed-off-by: Robert M. Fosha --- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +- drivers/gpu/drm/i915/gt/uc/intel_guc_log.h | 2 ++ drivers/gpu/drm/i915/i915_debugfs.c| 27 +-- 3 files changed

[Intel-gfx] [PATCH v2] drm/i915/guc: Add debug capture of GuC exception

2019-06-25 Thread Robert M. Fosha
Detect GuC firmware load failure due to an exception during execution in GuC firmware. Output the GuC EIP where exception occurred to dmesg for GuC debug information. v2: correct typos, change debug message and error code returned for GuC exception (Michal) Signed-off-by: Robert M. Fosha Cc

[Intel-gfx] [PATCH] drm/i915/guc: Add debug capture of GuC exception

2019-06-21 Thread Robert M. Fosha
Detect GuC firmware load failure due to an exception during execution in GuC firmware. Output the GuC EIP where excpetion occured to dmesg for GuC debug information. Signed-off-by: Robert M. Fosha Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/intel_guc_fw.c | 7

[Intel-gfx] [PATCH 2/4] drm/i915: Support whitelist workarounds on all engines

2019-06-13 Thread Robert M. Fosha
From: John Harrison Newer hardware requires setting up whitelists on engines other than render. So, extend the whitelist code to support all engines. Signed-off-by: John Harrison Signed-off-by: Robert M. Fosha Cc: Tvrtko Ursulin Cc: Chris Wilson --- drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 4/4] drm/i915: Add whitelist workarounds for ICL

2019-06-13 Thread Robert M. Fosha
From: John Harrison Updated whitelist table for ICL. Signed-off-by: John Harrison Signed-off-by: Robert M. Fosha Cc: Tvrtko Ursulin Cc: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 87 +++-- 1 file changed, 79 insertions(+), 8 deletions(-) diff --git

[Intel-gfx] [PATCH 1/4] drm/i915: Support flags in whitlist WAs

2019-06-13 Thread Robert M. Fosha
From: John Harrison Newer hardware adds flags to the whitelist work-around register. These allow per access direction privileges and ranges. Signed-off-by: John Harrison Signed-off-by: Robert M. Fosha Cc: Tvrtko Ursulin Cc: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 9

[Intel-gfx] [PATCH 3/4] drm/i915: Add whitelist workarounds for CFL

2019-06-13 Thread Robert M. Fosha
From: John Harrison Updated whitelist table for CFL. Signed-off-by: John Harrison Signed-off-by: Robert M. Fosha Cc: Tvrtko Ursulin Cc: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 35 - 1 file changed, 34 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 0/4] Update whitelist support for new hardware

2019-06-13 Thread Robert M. Fosha
Recent hardware adds support for finer-grained control over whitelisting, allowing registers to be whitelisted independently for reads and/or writes. This series will add the basic plumbing to support that. Signed-off-by: John Harrison Signed-off-by: Robert M. Fosha John Harrison (4): drm

[Intel-gfx] [PATCH v2] drm/i915/guc: Retry GuC load for all load failures

2019-03-29 Thread Robert M. Fosha
/show_bug.cgi?id=108593 Signed-off-by: Robert M. Fosha Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/intel_uc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 2d360d53757f

[Intel-gfx] [PATCH] drm/i915/guc: Retry GuC load for all load failures

2019-03-29 Thread Robert M. Fosha
Currently we only retry to load GuC firmware if the load fails due to timeout. On Gen9 GuC loading may fail for different reasons, not just hang/timeout. Direction from the GuC team is to retry for all cases of GuC load failure on Gen9, not just for timeout. Signed-off-by: Robert M. Fosha Cc