[Intel-gfx] [PATCH v2] drm/i915/dsi: let HW maintain CLK_POST

change of HS-TRAIL. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Suraj Kandpal Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 13 + 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH] drm/i915/dsi: let HW maintain HS-TRAIL and CLK_POST

from 133.44 ns to 178.72 ns, which is greater than (60 ns+52*UI) and is conformed to the CTS standard. The computed UI is around 1.47 ns. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Suraj Kandpal Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v3] drm/i915/xelpd: Calculate first_line_bpg_offset for DSC 1.1

2 to 1. - add comment about first_line_bpg_offset for DSC 1.1. v3: - change variable name from rc to vdsc_cfg. - add Cc Cc: Suraj Kandpal Cc: Ankit Nautiyal Cc: Juha-Pekka Heikkil Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_vdsc.c | 18 +- 1 file changed

[Intel-gfx] [PATCH v2] drm/i915/xelpd: Calculate first_line_bpg_offset for DSC 1.1

2 to 1. - add comment about first_line_bpg_offset for DSC 1.1. Cc: Ankit Nautiyal Cc: Juha-Pekka Heikkil Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_vdsc.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/xelpd: Calculate first_line_bpg_offset for DSC 1.1

Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_vdsc.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index bd9116d2cd76..9b350f5f8ebb 100644 --- a/drivers

[Intel-gfx] [PATCH v4] drm/edid: ignore the CEA modes not defined in CEA-861-D

ani Nikula Cc: Wayne Lin Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/drm_edid.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index eaa819381281..3c6a4e09b2d6 100644 --- a/drive

[Intel-gfx] [PATCH v6] drm/i915/dsi: add payload receiving code

ch is made to gen11_dsi_setup_timeouts(). - drop the comment in gen11_dsi_host_transfer(). - change the condition to call the payload receive function in gen11_dsi_host_transfer(). Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drive

[Intel-gfx] [PATCH v5] drm/i915/dsi: add payload receiving code

data type of returning data for the read function dsi_read_pkt_payld(). v5: adding change history as part of commit messages. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 75

[Intel-gfx] [PATCH v4] drm/i915/dsi: add payload receiving code

To support Host to read data from Peripheral after a DCS read command is sent over DSI. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 75 +++-- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3] drm/i915/dsi: add payload receiving code

To support Host to read data from Peripheral after a DCS read command is sent over DSI. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 75 +++-- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2] drm/i915/dsi: add payload receiving code

To support Host to read data from Peripheral after a DCS read command is sent over DSI. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 76 +++-- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/dsi: add payload receiving code

To support Host to read data from Peripheral after a DCS read command is sent over DSI. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Vandita Kulkarni Cc: Lee Shawn C Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 68 - drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/edid: ignore the CEA modes not defined in CEA-861-D

. To work around it, this patch ignores such CEA modes in do_cea_modes() so the modes won't be processed in drm_hdmi_avi_infoframe_from_display_mode(). And only the video format in DTD can be dispalyed. Cc: Ville Syrjälä Cc: Wayne Lin Cc: Lee Shawn C Signed-off-by: William Tseng ---

[Intel-gfx] [PATCH] drm/edid: ignore the CEA modes not defined in CEA-861-D

. To work around it, this patch ignores such CEA modes in do_cea_modes() so the modes won't be processed in drm_hdmi_avi_infoframe_from_display_mode(). And only the video format in DTD can be dispalyed. Cc: Ville Syrjälä Cc: Wayne Lin Cc: Lee Shawn C Signed-off-by: William Tseng ---

[Intel-gfx] [PATCH] drm/i915/dsi: power on panel before enabling DPHY

This change is to power on panel before DPHY enters the lane state LP-11. Some panel needs this to meet its specifcation. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 10

[Intel-gfx] [PATCH] drm/i915/dsi: Get trail_cnt by division of tclk_trail_ns and tlpx_ns

Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index

[Intel-gfx] [PATCH v3] drm/i915/dsi: let HW maintain the HS-TRAIL timing

meet the specification if THS-TRAIL is set to the HW default, instead of software overriding. The timing change is made for both data lane and clock lane. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm

[Intel-gfx] [PATCH v2] drm/i915/dsi: let HW maintain the HS-TRAIL timing

meet the specification if THS-TRAIL is set to the HW default, instead of software overriding. The timing change is made for both data lane and clock lane. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/dsi: let HW maintain the HS-TRAIL timing

meet the specification if THS-TRAIL is set to the HW default, instead of software overriding. Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 2 -- 1 file changed, 2 deletions

[Intel-gfx] [PATCH v3] drm/i915/dsi: transmit brightness command in HS state

Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm

[Intel-gfx] [PATCH v2] drm/i915/dsi: transmit brightness command in HS state

Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/dsi: transmit brightness command in HS state

Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/dsi: disable lpdt if it is not enabled

Avoid setting LP_DATA_TRANSFER when enable_lpdt is false Cc: Ville Syrjala Cc: Jani Nikula Cc: Vandita Kulkarni Cc: Lee Shawn C Cc: Cooper Chiou Signed-off-by: William Tseng --- drivers/gpu/drm/i915/display/icl_dsi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH v2] drm/i915: Reading DPRX caps in LTTPR transparent mode after LTTPR detection

r complete register descriptions, see Table 2-184.) "" Cc : Khaled Almahallawy Cc : Imre Deak Cc : Tejas Upadhyay Cc : Ville Syrjälä Signed-off-by: William Tseng --- .../drm/i915/display/intel_dp_link_training.c | 44 +-- 1 file changed, 22 insertions(+), 22 deletions(-)

[Intel-gfx] [PATCH] drm/i915: Reading DPRX caps in LTTPR transparent mode after LTTPR detection

r complete register descriptions, see Table 2-184.) "" Cs : Khaled Almahallawy Cc : Imre Deak Cc : Tejas Upadhyay Cc : Ville Syrjälä Signed-off-by: William Tseng --- .../drm/i915/display/intel_dp_link_training.c | 44 +-- 1 file changed, 22 insertions(+), 22 deletions(-)

[Intel-gfx] [PATCH v2] [v2] x86/gpu: add JSL stolen memory support

This patch has a dependency on: "drm/i915/jsl: Split EHL/JSL platform info and PCI ids" Cc : Tejas Upadhyay Cc : Matt Roper Cc : Ville Syrjälä Signed-off-by: William Tseng --- arch/x86/kernel/early-quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/early-

[Intel-gfx] [PATCH] x86/gpu: add JSL stolen memory support

This patch has a dependency on: "drm/i915/jsl: Split EHL/JSL platform info and PCI ids" Signed-off-by: William Tseng --- arch/x86/kernel/early-quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index a4