[Intel-gfx] [PATCH 07/11] CHROMIUM: drm/i915/vlv: Scale backlight to min duty ratio

From: Ben Widawsky benjamin.widaw...@intel.com On VLV specifically, going too low runs the risk of getting the BLC_EN signal out of sync, preventing resume from working correctly. Scale /sys/class/backlight at this level to prevent userspace from doing this on suspend. This gets rid of the

[Intel-gfx] [PATCH 11/11] CHROMIUM: drm/i915/vlv: Prefer VBT to set PWM

From: Ben Widawsky benjamin.widaw...@intel.com This patch enables the VBT to override the PWM left in the BLC register, or correct for VBIOS which doesn't program the BLC, with a VBT entry. It kills the long hardcoded VLV_DEFAULT_BACKLIGHT_MOD_FREQ As of the last patch, we always will have a

[Intel-gfx] [PATCH 09/11] CHROMIUM: drm/i915: change order of PWM enable vs BLC enable

From: Jesse Barnes jbar...@virtuousgeek.org Needed for spec compliance Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Signed-off-by: Wayne Boyer wayne.bo...@intel.com Change-Id: Ib09f64bdc44108c13bbe5a6ab8ab2f536360f8d2 Reviewed-on: https://chromium-review.googlesource.com/192469

[Intel-gfx] [PATCH 02/11] CHROMIUM: drm/i915: do not explicitly disable backlight in panel_off

From: Jesse Barnes jbar...@virtuousgeek.org Per eDP spec, we must disable the backlight in order to power down the panel. However, in our code, we have always disabled the backlight before we try to turn off the panel. The assertions from the previous patch make sure this is the case.

[Intel-gfx] [PATCH 03/11] CHROMIUM: drm/i915: use backlight wrapper functions instead of direct calls

From: Jesse Barnes jbar...@virtuousgeek.org Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Signed-off-by: Wayne Boyer wayne.bo...@intel.com BUG=chrome-os-partner:25159 TEST=suspend/resume test on instrumented system shows correct signaling on oscope. Conflicts:

[Intel-gfx] [PATCH 04/11] CHROMIUM: drm/i915/vlv: Initialize pipe B backlight to A's value

From: Ben Widawsky benjamin.widaw...@intel.com Not sure if this is needed or not. The code still falls back to a potentially bad value if PIPE_A was not set. Signed-off-by: Ben Widawsky b...@bwidawsk.net Signed-off-by: Wayne Boyer wayne.bo...@intel.com Change-Id:

[Intel-gfx] [PATCH 05/11] CHROMIUM: drm/i915: parse backlight modulation frequency from the BIOS VBT

From: Jani Nikula jani.nik...@intel.com We don't actually do anything with the information yet, but parse and log what's in the VBT. Signed-off-by: Jani Nikula jani.nik...@intel.com Signed-off-by: Rodrigo Vivi rodrigo.v...@gmail.com Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com Signed-off-by:

[Intel-gfx] [PATCH 10/11] CHROMIUM: drm/i915/vlv: Fix BLM_PWM_ENABLE check in pwm invariant

From: Kevin Strasser kevin.stras...@intel.com Misplaced paren causing test to always fail. BUG=chrome-os-partner:27096,chrome-os-partner:28914 TEST=Manual: Check that the screen immediately goes black at minimum brightness. Change-Id: If9d813ab4ef8cfd9c90f2183f1bb674172bdffe9 Signed-off-by:

[Intel-gfx] [PATCH 06/11] CHROMIUM: drm/i915: Provide valleyview backlight fallback value

From: Ben Widawsky benjamin.widaw...@intel.com The fallback values for VLV reflect the Rambi3 panel values. This patch introduces min_brightness member, which defined a part of VBT that has some confusion. The field itself is a byte ranging from 0-255. How this value is supposed to be used by

[Intel-gfx] [PATCH 08/11] CHROMIUM: drm/i915/vlv: Check BLC enable for pwm invariant

From: Ben Widawsky benjamin.widaw...@intel.com The new assertion code mandates that backlight should be disabled. Since we've just bent over backwards over the last few patches to make sure we don't program a 0 into duty cycle, we need some additional checks to see if the panel is on. This can

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot

From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel. Ver2:

[Intel-gfx] [PATCH] drm/i915: revert intel_dp_probe_oui call during HPD interrupt handler

From: Clint Taylor clinton.a.tay...@intel.com Remove OUI read function from the lower half interrupt handler. Upon closing the eDP panel lid an HPD interrupt is generated. The lower half handler calls intel_dp_probe_oui() as part of intel_dp_detect(). intel_dp_probe_oui() enables eDP VDD and

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel. Ver2:

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel. Ver2:

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel. Ver2:

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel.

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