-by: Mengdong Lin mengdong@intel.com
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a90fdbd..21170e5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6256,6 +6256,27 @@ int i915_release_power_well(void)
}
EXPORT_SYMBOL_GPL
From: Jani Nikula jani.nik...@intel.com
Signed-off-by: Jani Nikula jani.nik...@intel.com
Signed-off-by: Mengdong Lin mengdong@intel.com
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a90fdbd..21170e5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b
From: Mengdong Lin mengdong@intel.com
This patch fixes the reversed CTS/M value index when dumping the
'audio M/CTS programing enable' register.
Signed-off-by: Mengdong Lin mengdong@intel.com
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 46eebdb..3ed2918 100644
From: Mengdong Lin mengdong@intel.com
Layout of display and audio registers can be same for different Intel GPUs,
so we want maximum code sharing when adding support for VLV.
This patch set:
- support using base address plus an offset to dump registers
- share common audio dump code
From: Mengdong Lin mengdong@intel.com
Layout of display and audio registers can be same for different Intel GPUs.
For code sharing, this patches defines functions to
- set the base address of display and audio registers
- dump registers using the base address and an offset
Signed-off
From: Mengdong Lin mengdong@intel.com
Move these enum definitions earlier for future code sharing.
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Haihao Xiang haihao.xi...@intel.com
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 47926e4..faa577e
From: Mengdong Lin mengdong@intel.com
It's for future code sharing because some registers define their bit fields
according to the number of pipes.
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Haihao Xiang haihao.xi...@intel.com
diff --git a/tools/intel_audio_dump.c b
From: Mengdong Lin mengdong@intel.com
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Haihao Xiang haihao.xi...@intel.com
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index e6f6002..e36bb69 100644
--- a/tools/intel_audio_dump.c
+++ b/tools
From: Mengdong Lin mengdong@intel.com
A macro IS_HASWELL_PLUS(devid) is defined to cover Haswell and its successors,
for code sharing. Now it covers HSW and BDW.
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Haihao Xiang haihao.xi...@intel.com
diff --git a/tools
From: Mengdong Lin mengdong@intel.com
This patch adds support for dumping audio registers of Valleyview,
by reusing Ironlake code with a different base address and pipe number.
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Haihao Xiang haihao.xi...@intel.com
diff --git
From: Mengdong Lin mengdong@intel.com
This patch defines HD-Audio configuration registers and enables display audio
from HDA controller for Valleyview2.
v2: fix missing offset VLV_DISPLAY_BASE
v3: rename patch from 'enable HDMI audio' to 'enable HDA display audio', since
it's for both
From: Mengdong Lin mengdong@intel.com
This patch defines HD-Audio configuration registers and enables display audio
from HDA controller for Valleyview2.
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
diff --git a/drivers/gpu/drm/i915
From: Mengdong Lin mengdong@intel.com
This patch defines audio configuration registers and adds audio enabling code
for Valleyview2.
Signed-off-by: Mengdong Lin mengdong@intel.com
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9538502..04e5a8b
modified by Mendong to apply to both HDMI and DP port.]
Signed-off-by: Mukesh Arora mukeshx.ar...@intel.com
Signed-off-by: Mengdong Lin mengdong@intel.com
Reviewed-by: Ben Widawsky b...@bwidawsk.net
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b042ee5
From: Mengdong Lin mengdong@intel.com
Three patches are included, reviewed by Haihao, Xiang.
Mengdong Lin (3):
intel_audio_dump/hsw: remove misuse of PCH transcoder configuration
register
intel_audio_dump/hsw: align code with tab
intel_audio_dump/hsw: rename some audio
From: Mengdong Lin mengdong@intel.com
The PCH transcoder config register (PCH_TRANS_CONF, 0xf0008) is not the
correct config register for transcoder A, B or C. This register is in
PCH and for CRT display, nothing to do with display audio.
So This patch removes misuse of it as config register
From: Mengdong Lin mengdong@intel.com
For Haswell, some audio configuration registers have changed their name and
some bit definitions.
This patch applies the changes, and uses subfunctions to parse registers for
code reuse.
Here is the name change list:
Audio configuration: AUD_CONFIG_x
From: Mukesh mukeshx.ar...@intel.com
The code implements hsw_hdmi_audio_disable func which sets the
relevant registers for disabling the audio codec in a call to
intel_disable_ddi func.This audio codec disbale sequence is
implemented as per the recommendation of the Bspec.
Change-Id:
modified by Mendong to apply to both HDMI and DP port.]
Signed-off-by: Mukesh Arora mukeshx.ar...@intel.com
Signed-off-by: Mengdong Lin mengdong@intel.com
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b042ee5..2946fe7 100644
--- a/drivers/gpu/drm/i915
From: Mengdong Lin mengdong@intel.com
This patch exposes is_haswell() to python, to be used by device auto-detection.
Signed-off-by: Mengdong Lin mengdong@intel.com
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index 69dc8df..4b13487 100644
--- a/tools/quick_dump
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